drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

   1 /*
   2  * Copyright 2018 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #include <linux/uaccess.h>
  27
  28 #include <drm/drm_debugfs.h>
  29
  30 #include "dc.h"
  31 #include "amdgpu.h"
  32 #include "amdgpu_dm.h"
  33 #include "amdgpu_dm_debugfs.h"
  34 #include "dm_helpers.h"
  35 #include "dmub/dmub_srv.h"
  36
  37 struct dmub_debugfs_trace_header {
  38         uint32_t entry_count;
  39         uint32_t reserved[3];
  40 };
  41
  42 struct dmub_debugfs_trace_entry {
  43         uint32_t trace_code;
  44         uint32_t tick_count;
  45         uint32_t param0;
  46         uint32_t param1;
  47 };
  48
  49 /* function description
  50  * get/ set DP configuration: lane_count, link_rate, spread_spectrum
  51  *
  52  * valid lane count value: 1, 2, 4
  53  * valid link rate value:
  54  * 06h = 1.62Gbps per lane
  55  * 0Ah = 2.7Gbps per lane
  56  * 0Ch = 3.24Gbps per lane
  57  * 14h = 5.4Gbps per lane
  58  * 1Eh = 8.1Gbps per lane
  59  *
  60  * debugfs is located at /sys/kernel/debug/dri/0/DP-x/link_settings
  61  *
  62  * --- to get dp configuration
  63  *
  64  * cat link_settings
  65  *
  66  * It will list current, verified, reported, preferred dp configuration.
  67  * current -- for current video mode
  68  * verified --- maximum configuration which pass link training
  69  * reported --- DP rx report caps (DPCD register offset 0, 1 2)
  70  * preferred --- user force settings
  71  *
  72  * --- set (or force) dp configuration
  73  *
  74  * echo <lane_count>  <link_rate> > link_settings
  75  *
  76  * for example, to force to  2 lane, 2.7GHz,
  77  * echo 4 0xa > link_settings
  78  *
  79  * spread_spectrum could not be changed dynamically.
  80  *
  81  * in case invalid lane count, link rate are force, no hw programming will be
  82  * done. please check link settings after force operation to see if HW get
  83  * programming.
  84  *
  85  * cat link_settings
  86  *
  87  * check current and preferred settings.
  88  *
  89  */
  90 static ssize_t dp_link_settings_read(struct file *f, char __user *buf,
  91                                  size_t size, loff_t *pos)
  92 {
  93         struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
  94         struct dc_link *link = connector->dc_link;
  95         char *rd_buf = NULL;
  96         char *rd_buf_ptr = NULL;
  97         const uint32_t rd_buf_size = 100;
  98         uint32_t result = 0;
  99         uint8_t str_len = 0;
 100         int r;
 101
 102         if (*pos & 3 || size & 3)
 103                 return -EINVAL;
 104
 105         rd_buf = kcalloc(rd_buf_size, sizeof(char), GFP_KERNEL);
 106         if (!rd_buf)
 107                 return 0;
 108
 109         rd_buf_ptr = rd_buf;
 110
 111         str_len = strlen("Current:  %d  %d  %d  ");
 112         snprintf(rd_buf_ptr, str_len, "Current:  %d  %d  %d  ",
 113                         link->cur_link_settings.lane_count,
 114                         link->cur_link_settings.link_rate,
 115                         link->cur_link_settings.link_spread);
 116         rd_buf_ptr += str_len;
 117
 118         str_len = strlen("Verified:  %d  %d  %d  ");
 119         snprintf(rd_buf_ptr, str_len, "Verified:  %d  %d  %d  ",
 120                         link->verified_link_cap.lane_count,
 121                         link->verified_link_cap.link_rate,
 122                         link->verified_link_cap.link_spread);
 123         rd_buf_ptr += str_len;
 124
 125         str_len = strlen("Reported:  %d  %d  %d  ");
 126         snprintf(rd_buf_ptr, str_len, "Reported:  %d  %d  %d  ",
 127                         link->reported_link_cap.lane_count,
 128                         link->reported_link_cap.link_rate,
 129                         link->reported_link_cap.link_spread);
 130         rd_buf_ptr += str_len;
 131
 132         str_len = strlen("Preferred:  %d  %d  %d  ");
 133         snprintf(rd_buf_ptr, str_len, "Preferred:  %d  %d  %d\n",
 134                         link->preferred_link_setting.lane_count,
 135                         link->preferred_link_setting.link_rate,
 136                         link->preferred_link_setting.link_spread);
 137
 138         while (size) {
 139                 if (*pos >= rd_buf_size)
 140                         break;
 141
 142                 r = put_user(*(rd_buf + result), buf);
 143                 if (r)
 144                         return r; /* r = -EFAULT */
 145
 146                 buf += 1;
 147                 size -= 1;
 148                 *pos += 1;
 149                 result += 1;
 150         }
 151
 152         kfree(rd_buf);
 153         return result;
 154 }
 155
 156 static ssize_t dp_link_settings_write(struct file *f, const char __user *buf,
 157                                  size_t size, loff_t *pos)
 158 {
 159         struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
 160         struct dc_link *link = connector->dc_link;
 161         struct dc *dc = (struct dc *)link->dc;
 162         struct dc_link_settings prefer_link_settings;
 163         char *wr_buf = NULL;
 164         char *wr_buf_ptr = NULL;
 165         const uint32_t wr_buf_size = 40;
 166         int r;
 167         int bytes_from_user;
 168         char *sub_str;
 169         /* 0: lane_count; 1: link_rate */
 170         uint8_t param_index = 0;
 171         long param[2];
 172         const char delimiter[3] = {' ', '\n', '\0'};
 173         bool valid_input = false;
 174
 175         if (size == 0)
 176                 return -EINVAL;
 177
 178         wr_buf = kcalloc(wr_buf_size, sizeof(char), GFP_KERNEL);
 179         if (!wr_buf)
 180                 return -EINVAL;
 181         wr_buf_ptr = wr_buf;
 182
 183         r = copy_from_user(wr_buf_ptr, buf, wr_buf_size);
 184
 185         /* r is bytes not be copied */
 186         if (r >= wr_buf_size) {
 187                 kfree(wr_buf);
 188                 DRM_DEBUG_DRIVER("user data not read\n");
 189                 return -EINVAL;
 190         }
 191
 192         bytes_from_user = wr_buf_size - r;
 193
 194         while (isspace(*wr_buf_ptr))
 195                 wr_buf_ptr++;
 196
 197         while ((*wr_buf_ptr != '\0') && (param_index < 2)) {
 198
 199                 sub_str = strsep(&wr_buf_ptr, delimiter);
 200
 201                 r = kstrtol(sub_str, 16, &param[param_index]);
 202
 203                 if (r)
 204                         DRM_DEBUG_DRIVER("string to int convert error code: %d\n", r);
 205
 206                 param_index++;
 207                 while (isspace(*wr_buf_ptr))
 208                         wr_buf_ptr++;
 209         }
 210
 211         switch (param[0]) {
 212         case LANE_COUNT_ONE:
 213         case LANE_COUNT_TWO:
 214         case LANE_COUNT_FOUR:
 215                 valid_input = true;
 216                 break;
 217         default:
 218                 break;
 219         }
 220
 221         switch (param[1]) {
 222         case LINK_RATE_LOW:
 223         case LINK_RATE_HIGH:
 224         case LINK_RATE_RBR2:
 225         case LINK_RATE_HIGH2:
 226         case LINK_RATE_HIGH3:
 227                 valid_input = true;
 228                 break;
 229         default:
 230                 break;
 231         }
 232
 233         if (!valid_input) {
 234                 kfree(wr_buf);
 235                 DRM_DEBUG_DRIVER("Invalid Input value No HW will be programmed\n");
 236                 return bytes_from_user;
 237         }
 238
 239         /* save user force lane_count, link_rate to preferred settings
 240          * spread spectrum will not be changed
 241          */
 242         prefer_link_settings.link_spread = link->cur_link_settings.link_spread;
 243         prefer_link_settings.lane_count = param[0];
 244         prefer_link_settings.link_rate = param[1];
 245
 246         dc_link_set_preferred_link_settings(dc, &prefer_link_settings, link);
 247
 248         kfree(wr_buf);
 249         return bytes_from_user;
 250 }
 251
 252 /* function: get current DP PHY settings: voltage swing, pre-emphasis,
 253  * post-cursor2 (defined by VESA DP specification)
 254  *
 255  * valid values
 256  * voltage swing: 0,1,2,3
 257  * pre-emphasis : 0,1,2,3
 258  * post cursor2 : 0,1,2,3
 259  *
 260  *
 261  * how to use this debugfs
 262  *
 263  * debugfs is located at /sys/kernel/debug/dri/0/DP-x
 264  *
 265  * there will be directories, like DP-1, DP-2,DP-3, etc. for DP display
 266  *
 267  * To figure out which DP-x is the display for DP to be check,
 268  * cd DP-x
 269  * ls -ll
 270  * There should be debugfs file, like link_settings, phy_settings.
 271  * cat link_settings
 272  * from lane_count, link_rate to figure which DP-x is for display to be worked
 273  * on
 274  *
 275  * To get current DP PHY settings,
 276  * cat phy_settings
 277  *
 278  * To change DP PHY settings,
 279  * echo <voltage_swing> <pre-emphasis> <post_cursor2> > phy_settings
 280  * for examle, to change voltage swing to 2, pre-emphasis to 3, post_cursor2 to
 281  * 0,
 282  * echo 2 3 0 > phy_settings
 283  *
 284  * To check if change be applied, get current phy settings by
 285  * cat phy_settings
 286  *
 287  * In case invalid values are set by user, like
 288  * echo 1 4 0 > phy_settings
 289  *
 290  * HW will NOT be programmed by these settings.
 291  * cat phy_settings will show the previous valid settings.
 292  */
 293 static ssize_t dp_phy_settings_read(struct file *f, char __user *buf,
 294                                  size_t size, loff_t *pos)
 295 {
 296         struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
 297         struct dc_link *link = connector->dc_link;
 298         char *rd_buf = NULL;
 299         const uint32_t rd_buf_size = 20;
 300         uint32_t result = 0;
 301         int r;
 302
 303         if (*pos & 3 || size & 3)
 304                 return -EINVAL;
 305
 306         rd_buf = kcalloc(rd_buf_size, sizeof(char), GFP_KERNEL);
 307         if (!rd_buf)
 308                 return -EINVAL;
 309
 310         snprintf(rd_buf, rd_buf_size, "  %d  %d  %d  ",
 311                         link->cur_lane_setting.VOLTAGE_SWING,
 312                         link->cur_lane_setting.PRE_EMPHASIS,
 313                         link->cur_lane_setting.POST_CURSOR2);
 314
 315         while (size) {
 316                 if (*pos >= rd_buf_size)
 317                         break;
 318
 319                 r = put_user((*(rd_buf + result)), buf);
 320                 if (r)
 321                         return r; /* r = -EFAULT */
 322
 323                 buf += 1;
 324                 size -= 1;
 325                 *pos += 1;
 326                 result += 1;
 327         }
 328
 329         kfree(rd_buf);
 330         return result;
 331 }
 332
 333 static ssize_t dp_phy_settings_write(struct file *f, const char __user *buf,
 334                                  size_t size, loff_t *pos)
 335 {
 336         struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
 337         struct dc_link *link = connector->dc_link;
 338         struct dc *dc = (struct dc *)link->dc;
 339         char *wr_buf = NULL;
 340         char *wr_buf_ptr = NULL;
 341         uint32_t wr_buf_size = 40;
 342         int r;
 343         int bytes_from_user;
 344         char *sub_str;
 345         uint8_t param_index = 0;
 346         long param[3];
 347         const char delimiter[3] = {' ', '\n', '\0'};
 348         bool use_prefer_link_setting;
 349         struct link_training_settings link_lane_settings;
 350
 351         if (size == 0)
 352                 return 0;
 353
 354         wr_buf = kcalloc(wr_buf_size, sizeof(char), GFP_KERNEL);
 355         if (!wr_buf)
 356                 return 0;
 357         wr_buf_ptr = wr_buf;
 358
 359         r = copy_from_user(wr_buf_ptr, buf, wr_buf_size);
 360
 361         /* r is bytes not be copied */
 362         if (r >= wr_buf_size) {
 363                 kfree(wr_buf);
 364                 DRM_DEBUG_DRIVER("user data not be read\n");
 365                 return 0;
 366         }
 367
 368         bytes_from_user = wr_buf_size - r;
 369
 370         while (isspace(*wr_buf_ptr))
 371                 wr_buf_ptr++;
 372
 373         while ((*wr_buf_ptr != '\0') && (param_index < 3)) {
 374
 375                 sub_str = strsep(&wr_buf_ptr, delimiter);
 376
 377                 r = kstrtol(sub_str, 16, &param[param_index]);
 378
 379                 if (r)
 380                         DRM_DEBUG_DRIVER("string to int convert error code: %d\n", r);
 381
 382                 param_index++;
 383                 while (isspace(*wr_buf_ptr))
 384                         wr_buf_ptr++;
 385         }
 386
 387         if ((param[0] > VOLTAGE_SWING_MAX_LEVEL) ||
 388                         (param[1] > PRE_EMPHASIS_MAX_LEVEL) ||
 389                         (param[2] > POST_CURSOR2_MAX_LEVEL)) {
 390                 kfree(wr_buf);
 391                 DRM_DEBUG_DRIVER("Invalid Input No HW will be programmed\n");
 392                 return bytes_from_user;
 393         }
 394
 395         /* get link settings: lane count, link rate */
 396         use_prefer_link_setting =
 397                 ((link->preferred_link_setting.link_rate != LINK_RATE_UNKNOWN) &&
 398                 (link->test_pattern_enabled));
 399
 400         memset(&link_lane_settings, 0, sizeof(link_lane_settings));
 401
 402         if (use_prefer_link_setting) {
 403                 link_lane_settings.link_settings.lane_count =
 404                                 link->preferred_link_setting.lane_count;
 405                 link_lane_settings.link_settings.link_rate =
 406                                 link->preferred_link_setting.link_rate;
 407                 link_lane_settings.link_settings.link_spread =
 408                                 link->preferred_link_setting.link_spread;
 409         } else {
 410                 link_lane_settings.link_settings.lane_count =
 411                                 link->cur_link_settings.lane_count;
 412                 link_lane_settings.link_settings.link_rate =
 413                                 link->cur_link_settings.link_rate;
 414                 link_lane_settings.link_settings.link_spread =
 415                                 link->cur_link_settings.link_spread;
 416         }
 417
 418         /* apply phy settings from user */
 419         for (r = 0; r < link_lane_settings.link_settings.lane_count; r++) {
 420                 link_lane_settings.lane_settings[r].VOLTAGE_SWING =
 421                                 (enum dc_voltage_swing) (param[0]);
 422                 link_lane_settings.lane_settings[r].PRE_EMPHASIS =
 423                                 (enum dc_pre_emphasis) (param[1]);
 424                 link_lane_settings.lane_settings[r].POST_CURSOR2 =
 425                                 (enum dc_post_cursor2) (param[2]);
 426         }
 427
 428         /* program ASIC registers and DPCD registers */
 429         dc_link_set_drive_settings(dc, &link_lane_settings, link);
 430
 431         kfree(wr_buf);
 432         return bytes_from_user;
 433 }
 434
 435 /* function description
 436  *
 437  * set PHY layer or Link layer test pattern
 438  * PHY test pattern is used for PHY SI check.
 439  * Link layer test will not affect PHY SI.
 440  *
 441  * Reset Test Pattern:
 442  * 0 = DP_TEST_PATTERN_VIDEO_MODE
 443  *
 444  * PHY test pattern supported:
 445  * 1 = DP_TEST_PATTERN_D102
 446  * 2 = DP_TEST_PATTERN_SYMBOL_ERROR
 447  * 3 = DP_TEST_PATTERN_PRBS7
 448  * 4 = DP_TEST_PATTERN_80BIT_CUSTOM
 449  * 5 = DP_TEST_PATTERN_CP2520_1
 450  * 6 = DP_TEST_PATTERN_CP2520_2 = DP_TEST_PATTERN_HBR2_COMPLIANCE_EYE
 451  * 7 = DP_TEST_PATTERN_CP2520_3
 452  *
 453  * DP PHY Link Training Patterns
 454  * 8 = DP_TEST_PATTERN_TRAINING_PATTERN1
 455  * 9 = DP_TEST_PATTERN_TRAINING_PATTERN2
 456  * a = DP_TEST_PATTERN_TRAINING_PATTERN3
 457  * b = DP_TEST_PATTERN_TRAINING_PATTERN4
 458  *
 459  * DP Link Layer Test pattern
 460  * c = DP_TEST_PATTERN_COLOR_SQUARES
 461  * d = DP_TEST_PATTERN_COLOR_SQUARES_CEA
 462  * e = DP_TEST_PATTERN_VERTICAL_BARS
 463  * f = DP_TEST_PATTERN_HORIZONTAL_BARS
 464  * 10= DP_TEST_PATTERN_COLOR_RAMP
 465  *
 466  * debugfs phy_test_pattern is located at /syskernel/debug/dri/0/DP-x
 467  *
 468  * --- set test pattern
 469  * echo <test pattern #> > test_pattern
 470  *
 471  * If test pattern # is not supported, NO HW programming will be done.
 472  * for DP_TEST_PATTERN_80BIT_CUSTOM, it needs extra 10 bytes of data
 473  * for the user pattern. input 10 bytes data are separated by space
 474  *
 475  * echo 0x4 0x11 0x22 0x33 0x44 0x55 0x66 0x77 0x88 0x99 0xaa > test_pattern
 476  *
 477  * --- reset test pattern
 478  * echo 0 > test_pattern
 479  *
 480  * --- HPD detection is disabled when set PHY test pattern
 481  *
 482  * when PHY test pattern (pattern # within [1,7]) is set, HPD pin of HW ASIC
 483  * is disable. User could unplug DP display from DP connected and plug scope to
 484  * check test pattern PHY SI.
 485  * If there is need unplug scope and plug DP display back, do steps below:
 486  * echo 0 > phy_test_pattern
 487  * unplug scope
 488  * plug DP display.
 489  *
 490  * "echo 0 > phy_test_pattern" will re-enable HPD pin again so that video sw
 491  * driver could detect "unplug scope" and "plug DP display"
 492  */
 493 static ssize_t dp_phy_test_pattern_debugfs_write(struct file *f, const char __user *buf,
 494                                  size_t size, loff_t *pos)
 495 {
 496         struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
 497         struct dc_link *link = connector->dc_link;
 498         char *wr_buf = NULL;
 499         char *wr_buf_ptr = NULL;
 500         uint32_t wr_buf_size = 100;
 501         uint32_t wr_buf_count = 0;
 502         int r;
 503         int bytes_from_user;
 504         char *sub_str = NULL;
 505         uint8_t param_index = 0;
 506         uint8_t param_nums = 0;
 507         long param[11] = {0x0};
 508         const char delimiter[3] = {' ', '\n', '\0'};
 509         enum dp_test_pattern test_pattern = DP_TEST_PATTERN_UNSUPPORTED;
 510         bool disable_hpd = false;
 511         bool valid_test_pattern = false;
 512         /* init with defalut 80bit custom pattern */
 513         uint8_t custom_pattern[10] = {
 514                         0x1f, 0x7c, 0xf0, 0xc1, 0x07,
 515                         0x1f, 0x7c, 0xf0, 0xc1, 0x07
 516                         };
 517         struct dc_link_settings prefer_link_settings = {LANE_COUNT_UNKNOWN,
 518                         LINK_RATE_UNKNOWN, LINK_SPREAD_DISABLED};
 519         struct dc_link_settings cur_link_settings = {LANE_COUNT_UNKNOWN,
 520                         LINK_RATE_UNKNOWN, LINK_SPREAD_DISABLED};
 521         struct link_training_settings link_training_settings;
 522         int i;
 523
 524         if (size == 0)
 525                 return 0;
 526
 527         wr_buf = kcalloc(wr_buf_size, sizeof(char), GFP_KERNEL);
 528         if (!wr_buf)
 529                 return 0;
 530         wr_buf_ptr = wr_buf;
 531
 532         r = copy_from_user(wr_buf_ptr, buf, wr_buf_size);
 533
 534         /* r is bytes not be copied */
 535         if (r >= wr_buf_size) {
 536                 kfree(wr_buf);
 537                 DRM_DEBUG_DRIVER("user data not be read\n");
 538                 return 0;
 539         }
 540
 541         bytes_from_user = wr_buf_size - r;
 542
 543         /* check number of parameters. isspace could not differ space and \n */
 544         while ((*wr_buf_ptr != 0xa) && (wr_buf_count < wr_buf_size)) {
 545                 /* skip space*/
 546                 while (isspace(*wr_buf_ptr) && (wr_buf_count < wr_buf_size)) {
 547                         wr_buf_ptr++;
 548                         wr_buf_count++;
 549                         }
 550
 551                 if (wr_buf_count == wr_buf_size)
 552                         break;
 553
 554                 /* skip non-space*/
 555                 while ((!isspace(*wr_buf_ptr)) && (wr_buf_count < wr_buf_size)) {
 556                         wr_buf_ptr++;
 557                         wr_buf_count++;
 558                         }
 559
 560                 param_nums++;
 561
 562                 if (wr_buf_count == wr_buf_size)
 563                         break;
 564         }
 565
 566         /* max 11 parameters */
 567         if (param_nums > 11)
 568                 param_nums = 11;
 569
 570         wr_buf_ptr = wr_buf; /* reset buf pinter */
 571         wr_buf_count = 0; /* number of char already checked */
 572
 573         while (isspace(*wr_buf_ptr) && (wr_buf_count < wr_buf_size)) {
 574                 wr_buf_ptr++;
 575                 wr_buf_count++;
 576         }
 577
 578         while (param_index < param_nums) {
 579                 /* after strsep, wr_buf_ptr will be moved to after space */
 580                 sub_str = strsep(&wr_buf_ptr, delimiter);
 581
 582                 r = kstrtol(sub_str, 16, &param[param_index]);
 583
 584                 if (r)
 585                         DRM_DEBUG_DRIVER("string to int convert error code: %d\n", r);
 586
 587                 param_index++;
 588         }
 589
 590         test_pattern = param[0];
 591
 592         switch (test_pattern) {
 593         case DP_TEST_PATTERN_VIDEO_MODE:
 594         case DP_TEST_PATTERN_COLOR_SQUARES:
 595         case DP_TEST_PATTERN_COLOR_SQUARES_CEA:
 596         case DP_TEST_PATTERN_VERTICAL_BARS:
 597         case DP_TEST_PATTERN_HORIZONTAL_BARS:
 598         case DP_TEST_PATTERN_COLOR_RAMP:
 599                 valid_test_pattern = true;
 600                 break;
 601
 602         case DP_TEST_PATTERN_D102:
 603         case DP_TEST_PATTERN_SYMBOL_ERROR:
 604         case DP_TEST_PATTERN_PRBS7:
 605         case DP_TEST_PATTERN_80BIT_CUSTOM:
 606         case DP_TEST_PATTERN_HBR2_COMPLIANCE_EYE:
 607         case DP_TEST_PATTERN_TRAINING_PATTERN4:
 608                 disable_hpd = true;
 609                 valid_test_pattern = true;
 610                 break;
 611
 612         default:
 613                 valid_test_pattern = false;
 614                 test_pattern = DP_TEST_PATTERN_UNSUPPORTED;
 615                 break;
 616         }
 617
 618         if (!valid_test_pattern) {
 619                 kfree(wr_buf);
 620                 DRM_DEBUG_DRIVER("Invalid Test Pattern Parameters\n");
 621                 return bytes_from_user;
 622         }
 623
 624         if (test_pattern == DP_TEST_PATTERN_80BIT_CUSTOM) {
 625                 for (i = 0; i < 10; i++) {
 626                         if ((uint8_t) param[i + 1] != 0x0)
 627                                 break;
 628                 }
 629
 630                 if (i < 10) {
 631                         /* not use default value */
 632                         for (i = 0; i < 10; i++)
 633                                 custom_pattern[i] = (uint8_t) param[i + 1];
 634                 }
 635         }
 636
 637         /* Usage: set DP physical test pattern using debugfs with normal DP
 638          * panel. Then plug out DP panel and connect a scope to measure
 639          * For normal video mode and test pattern generated from CRCT,
 640          * they are visibile to user. So do not disable HPD.
 641          * Video Mode is also set to clear the test pattern, so enable HPD
 642          * because it might have been disabled after a test pattern was set.
 643          * AUX depends on HPD * sequence dependent, do not move!
 644          */
 645         if (!disable_hpd)
 646                 dc_link_enable_hpd(link);
 647
 648         prefer_link_settings.lane_count = link->verified_link_cap.lane_count;
 649         prefer_link_settings.link_rate = link->verified_link_cap.link_rate;
 650         prefer_link_settings.link_spread = link->verified_link_cap.link_spread;
 651
 652         cur_link_settings.lane_count = link->cur_link_settings.lane_count;
 653         cur_link_settings.link_rate = link->cur_link_settings.link_rate;
 654         cur_link_settings.link_spread = link->cur_link_settings.link_spread;
 655
 656         link_training_settings.link_settings = cur_link_settings;
 657
 658
 659         if (test_pattern != DP_TEST_PATTERN_VIDEO_MODE) {
 660                 if (prefer_link_settings.lane_count != LANE_COUNT_UNKNOWN &&
 661                         prefer_link_settings.link_rate !=  LINK_RATE_UNKNOWN &&
 662                         (prefer_link_settings.lane_count != cur_link_settings.lane_count ||
 663                         prefer_link_settings.link_rate != cur_link_settings.link_rate))
 664                         link_training_settings.link_settings = prefer_link_settings;
 665         }
 666
 667         for (i = 0; i < (unsigned int)(link_training_settings.link_settings.lane_count); i++)
 668                 link_training_settings.lane_settings[i] = link->cur_lane_setting;
 669
 670         dc_link_set_test_pattern(
 671                 link,
 672                 test_pattern,
 673                 DP_TEST_PATTERN_COLOR_SPACE_RGB,
 674                 &link_training_settings,
 675                 custom_pattern,
 676                 10);
 677
 678         /* Usage: Set DP physical test pattern using AMDDP with normal DP panel
 679          * Then plug out DP panel and connect a scope to measure DP PHY signal.
 680          * Need disable interrupt to avoid SW driver disable DP output. This is
 681          * done after the test pattern is set.
 682          */
 683         if (valid_test_pattern && disable_hpd)
 684                 dc_link_disable_hpd(link);
 685
 686         kfree(wr_buf);
 687
 688         return bytes_from_user;
 689 }
 690
 691 /**
 692  * Returns the DMCUB tracebuffer contents.
 693  * Example usage: cat /sys/kernel/debug/dri/0/amdgpu_dm_dmub_tracebuffer
 694  */
 695 static int dmub_tracebuffer_show(struct seq_file *m, void *data)
 696 {
 697         struct amdgpu_device *adev = m->private;
 698         struct dmub_srv_fb_info *fb_info = adev->dm.dmub_fb_info;
 699         struct dmub_debugfs_trace_entry *entries;
 700         uint8_t *tbuf_base;
 701         uint32_t tbuf_size, max_entries, num_entries, i;
 702
 703         if (!fb_info)
 704                 return 0;
 705
 706         tbuf_base = (uint8_t *)fb_info->fb[DMUB_WINDOW_5_TRACEBUFF].cpu_addr;
 707         if (!tbuf_base)
 708                 return 0;
 709
 710         tbuf_size = fb_info->fb[DMUB_WINDOW_5_TRACEBUFF].size;
 711         max_entries = (tbuf_size - sizeof(struct dmub_debugfs_trace_header)) /
 712                       sizeof(struct dmub_debugfs_trace_entry);
 713
 714         num_entries =
 715                 ((struct dmub_debugfs_trace_header *)tbuf_base)->entry_count;
 716
 717         num_entries = min(num_entries, max_entries);
 718
 719         entries = (struct dmub_debugfs_trace_entry
 720                            *)(tbuf_base +
 721                               sizeof(struct dmub_debugfs_trace_header));
 722
 723         for (i = 0; i < num_entries; ++i) {
 724                 struct dmub_debugfs_trace_entry *entry = &entries[i];
 725
 726                 seq_printf(m,
 727                            "trace_code=%u tick_count=%u param0=%u param1=%u\n",
 728                            entry->trace_code, entry->tick_count, entry->param0,
 729                            entry->param1);
 730         }
 731
 732         return 0;
 733 }
 734
 735 /**
 736  * Returns the DMCUB firmware state contents.
 737  * Example usage: cat /sys/kernel/debug/dri/0/amdgpu_dm_dmub_fw_state
 738  */
 739 static int dmub_fw_state_show(struct seq_file *m, void *data)
 740 {
 741         struct amdgpu_device *adev = m->private;
 742         struct dmub_srv_fb_info *fb_info = adev->dm.dmub_fb_info;
 743         uint8_t *state_base;
 744         uint32_t state_size;
 745
 746         if (!fb_info)
 747                 return 0;
 748
 749         state_base = (uint8_t *)fb_info->fb[DMUB_WINDOW_6_FW_STATE].cpu_addr;
 750         if (!state_base)
 751                 return 0;
 752
 753         state_size = fb_info->fb[DMUB_WINDOW_6_FW_STATE].size;
 754
 755         return seq_write(m, state_base, state_size);
 756 }
 757
 758 /*
 759  * Returns the current and maximum output bpc for the connector.
 760  * Example usage: cat /sys/kernel/debug/dri/0/DP-1/output_bpc
 761  */
 762 static int output_bpc_show(struct seq_file *m, void *data)
 763 {
 764         struct drm_connector *connector = m->private;
 765         struct drm_device *dev = connector->dev;
 766         struct drm_crtc *crtc = NULL;
 767         struct dm_crtc_state *dm_crtc_state = NULL;
 768         int res = -ENODEV;
 769         unsigned int bpc;
 770
 771         mutex_lock(&dev->mode_config.mutex);
 772         drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
 773
 774         if (connector->state == NULL)
 775                 goto unlock;
 776
 777         crtc = connector->state->crtc;
 778         if (crtc == NULL)
 779                 goto unlock;
 780
 781         drm_modeset_lock(&crtc->mutex, NULL);
 782         if (crtc->state == NULL)
 783                 goto unlock;
 784
 785         dm_crtc_state = to_dm_crtc_state(crtc->state);
 786         if (dm_crtc_state->stream == NULL)
 787                 goto unlock;
 788
 789         switch (dm_crtc_state->stream->timing.display_color_depth) {
 790         case COLOR_DEPTH_666:
 791                 bpc = 6;
 792                 break;
 793         case COLOR_DEPTH_888:
 794                 bpc = 8;
 795                 break;
 796         case COLOR_DEPTH_101010:
 797                 bpc = 10;
 798                 break;
 799         case COLOR_DEPTH_121212:
 800                 bpc = 12;
 801                 break;
 802         case COLOR_DEPTH_161616:
 803                 bpc = 16;
 804                 break;
 805         default:
 806                 goto unlock;
 807         }
 808
 809         seq_printf(m, "Current: %u\n", bpc);
 810         seq_printf(m, "Maximum: %u\n", connector->display_info.bpc);
 811         res = 0;
 812
 813 unlock:
 814         if (crtc)
 815                 drm_modeset_unlock(&crtc->mutex);
 816
 817         drm_modeset_unlock(&dev->mode_config.connection_mutex);
 818         mutex_unlock(&dev->mode_config.mutex);
 819
 820         return res;
 821 }
 822
 823 /*
 824  * Returns the min and max vrr vfreq through the connector's debugfs file.
 825  * Example usage: cat /sys/kernel/debug/dri/0/DP-1/vrr_range
 826  */
 827 static int vrr_range_show(struct seq_file *m, void *data)
 828 {
 829         struct drm_connector *connector = m->private;
 830         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 831
 832         if (connector->status != connector_status_connected)
 833                 return -ENODEV;
 834
 835         seq_printf(m, "Min: %u\n", (unsigned int)aconnector->min_vfreq);
 836         seq_printf(m, "Max: %u\n", (unsigned int)aconnector->max_vfreq);
 837
 838         return 0;
 839 }
 840
 841 #ifdef CONFIG_DRM_AMD_DC_HDCP
 842 /*
 843  * Returns the HDCP capability of the Display (1.4 for now).
 844  *
 845  * NOTE* Not all HDMI displays report their HDCP caps even when they are capable.
 846  * Since its rare for a display to not be HDCP 1.4 capable, we set HDMI as always capable.
 847  *
 848  * Example usage: cat /sys/kernel/debug/dri/0/DP-1/hdcp_sink_capability
 849  *              or cat /sys/kernel/debug/dri/0/HDMI-A-1/hdcp_sink_capability
 850  */
 851 static int hdcp_sink_capability_show(struct seq_file *m, void *data)
 852 {
 853         struct drm_connector *connector = m->private;
 854         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 855         bool hdcp_cap, hdcp2_cap;
 856
 857         if (connector->status != connector_status_connected)
 858                 return -ENODEV;
 859
 860         seq_printf(m, "%s:%d HDCP version: ", connector->name, connector->base.id);
 861
 862         hdcp_cap = dc_link_is_hdcp14(aconnector->dc_link);
 863         hdcp2_cap = dc_link_is_hdcp22(aconnector->dc_link);
 864
 865
 866         if (hdcp_cap)
 867                 seq_printf(m, "%s ", "HDCP1.4");
 868         if (hdcp2_cap)
 869                 seq_printf(m, "%s ", "HDCP2.2");
 870
 871         if (!hdcp_cap && !hdcp2_cap)
 872                 seq_printf(m, "%s ", "None");
 873
 874         seq_puts(m, "\n");
 875
 876         return 0;
 877 }
 878 #endif
 879 /* function description
 880  *
 881  * generic SDP message access for testing
 882  *
 883  * debugfs sdp_message is located at /syskernel/debug/dri/0/DP-x
 884  *
 885  * SDP header
 886  * Hb0 : Secondary-Data Packet ID
 887  * Hb1 : Secondary-Data Packet type
 888  * Hb2 : Secondary-Data-packet-specific header, Byte 0
 889  * Hb3 : Secondary-Data-packet-specific header, Byte 1
 890  *
 891  * for using custom sdp message: input 4 bytes SDP header and 32 bytes raw data
 892  */
 893 static ssize_t dp_sdp_message_debugfs_write(struct file *f, const char __user *buf,
 894                                  size_t size, loff_t *pos)
 895 {
 896         int r;
 897         uint8_t data[36];
 898         struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
 899         struct dm_crtc_state *acrtc_state;
 900         uint32_t write_size = 36;
 901
 902         if (connector->base.status != connector_status_connected)
 903                 return -ENODEV;
 904
 905         if (size == 0)
 906                 return 0;
 907
 908         acrtc_state = to_dm_crtc_state(connector->base.state->crtc->state);
 909
 910         r = copy_from_user(data, buf, write_size);
 911
 912         write_size -= r;
 913
 914         dc_stream_send_dp_sdp(acrtc_state->stream, data, write_size);
 915
 916         return write_size;
 917 }
 918
 919 static ssize_t dp_dpcd_address_write(struct file *f, const char __user *buf,
 920                                  size_t size, loff_t *pos)
 921 {
 922         int r;
 923         struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
 924
 925         if (size < sizeof(connector->debugfs_dpcd_address))
 926                 return 0;
 927
 928         r = copy_from_user(&connector->debugfs_dpcd_address,
 929                         buf, sizeof(connector->debugfs_dpcd_address));
 930
 931         return size - r;
 932 }
 933
 934 static ssize_t dp_dpcd_size_write(struct file *f, const char __user *buf,
 935                                  size_t size, loff_t *pos)
 936 {
 937         int r;
 938         struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
 939
 940         if (size < sizeof(connector->debugfs_dpcd_size))
 941                 return 0;
 942
 943         r = copy_from_user(&connector->debugfs_dpcd_size,
 944                         buf, sizeof(connector->debugfs_dpcd_size));
 945
 946         if (connector->debugfs_dpcd_size > 256)
 947                 connector->debugfs_dpcd_size = 0;
 948
 949         return size - r;
 950 }
 951
 952 static ssize_t dp_dpcd_data_write(struct file *f, const char __user *buf,
 953                                  size_t size, loff_t *pos)
 954 {
 955         int r;
 956         char *data;
 957         struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
 958         struct dc_link *link = connector->dc_link;
 959         uint32_t write_size = connector->debugfs_dpcd_size;
 960
 961         if (size < write_size)
 962                 return 0;
 963
 964         data = kzalloc(write_size, GFP_KERNEL);
 965         if (!data)
 966                 return 0;
 967
 968         r = copy_from_user(data, buf, write_size);
 969
 970         dm_helpers_dp_write_dpcd(link->ctx, link,
 971                         connector->debugfs_dpcd_address, data, write_size - r);
 972         kfree(data);
 973         return write_size - r;
 974 }
 975
 976 static ssize_t dp_dpcd_data_read(struct file *f, char __user *buf,
 977                                  size_t size, loff_t *pos)
 978 {
 979         int r;
 980         char *data;
 981         struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
 982         struct dc_link *link = connector->dc_link;
 983         uint32_t read_size = connector->debugfs_dpcd_size;
 984
 985         if (size < read_size)
 986                 return 0;
 987
 988         data = kzalloc(read_size, GFP_KERNEL);
 989         if (!data)
 990                 return 0;
 991
 992         dm_helpers_dp_read_dpcd(link->ctx, link,
 993                         connector->debugfs_dpcd_address, data, read_size);
 994
 995         r = copy_to_user(buf, data, read_size);
 996
 997         kfree(data);
 998         return read_size - r;
 999 }
1000
1001 DEFINE_SHOW_ATTRIBUTE(dmub_fw_state);
1002 DEFINE_SHOW_ATTRIBUTE(dmub_tracebuffer);
1003 DEFINE_SHOW_ATTRIBUTE(output_bpc);
1004 DEFINE_SHOW_ATTRIBUTE(vrr_range);
1005 #ifdef CONFIG_DRM_AMD_DC_HDCP
1006 DEFINE_SHOW_ATTRIBUTE(hdcp_sink_capability);
1007 #endif
1008
1009 static const struct file_operations dp_link_settings_debugfs_fops = {
1010         .owner = THIS_MODULE,
1011         .read = dp_link_settings_read,
1012         .write = dp_link_settings_write,
1013         .llseek = default_llseek
1014 };
1015
1016 static const struct file_operations dp_phy_settings_debugfs_fop = {
1017         .owner = THIS_MODULE,
1018         .read = dp_phy_settings_read,
1019         .write = dp_phy_settings_write,
1020         .llseek = default_llseek
1021 };
1022
1023 static const struct file_operations dp_phy_test_pattern_fops = {
1024         .owner = THIS_MODULE,
1025         .write = dp_phy_test_pattern_debugfs_write,
1026         .llseek = default_llseek
1027 };
1028
1029 static const struct file_operations sdp_message_fops = {
1030         .owner = THIS_MODULE,
1031         .write = dp_sdp_message_debugfs_write,
1032         .llseek = default_llseek
1033 };
1034
1035 static const struct file_operations dp_dpcd_address_debugfs_fops = {
1036         .owner = THIS_MODULE,
1037         .write = dp_dpcd_address_write,
1038         .llseek = default_llseek
1039 };
1040
1041 static const struct file_operations dp_dpcd_size_debugfs_fops = {
1042         .owner = THIS_MODULE,
1043         .write = dp_dpcd_size_write,
1044         .llseek = default_llseek
1045 };
1046
1047 static const struct file_operations dp_dpcd_data_debugfs_fops = {
1048         .owner = THIS_MODULE,
1049         .read = dp_dpcd_data_read,
1050         .write = dp_dpcd_data_write,
1051         .llseek = default_llseek
1052 };
1053
1054 static const struct {
1055         char *name;
1056         const struct file_operations *fops;
1057 } dp_debugfs_entries[] = {
1058                 {"link_settings", &dp_link_settings_debugfs_fops},
1059                 {"phy_settings", &dp_phy_settings_debugfs_fop},
1060                 {"test_pattern", &dp_phy_test_pattern_fops},
1061                 {"vrr_range", &vrr_range_fops},
1062 #ifdef CONFIG_DRM_AMD_DC_HDCP
1063                 {"hdcp_sink_capability", &hdcp_sink_capability_fops},
1064 #endif
1065                 {"sdp_message", &sdp_message_fops},
1066                 {"aux_dpcd_address", &dp_dpcd_address_debugfs_fops},
1067                 {"aux_dpcd_size", &dp_dpcd_size_debugfs_fops},
1068                 {"aux_dpcd_data", &dp_dpcd_data_debugfs_fops}
1069 };
1070
1071 #ifdef CONFIG_DRM_AMD_DC_HDCP
1072 static const struct {
1073         char *name;
1074         const struct file_operations *fops;
1075 } hdmi_debugfs_entries[] = {
1076                 {"hdcp_sink_capability", &hdcp_sink_capability_fops}
1077 };
1078 #endif
1079 /*
1080  * Force YUV420 output if available from the given mode
1081  */
1082 static int force_yuv420_output_set(void *data, u64 val)
1083 {
1084         struct amdgpu_dm_connector *connector = data;
1085
1086         connector->force_yuv420_output = (bool)val;
1087
1088         return 0;
1089 }
1090
1091 /*
1092  * Check if YUV420 is forced when available from the given mode
1093  */
1094 static int force_yuv420_output_get(void *data, u64 *val)
1095 {
1096         struct amdgpu_dm_connector *connector = data;
1097
1098         *val = connector->force_yuv420_output;
1099
1100         return 0;
1101 }
1102
1103 DEFINE_DEBUGFS_ATTRIBUTE(force_yuv420_output_fops, force_yuv420_output_get,
1104                          force_yuv420_output_set, "%llu\n");
1105
1106 /*
1107  *  Read PSR state
1108  */
1109 static int psr_get(void *data, u64 *val)
1110 {
1111         struct amdgpu_dm_connector *connector = data;
1112         struct dc_link *link = connector->dc_link;
1113         uint32_t psr_state = 0;
1114
1115         dc_link_get_psr_state(link, &psr_state);
1116
1117         *val = psr_state;
1118
1119         return 0;
1120 }
1121
1122
1123 DEFINE_DEBUGFS_ATTRIBUTE(psr_fops, psr_get, NULL, "%llu\n");
1124
1125 void connector_debugfs_init(struct amdgpu_dm_connector *connector)
1126 {
1127         int i;
1128         struct dentry *dir = connector->base.debugfs_entry;
1129
1130         if (connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1131             connector->base.connector_type == DRM_MODE_CONNECTOR_eDP) {
1132                 for (i = 0; i < ARRAY_SIZE(dp_debugfs_entries); i++) {
1133                         debugfs_create_file(dp_debugfs_entries[i].name,
1134                                             0644, dir, connector,
1135                                             dp_debugfs_entries[i].fops);
1136                 }
1137         }
1138         if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)
1139                 debugfs_create_file_unsafe("psr_state", 0444, dir, connector, &psr_fops);
1140
1141         debugfs_create_file_unsafe("force_yuv420_output", 0644, dir, connector,
1142                                    &force_yuv420_output_fops);
1143
1144         debugfs_create_file("output_bpc", 0644, dir, connector,
1145                             &output_bpc_fops);
1146
1147         connector->debugfs_dpcd_address = 0;
1148         connector->debugfs_dpcd_size = 0;
1149
1150 #ifdef CONFIG_DRM_AMD_DC_HDCP
1151         if (connector->base.connector_type == DRM_MODE_CONNECTOR_HDMIA) {
1152                 for (i = 0; i < ARRAY_SIZE(hdmi_debugfs_entries); i++) {
1153                         debugfs_create_file(hdmi_debugfs_entries[i].name,
1154                                             0644, dir, connector,
1155                                             hdmi_debugfs_entries[i].fops);
1156                 }
1157         }
1158 #endif
1159 }
1160
1161 /*
1162  * Writes DTN log state to the user supplied buffer.
1163  * Example usage: cat /sys/kernel/debug/dri/0/amdgpu_dm_dtn_log
1164  */
1165 static ssize_t dtn_log_read(
1166         struct file *f,
1167         char __user *buf,
1168         size_t size,
1169         loff_t *pos)
1170 {
1171         struct amdgpu_device *adev = file_inode(f)->i_private;
1172         struct dc *dc = adev->dm.dc;
1173         struct dc_log_buffer_ctx log_ctx = { 0 };
1174         ssize_t result = 0;
1175
1176         if (!buf || !size)
1177                 return -EINVAL;
1178
1179         if (!dc->hwss.log_hw_state)
1180                 return 0;
1181
1182         dc->hwss.log_hw_state(dc, &log_ctx);
1183
1184         if (*pos < log_ctx.pos) {
1185                 size_t to_copy = log_ctx.pos - *pos;
1186
1187                 to_copy = min(to_copy, size);
1188
1189                 if (!copy_to_user(buf, log_ctx.buf + *pos, to_copy)) {
1190                         *pos += to_copy;
1191                         result = to_copy;
1192                 }
1193         }
1194
1195         kfree(log_ctx.buf);
1196
1197         return result;
1198 }
1199
1200 /*
1201  * Writes DTN log state to dmesg when triggered via a write.
1202  * Example usage: echo 1 > /sys/kernel/debug/dri/0/amdgpu_dm_dtn_log
1203  */
1204 static ssize_t dtn_log_write(
1205         struct file *f,
1206         const char __user *buf,
1207         size_t size,
1208         loff_t *pos)
1209 {
1210         struct amdgpu_device *adev = file_inode(f)->i_private;
1211         struct dc *dc = adev->dm.dc;
1212
1213         /* Write triggers log output via dmesg. */
1214         if (size == 0)
1215                 return 0;
1216
1217         if (dc->hwss.log_hw_state)
1218                 dc->hwss.log_hw_state(dc, NULL);
1219
1220         return size;
1221 }
1222
1223 /*
1224  * Backlight at this moment.  Read only.
1225  * As written to display, taking ABM and backlight lut into account.
1226  * Ranges from 0x0 to 0x10000 (= 100% PWM)
1227  */
1228 static int current_backlight_read(struct seq_file *m, void *data)
1229 {
1230         struct drm_info_node *node = (struct drm_info_node *)m->private;
1231         struct drm_device *dev = node->minor->dev;
1232         struct amdgpu_device *adev = dev->dev_private;
1233         struct amdgpu_display_manager *dm = &adev->dm;
1234
1235         unsigned int backlight = dc_link_get_backlight_level(dm->backlight_link);
1236
1237         seq_printf(m, "0x%x\n", backlight);
1238         return 0;
1239 }
1240
1241 /*
1242  * Backlight value that is being approached.  Read only.
1243  * As written to display, taking ABM and backlight lut into account.
1244  * Ranges from 0x0 to 0x10000 (= 100% PWM)
1245  */
1246 static int target_backlight_read(struct seq_file *m, void *data)
1247 {
1248         struct drm_info_node *node = (struct drm_info_node *)m->private;
1249         struct drm_device *dev = node->minor->dev;
1250         struct amdgpu_device *adev = dev->dev_private;
1251         struct amdgpu_display_manager *dm = &adev->dm;
1252
1253         unsigned int backlight = dc_link_get_target_backlight_pwm(dm->backlight_link);
1254
1255         seq_printf(m, "0x%x\n", backlight);
1256         return 0;
1257 }
1258
1259 static int mst_topo(struct seq_file *m, void *unused)
1260 {
1261         struct drm_info_node *node = (struct drm_info_node *)m->private;
1262         struct drm_device *dev = node->minor->dev;
1263         struct drm_connector *connector;
1264         struct drm_connector_list_iter conn_iter;
1265         struct amdgpu_dm_connector *aconnector;
1266
1267         drm_connector_list_iter_begin(dev, &conn_iter);
1268         drm_for_each_connector_iter(connector, &conn_iter) {
1269                 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
1270                         continue;
1271
1272                 aconnector = to_amdgpu_dm_connector(connector);
1273
1274                 seq_printf(m, "\nMST topology for connector %d\n", aconnector->connector_id);
1275                 drm_dp_mst_dump_topology(m, &aconnector->mst_mgr);
1276         }
1277         drm_connector_list_iter_end(&conn_iter);
1278
1279         return 0;
1280 }
1281
1282 static const struct drm_info_list amdgpu_dm_debugfs_list[] = {
1283         {"amdgpu_current_backlight_pwm", &current_backlight_read},
1284         {"amdgpu_target_backlight_pwm", &target_backlight_read},
1285         {"amdgpu_mst_topology", &mst_topo},
1286 };
1287
1288 /*
1289  * Sets the DC visual confirm debug option from the given string.
1290  * Example usage: echo 1 > /sys/kernel/debug/dri/0/amdgpu_visual_confirm
1291  */
1292 static int visual_confirm_set(void *data, u64 val)
1293 {
1294         struct amdgpu_device *adev = data;
1295
1296         adev->dm.dc->debug.visual_confirm = (enum visual_confirm)val;
1297
1298         return 0;
1299 }
1300
1301 /*
1302  * Reads the DC visual confirm debug option value into the given buffer.
1303  * Example usage: cat /sys/kernel/debug/dri/0/amdgpu_dm_visual_confirm
1304  */
1305 static int visual_confirm_get(void *data, u64 *val)
1306 {
1307         struct amdgpu_device *adev = data;
1308
1309         *val = adev->dm.dc->debug.visual_confirm;
1310
1311         return 0;
1312 }
1313
1314 DEFINE_DEBUGFS_ATTRIBUTE(visual_confirm_fops, visual_confirm_get,
1315                          visual_confirm_set, "%llu\n");
1316
1317 int dtn_debugfs_init(struct amdgpu_device *adev)
1318 {
1319         static const struct file_operations dtn_log_fops = {
1320                 .owner = THIS_MODULE,
1321                 .read = dtn_log_read,
1322                 .write = dtn_log_write,
1323                 .llseek = default_llseek
1324         };
1325
1326         struct drm_minor *minor = adev->ddev->primary;
1327         struct dentry *root = minor->debugfs_root;
1328         int ret;
1329
1330         ret = amdgpu_debugfs_add_files(adev, amdgpu_dm_debugfs_list,
1331                                 ARRAY_SIZE(amdgpu_dm_debugfs_list));
1332         if (ret)
1333                 return ret;
1334
1335         debugfs_create_file("amdgpu_dm_dtn_log", 0644, root, adev,
1336                             &dtn_log_fops);
1337
1338         debugfs_create_file_unsafe("amdgpu_dm_visual_confirm", 0644, root, adev,
1339                                    &visual_confirm_fops);
1340
1341         debugfs_create_file_unsafe("amdgpu_dm_dmub_tracebuffer", 0644, root,
1342                                    adev, &dmub_tracebuffer_fops);
1343
1344         debugfs_create_file_unsafe("amdgpu_dm_dmub_fw_state", 0644, root,
1345                                    adev, &dmub_fw_state_fops);
1346
1347         return 0;
1348 }