1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright IBM Corp. 2007
5 * Copyright 2011 Freescale Semiconductor, Inc.
10 #include <linux/jiffies.h>
11 #include <linux/hrtimer.h>
12 #include <linux/types.h>
13 #include <linux/string.h>
14 #include <linux/kvm_host.h>
15 #include <linux/clockchips.h>
19 #include <asm/byteorder.h>
20 #include <asm/kvm_ppc.h>
21 #include <asm/disassemble.h>
22 #include <asm/ppc-opcode.h>
26 void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
28 unsigned long dec_nsec;
29 unsigned long long dec_time;
31 pr_debug("mtDEC: %lx\n", vcpu->arch.dec);
32 hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
34 #ifdef CONFIG_PPC_BOOK3S
35 /* mtdec lowers the interrupt line when positive. */
36 kvmppc_core_dequeue_dec(vcpu);
40 /* On BOOKE, DEC = 0 is as good as decrementer not enabled */
41 if (vcpu->arch.dec == 0)
46 * The decrementer ticks at the same rate as the timebase, so
47 * that's how we convert the guest DEC value to the number of
51 dec_time = vcpu->arch.dec;
53 * Guest timebase ticks at the same frequency as host timebase.
54 * So use the host timebase calculations for decrementer emulation.
56 dec_time = tb_to_ns(dec_time);
57 dec_nsec = do_div(dec_time, NSEC_PER_SEC);
58 hrtimer_start(&vcpu->arch.dec_timer,
59 ktime_set(dec_time, dec_nsec), HRTIMER_MODE_REL);
60 vcpu->arch.dec_jiffies = get_tb();
63 u32 kvmppc_get_dec(struct kvm_vcpu *vcpu, u64 tb)
65 u64 jd = tb - vcpu->arch.dec_jiffies;
68 if (vcpu->arch.dec < jd)
72 return vcpu->arch.dec - jd;
75 static int kvmppc_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
77 enum emulation_result emulated = EMULATE_DONE;
78 ulong spr_val = kvmppc_get_gpr(vcpu, rs);
82 kvmppc_set_srr0(vcpu, spr_val);
85 kvmppc_set_srr1(vcpu, spr_val);
88 /* XXX We need to context-switch the timebase for
89 * watchdog and FIT. */
90 case SPRN_TBWL: break;
91 case SPRN_TBWU: break;
94 vcpu->arch.dec = (u32) spr_val;
95 kvmppc_emulate_dec(vcpu);
99 kvmppc_set_sprg0(vcpu, spr_val);
102 kvmppc_set_sprg1(vcpu, spr_val);
105 kvmppc_set_sprg2(vcpu, spr_val);
108 kvmppc_set_sprg3(vcpu, spr_val);
111 /* PIR can legally be written, but we ignore it */
112 case SPRN_PIR: break;
115 emulated = vcpu->kvm->arch.kvm_ops->emulate_mtspr(vcpu, sprn,
117 if (emulated == EMULATE_FAIL)
118 printk(KERN_INFO "mtspr: unknown spr "
123 kvmppc_set_exit_type(vcpu, EMULATED_MTSPR_EXITS);
128 static int kvmppc_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
130 enum emulation_result emulated = EMULATE_DONE;
135 spr_val = kvmppc_get_srr0(vcpu);
138 spr_val = kvmppc_get_srr1(vcpu);
141 spr_val = vcpu->arch.pvr;
144 spr_val = vcpu->vcpu_id;
147 /* Note: mftb and TBRL/TBWL are user-accessible, so
148 * the guest can always access the real TB anyways.
149 * In fact, we probably will never see these traps. */
151 spr_val = get_tb() >> 32;
158 spr_val = kvmppc_get_sprg0(vcpu);
161 spr_val = kvmppc_get_sprg1(vcpu);
164 spr_val = kvmppc_get_sprg2(vcpu);
167 spr_val = kvmppc_get_sprg3(vcpu);
169 /* Note: SPRG4-7 are user-readable, so we don't get
173 spr_val = kvmppc_get_dec(vcpu, get_tb());
176 emulated = vcpu->kvm->arch.kvm_ops->emulate_mfspr(vcpu, sprn,
178 if (unlikely(emulated == EMULATE_FAIL)) {
179 printk(KERN_INFO "mfspr: unknown spr "
185 if (emulated == EMULATE_DONE)
186 kvmppc_set_gpr(vcpu, rt, spr_val);
187 kvmppc_set_exit_type(vcpu, EMULATED_MFSPR_EXITS);
192 /* XXX Should probably auto-generate instruction decoding for a particular core
193 * from opcode tables in the future. */
194 int kvmppc_emulate_instruction(struct kvm_vcpu *vcpu)
198 enum emulation_result emulated;
201 /* this default type might be overwritten by subcategories */
202 kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS);
204 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst);
205 if (emulated != EMULATE_DONE)
208 pr_debug("Emulating opcode %d / %d\n", get_op(inst), get_xop(inst));
212 sprn = get_sprn(inst);
214 switch (get_op(inst)) {
216 #ifdef CONFIG_PPC_BOOK3S
218 kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP);
220 kvmppc_core_queue_program(vcpu,
221 vcpu->arch.shared->esr | ESR_PTR);
227 switch (get_xop(inst)) {
231 case OP_31_XOP_TRAP_64:
233 #ifdef CONFIG_PPC_BOOK3S
234 kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP);
236 kvmppc_core_queue_program(vcpu,
237 vcpu->arch.shared->esr | ESR_PTR);
242 case OP_31_XOP_MFSPR:
243 emulated = kvmppc_emulate_mfspr(vcpu, sprn, rt);
244 if (emulated == EMULATE_AGAIN) {
245 emulated = EMULATE_DONE;
250 case OP_31_XOP_MTSPR:
251 emulated = kvmppc_emulate_mtspr(vcpu, sprn, rs);
252 if (emulated == EMULATE_AGAIN) {
253 emulated = EMULATE_DONE;
258 case OP_31_XOP_TLBSYNC:
262 /* Attempt core-specific emulation below. */
263 emulated = EMULATE_FAIL;
269 * Instruction with primary opcode 0. Based on PowerISA
270 * these are illegal instructions.
272 if (inst == KVMPPC_INST_SW_BREAKPOINT) {
273 vcpu->run->exit_reason = KVM_EXIT_DEBUG;
274 vcpu->run->debug.arch.status = 0;
275 vcpu->run->debug.arch.address = kvmppc_get_pc(vcpu);
276 emulated = EMULATE_EXIT_USER;
279 emulated = EMULATE_FAIL;
284 emulated = EMULATE_FAIL;
287 if (emulated == EMULATE_FAIL) {
288 emulated = vcpu->kvm->arch.kvm_ops->emulate_op(vcpu, inst,
290 if (emulated == EMULATE_AGAIN) {
292 } else if (emulated == EMULATE_FAIL) {
294 printk(KERN_ERR "Couldn't emulate instruction 0x%08x "
295 "(op %d xop %d)\n", inst, get_op(inst), get_xop(inst));
299 trace_kvm_ppc_instr(inst, kvmppc_get_pc(vcpu), emulated);
301 /* Advance past emulated instruction. */
303 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);
307 EXPORT_SYMBOL_GPL(kvmppc_emulate_instruction);