1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * CCS static data binary format definitions
5 * Copyright 2019--2020 Intel Corporation
8 #ifndef __CCS_DATA_DEFS_H__
9 #define __CCS_DATA_DEFS_H__
13 #define CCS_STATIC_DATA_VERSION 0
15 enum __ccs_data_length_specifier_id {
16 CCS_DATA_LENGTH_SPECIFIER_1 = 0,
17 CCS_DATA_LENGTH_SPECIFIER_2 = 1,
18 CCS_DATA_LENGTH_SPECIFIER_3 = 2
21 #define CCS_DATA_LENGTH_SPECIFIER_SIZE_SHIFT 6
23 struct __ccs_data_length_specifier {
27 struct __ccs_data_length_specifier2 {
31 struct __ccs_data_length_specifier3 {
35 struct __ccs_data_block {
37 struct __ccs_data_length_specifier length;
40 #define CCS_DATA_BLOCK_HEADER_ID_VERSION_SHIFT 5
42 struct __ccs_data_block3 {
44 struct __ccs_data_length_specifier2 length;
47 struct __ccs_data_block4 {
49 struct __ccs_data_length_specifier3 length;
52 enum __ccs_data_block_id {
53 CCS_DATA_BLOCK_ID_DUMMY = 1,
54 CCS_DATA_BLOCK_ID_DATA_VERSION = 2,
55 CCS_DATA_BLOCK_ID_SENSOR_READ_ONLY_REGS = 3,
56 CCS_DATA_BLOCK_ID_MODULE_READ_ONLY_REGS = 4,
57 CCS_DATA_BLOCK_ID_SENSOR_MANUFACTURER_REGS = 5,
58 CCS_DATA_BLOCK_ID_MODULE_MANUFACTURER_REGS = 6,
59 CCS_DATA_BLOCK_ID_SENSOR_RULE_BASED_BLOCK = 32,
60 CCS_DATA_BLOCK_ID_MODULE_RULE_BASED_BLOCK = 33,
61 CCS_DATA_BLOCK_ID_SENSOR_PDAF_PIXEL_LOCATION = 36,
62 CCS_DATA_BLOCK_ID_MODULE_PDAF_PIXEL_LOCATION = 37,
63 CCS_DATA_BLOCK_ID_LICENSE = 40,
64 CCS_DATA_BLOCK_ID_END = 127,
67 struct __ccs_data_block_version {
68 u8 static_data_version_major[2];
69 u8 static_data_version_minor[2];
75 struct __ccs_data_block_regs {
79 #define CCS_DATA_BLOCK_REGS_ADDR_MASK 0x07
80 #define CCS_DATA_BLOCK_REGS_LEN_SHIFT 3
81 #define CCS_DATA_BLOCK_REGS_LEN_MASK 0x38
82 #define CCS_DATA_BLOCK_REGS_SEL_SHIFT 6
84 enum ccs_data_block_regs_sel {
85 CCS_DATA_BLOCK_REGS_SEL_REGS = 0,
86 CCS_DATA_BLOCK_REGS_SEL_REGS2 = 1,
87 CCS_DATA_BLOCK_REGS_SEL_REGS3 = 2,
90 struct __ccs_data_block_regs2 {
95 #define CCS_DATA_BLOCK_REGS_2_ADDR_MASK 0x01
96 #define CCS_DATA_BLOCK_REGS_2_LEN_SHIFT 1
97 #define CCS_DATA_BLOCK_REGS_2_LEN_MASK 0x3e
99 struct __ccs_data_block_regs3 {
104 #define CCS_DATA_BLOCK_REGS_3_LEN_MASK 0x3f
106 enum __ccs_data_ffd_pixelcode {
107 CCS_DATA_BLOCK_FFD_PIXELCODE_EMBEDDED = 1,
108 CCS_DATA_BLOCK_FFD_PIXELCODE_DUMMY = 2,
109 CCS_DATA_BLOCK_FFD_PIXELCODE_BLACK = 3,
110 CCS_DATA_BLOCK_FFD_PIXELCODE_DARK = 4,
111 CCS_DATA_BLOCK_FFD_PIXELCODE_VISIBLE = 5,
112 CCS_DATA_BLOCK_FFD_PIXELCODE_MS_0 = 8,
113 CCS_DATA_BLOCK_FFD_PIXELCODE_MS_1 = 9,
114 CCS_DATA_BLOCK_FFD_PIXELCODE_MS_2 = 10,
115 CCS_DATA_BLOCK_FFD_PIXELCODE_MS_3 = 11,
116 CCS_DATA_BLOCK_FFD_PIXELCODE_MS_4 = 12,
117 CCS_DATA_BLOCK_FFD_PIXELCODE_MS_5 = 13,
118 CCS_DATA_BLOCK_FFD_PIXELCODE_MS_6 = 14,
119 CCS_DATA_BLOCK_FFD_PIXELCODE_TOP_OB = 16,
120 CCS_DATA_BLOCK_FFD_PIXELCODE_BOTTOM_OB = 17,
121 CCS_DATA_BLOCK_FFD_PIXELCODE_LEFT_OB = 18,
122 CCS_DATA_BLOCK_FFD_PIXELCODE_RIGHT_OB = 19,
123 CCS_DATA_BLOCK_FFD_PIXELCODE_TOP_LEFT_OB = 20,
124 CCS_DATA_BLOCK_FFD_PIXELCODE_TOP_RIGHT_OB = 21,
125 CCS_DATA_BLOCK_FFD_PIXELCODE_BOTTOM_LEFT_OB = 22,
126 CCS_DATA_BLOCK_FFD_PIXELCODE_BOTTOM_RIGHT_OB = 23,
127 CCS_DATA_BLOCK_FFD_PIXELCODE_TOTAL = 24,
128 CCS_DATA_BLOCK_FFD_PIXELCODE_TOP_PDAF = 32,
129 CCS_DATA_BLOCK_FFD_PIXELCODE_BOTTOM_PDAF = 33,
130 CCS_DATA_BLOCK_FFD_PIXELCODE_LEFT_PDAF = 34,
131 CCS_DATA_BLOCK_FFD_PIXELCODE_RIGHT_PDAF = 35,
132 CCS_DATA_BLOCK_FFD_PIXELCODE_TOP_LEFT_PDAF = 36,
133 CCS_DATA_BLOCK_FFD_PIXELCODE_TOP_RIGHT_PDAF = 37,
134 CCS_DATA_BLOCK_FFD_PIXELCODE_BOTTOM_LEFT_PDAF = 38,
135 CCS_DATA_BLOCK_FFD_PIXELCODE_BOTTOM_RIGHT_PDAF = 39,
136 CCS_DATA_BLOCK_FFD_PIXELCODE_SEPARATED_PDAF = 40,
137 CCS_DATA_BLOCK_FFD_PIXELCODE_ORIGINAL_ORDER_PDAF = 41,
138 CCS_DATA_BLOCK_FFD_PIXELCODE_VENDOR_PDAF = 41,
141 struct __ccs_data_block_ffd_entry {
147 struct __ccs_data_block_ffd {
152 enum __ccs_data_block_rule_id {
153 CCS_DATA_BLOCK_RULE_ID_IF = 1,
154 CCS_DATA_BLOCK_RULE_ID_READ_ONLY_REGS = 2,
155 CCS_DATA_BLOCK_RULE_ID_FFD = 3,
156 CCS_DATA_BLOCK_RULE_ID_MSR = 4,
157 CCS_DATA_BLOCK_RULE_ID_PDAF_READOUT = 5,
160 struct __ccs_data_block_rule_if {
166 enum __ccs_data_block_pdaf_readout_order {
167 CCS_DATA_BLOCK_PDAF_READOUT_ORDER_ORIGINAL = 1,
168 CCS_DATA_BLOCK_PDAF_READOUT_ORDER_SEPARATE_WITHIN_LINE = 2,
169 CCS_DATA_BLOCK_PDAF_READOUT_ORDER_SEPARATE_TYPES_SEPARATE_LINES = 3,
172 struct __ccs_data_block_pdaf_readout {
173 u8 pdaf_readout_info_reserved;
174 u8 pdaf_readout_info_order;
177 struct __ccs_data_block_pdaf_pix_loc_block_desc {
182 struct __ccs_data_block_pdaf_pix_loc_block_desc_group {
183 u8 num_block_descs[2];
187 enum __ccs_data_block_pdaf_pix_loc_pixel_type {
188 CCS_DATA_PDAF_PIXEL_TYPE_LEFT_SEPARATED = 0,
189 CCS_DATA_PDAF_PIXEL_TYPE_RIGHT_SEPARATED = 1,
190 CCS_DATA_PDAF_PIXEL_TYPE_TOP_SEPARATED = 2,
191 CCS_DATA_PDAF_PIXEL_TYPE_BOTTOM_SEPARATED = 3,
192 CCS_DATA_PDAF_PIXEL_TYPE_LEFT_SIDE_BY_SIDE = 4,
193 CCS_DATA_PDAF_PIXEL_TYPE_RIGHT_SIDE_BY_SIDE = 5,
194 CCS_DATA_PDAF_PIXEL_TYPE_TOP_SIDE_BY_SIDE = 6,
195 CCS_DATA_PDAF_PIXEL_TYPE_BOTTOM_SIDE_BY_SIDE = 7,
196 CCS_DATA_PDAF_PIXEL_TYPE_TOP_LEFT = 8,
197 CCS_DATA_PDAF_PIXEL_TYPE_TOP_RIGHT = 9,
198 CCS_DATA_PDAF_PIXEL_TYPE_BOTTOM_LEFT = 10,
199 CCS_DATA_PDAF_PIXEL_TYPE_BOTTOM_RIGHT = 11,
202 struct __ccs_data_block_pdaf_pix_loc_pixel_desc {
208 struct __ccs_data_block_pdaf_pix_loc {
214 u8 num_block_desc_groups[2];
217 struct __ccs_data_block_end {
221 #endif /* __CCS_DATA_DEFS_H__ */