drivers/gpu/drm/tiny/cirrus.c

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright 2012-2019 Red Hat
   4  *
   5  * This file is subject to the terms and conditions of the GNU General
   6  * Public License version 2. See the file COPYING in the main
   7  * directory of this archive for more details.
   8  *
   9  * Authors: Matthew Garrett
  10  *          Dave Airlie
  11  *          Gerd Hoffmann
  12  *
  13  * Portions of this code derived from cirrusfb.c:
  14  * drivers/video/cirrusfb.c - driver for Cirrus Logic chipsets
  15  *
  16  * Copyright 1999-2001 Jeff Garzik <[email protected]>
  17  */
  18
  19 #include <linux/iosys-map.h>
  20 #include <linux/module.h>
  21 #include <linux/pci.h>
  22
  23 #include <video/cirrus.h>
  24 #include <video/vga.h>
  25
  26 #include <drm/drm_aperture.h>
  27 #include <drm/drm_atomic_helper.h>
  28 #include <drm/drm_atomic_state_helper.h>
  29 #include <drm/drm_connector.h>
  30 #include <drm/drm_damage_helper.h>
  31 #include <drm/drm_drv.h>
  32 #include <drm/drm_edid.h>
  33 #include <drm/drm_fb_helper.h>
  34 #include <drm/drm_file.h>
  35 #include <drm/drm_format_helper.h>
  36 #include <drm/drm_fourcc.h>
  37 #include <drm/drm_framebuffer.h>
  38 #include <drm/drm_gem_atomic_helper.h>
  39 #include <drm/drm_gem_framebuffer_helper.h>
  40 #include <drm/drm_gem_shmem_helper.h>
  41 #include <drm/drm_ioctl.h>
  42 #include <drm/drm_managed.h>
  43 #include <drm/drm_modeset_helper_vtables.h>
  44 #include <drm/drm_module.h>
  45 #include <drm/drm_probe_helper.h>
  46 #include <drm/drm_simple_kms_helper.h>
  47
  48 #define DRIVER_NAME "cirrus"
  49 #define DRIVER_DESC "qemu cirrus vga"
  50 #define DRIVER_DATE "2019"
  51 #define DRIVER_MAJOR 2
  52 #define DRIVER_MINOR 0
  53
  54 #define CIRRUS_MAX_PITCH (0x1FF << 3)      /* (4096 - 1) & ~111b bytes */
  55 #define CIRRUS_VRAM_SIZE (4 * 1024 * 1024) /* 4 MB */
  56
  57 struct cirrus_device {
  58         struct drm_device              dev;
  59         struct drm_simple_display_pipe pipe;
  60         struct drm_connector           conn;
  61         unsigned int                   cpp;
  62         unsigned int                   pitch;
  63         void __iomem                   *vram;
  64         void __iomem                   *mmio;
  65 };
  66
  67 #define to_cirrus(_dev) container_of(_dev, struct cirrus_device, dev)
  68
  69 /* ------------------------------------------------------------------ */
  70 /*
  71  * The meat of this driver. The core passes us a mode and we have to program
  72  * it. The modesetting here is the bare minimum required to satisfy the qemu
  73  * emulation of this hardware, and running this against a real device is
  74  * likely to result in an inadequately programmed mode. We've already had
  75  * the opportunity to modify the mode, so whatever we receive here should
  76  * be something that can be correctly programmed and displayed
  77  */
  78
  79 #define SEQ_INDEX 4
  80 #define SEQ_DATA 5
  81
  82 static u8 rreg_seq(struct cirrus_device *cirrus, u8 reg)
  83 {
  84         iowrite8(reg, cirrus->mmio + SEQ_INDEX);
  85         return ioread8(cirrus->mmio + SEQ_DATA);
  86 }
  87
  88 static void wreg_seq(struct cirrus_device *cirrus, u8 reg, u8 val)
  89 {
  90         iowrite8(reg, cirrus->mmio + SEQ_INDEX);
  91         iowrite8(val, cirrus->mmio + SEQ_DATA);
  92 }
  93
  94 #define CRT_INDEX 0x14
  95 #define CRT_DATA 0x15
  96
  97 static u8 rreg_crt(struct cirrus_device *cirrus, u8 reg)
  98 {
  99         iowrite8(reg, cirrus->mmio + CRT_INDEX);
 100         return ioread8(cirrus->mmio + CRT_DATA);
 101 }
 102
 103 static void wreg_crt(struct cirrus_device *cirrus, u8 reg, u8 val)
 104 {
 105         iowrite8(reg, cirrus->mmio + CRT_INDEX);
 106         iowrite8(val, cirrus->mmio + CRT_DATA);
 107 }
 108
 109 #define GFX_INDEX 0xe
 110 #define GFX_DATA 0xf
 111
 112 static void wreg_gfx(struct cirrus_device *cirrus, u8 reg, u8 val)
 113 {
 114         iowrite8(reg, cirrus->mmio + GFX_INDEX);
 115         iowrite8(val, cirrus->mmio + GFX_DATA);
 116 }
 117
 118 #define VGA_DAC_MASK  0x06
 119
 120 static void wreg_hdr(struct cirrus_device *cirrus, u8 val)
 121 {
 122         ioread8(cirrus->mmio + VGA_DAC_MASK);
 123         ioread8(cirrus->mmio + VGA_DAC_MASK);
 124         ioread8(cirrus->mmio + VGA_DAC_MASK);
 125         ioread8(cirrus->mmio + VGA_DAC_MASK);
 126         iowrite8(val, cirrus->mmio + VGA_DAC_MASK);
 127 }
 128
 129 static int cirrus_convert_to(struct drm_framebuffer *fb)
 130 {
 131         if (fb->format->cpp[0] == 4 && fb->pitches[0] > CIRRUS_MAX_PITCH) {
 132                 if (fb->width * 3 <= CIRRUS_MAX_PITCH)
 133                         /* convert from XR24 to RG24 */
 134                         return 3;
 135                 else
 136                         /* convert from XR24 to RG16 */
 137                         return 2;
 138         }
 139         return 0;
 140 }
 141
 142 static int cirrus_cpp(struct drm_framebuffer *fb)
 143 {
 144         int convert_cpp = cirrus_convert_to(fb);
 145
 146         if (convert_cpp)
 147                 return convert_cpp;
 148         return fb->format->cpp[0];
 149 }
 150
 151 static int cirrus_pitch(struct drm_framebuffer *fb)
 152 {
 153         int convert_cpp = cirrus_convert_to(fb);
 154
 155         if (convert_cpp)
 156                 return convert_cpp * fb->width;
 157         return fb->pitches[0];
 158 }
 159
 160 static void cirrus_set_start_address(struct cirrus_device *cirrus, u32 offset)
 161 {
 162         int idx;
 163         u32 addr;
 164         u8 tmp;
 165
 166         if (!drm_dev_enter(&cirrus->dev, &idx))
 167                 return;
 168
 169         addr = offset >> 2;
 170         wreg_crt(cirrus, 0x0c, (u8)((addr >> 8) & 0xff));
 171         wreg_crt(cirrus, 0x0d, (u8)(addr & 0xff));
 172
 173         tmp = rreg_crt(cirrus, 0x1b);
 174         tmp &= 0xf2;
 175         tmp |= (addr >> 16) & 0x01;
 176         tmp |= (addr >> 15) & 0x0c;
 177         wreg_crt(cirrus, 0x1b, tmp);
 178
 179         tmp = rreg_crt(cirrus, 0x1d);
 180         tmp &= 0x7f;
 181         tmp |= (addr >> 12) & 0x80;
 182         wreg_crt(cirrus, 0x1d, tmp);
 183
 184         drm_dev_exit(idx);
 185 }
 186
 187 static int cirrus_mode_set(struct cirrus_device *cirrus,
 188                            struct drm_display_mode *mode,
 189                            struct drm_framebuffer *fb)
 190 {
 191         int hsyncstart, hsyncend, htotal, hdispend;
 192         int vtotal, vdispend;
 193         int tmp, idx;
 194         int sr07 = 0, hdr = 0;
 195
 196         if (!drm_dev_enter(&cirrus->dev, &idx))
 197                 return -1;
 198
 199         htotal = mode->htotal / 8;
 200         hsyncend = mode->hsync_end / 8;
 201         hsyncstart = mode->hsync_start / 8;
 202         hdispend = mode->hdisplay / 8;
 203
 204         vtotal = mode->vtotal;
 205         vdispend = mode->vdisplay;
 206
 207         vdispend -= 1;
 208         vtotal -= 2;
 209
 210         htotal -= 5;
 211         hdispend -= 1;
 212         hsyncstart += 1;
 213         hsyncend += 1;
 214
 215         wreg_crt(cirrus, VGA_CRTC_V_SYNC_END, 0x20);
 216         wreg_crt(cirrus, VGA_CRTC_H_TOTAL, htotal);
 217         wreg_crt(cirrus, VGA_CRTC_H_DISP, hdispend);
 218         wreg_crt(cirrus, VGA_CRTC_H_SYNC_START, hsyncstart);
 219         wreg_crt(cirrus, VGA_CRTC_H_SYNC_END, hsyncend);
 220         wreg_crt(cirrus, VGA_CRTC_V_TOTAL, vtotal & 0xff);
 221         wreg_crt(cirrus, VGA_CRTC_V_DISP_END, vdispend & 0xff);
 222
 223         tmp = 0x40;
 224         if ((vdispend + 1) & 512)
 225                 tmp |= 0x20;
 226         wreg_crt(cirrus, VGA_CRTC_MAX_SCAN, tmp);
 227
 228         /*
 229          * Overflow bits for values that don't fit in the standard registers
 230          */
 231         tmp = 0x10;
 232         if (vtotal & 0x100)
 233                 tmp |= 0x01;
 234         if (vdispend & 0x100)
 235                 tmp |= 0x02;
 236         if ((vdispend + 1) & 0x100)
 237                 tmp |= 0x08;
 238         if (vtotal & 0x200)
 239                 tmp |= 0x20;
 240         if (vdispend & 0x200)
 241                 tmp |= 0x40;
 242         wreg_crt(cirrus, VGA_CRTC_OVERFLOW, tmp);
 243
 244         tmp = 0;
 245
 246         /* More overflow bits */
 247
 248         if ((htotal + 5) & 0x40)
 249                 tmp |= 0x10;
 250         if ((htotal + 5) & 0x80)
 251                 tmp |= 0x20;
 252         if (vtotal & 0x100)
 253                 tmp |= 0x40;
 254         if (vtotal & 0x200)
 255                 tmp |= 0x80;
 256
 257         wreg_crt(cirrus, CL_CRT1A, tmp);
 258
 259         /* Disable Hercules/CGA compatibility */
 260         wreg_crt(cirrus, VGA_CRTC_MODE, 0x03);
 261
 262         sr07 = rreg_seq(cirrus, 0x07);
 263         sr07 &= 0xe0;
 264         hdr = 0;
 265
 266         cirrus->cpp = cirrus_cpp(fb);
 267         switch (cirrus->cpp * 8) {
 268         case 8:
 269                 sr07 |= 0x11;
 270                 break;
 271         case 16:
 272                 sr07 |= 0x17;
 273                 hdr = 0xc1;
 274                 break;
 275         case 24:
 276                 sr07 |= 0x15;
 277                 hdr = 0xc5;
 278                 break;
 279         case 32:
 280                 sr07 |= 0x19;
 281                 hdr = 0xc5;
 282                 break;
 283         default:
 284                 drm_dev_exit(idx);
 285                 return -1;
 286         }
 287
 288         wreg_seq(cirrus, 0x7, sr07);
 289
 290         /* Program the pitch */
 291         cirrus->pitch = cirrus_pitch(fb);
 292         tmp = cirrus->pitch / 8;
 293         wreg_crt(cirrus, VGA_CRTC_OFFSET, tmp);
 294
 295         /* Enable extended blanking and pitch bits, and enable full memory */
 296         tmp = 0x22;
 297         tmp |= (cirrus->pitch >> 7) & 0x10;
 298         tmp |= (cirrus->pitch >> 6) & 0x40;
 299         wreg_crt(cirrus, 0x1b, tmp);
 300
 301         /* Enable high-colour modes */
 302         wreg_gfx(cirrus, VGA_GFX_MODE, 0x40);
 303
 304         /* And set graphics mode */
 305         wreg_gfx(cirrus, VGA_GFX_MISC, 0x01);
 306
 307         wreg_hdr(cirrus, hdr);
 308
 309         cirrus_set_start_address(cirrus, 0);
 310
 311         /* Unblank (needed on S3 resume, vgabios doesn't do it then) */
 312         outb(0x20, 0x3c0);
 313
 314         drm_dev_exit(idx);
 315         return 0;
 316 }
 317
 318 static int cirrus_fb_blit_rect(struct drm_framebuffer *fb,
 319                                const struct iosys_map *map,
 320                                struct drm_rect *rect)
 321 {
 322         struct cirrus_device *cirrus = to_cirrus(fb->dev);
 323         void __iomem *dst = cirrus->vram;
 324         void *vmap = map->vaddr; /* TODO: Use mapping abstraction properly */
 325         int idx;
 326
 327         if (!drm_dev_enter(&cirrus->dev, &idx))
 328                 return -ENODEV;
 329
 330         if (cirrus->cpp == fb->format->cpp[0]) {
 331                 dst += drm_fb_clip_offset(fb->pitches[0], fb->format, rect);
 332                 drm_fb_memcpy_toio(dst, fb->pitches[0], vmap, fb, rect);
 333
 334         } else if (fb->format->cpp[0] == 4 && cirrus->cpp == 2) {
 335                 dst += drm_fb_clip_offset(cirrus->pitch, fb->format, rect);
 336                 drm_fb_xrgb8888_to_rgb565_toio(dst, cirrus->pitch, vmap, fb, rect, false);
 337
 338         } else if (fb->format->cpp[0] == 4 && cirrus->cpp == 3) {
 339                 dst += drm_fb_clip_offset(cirrus->pitch, fb->format, rect);
 340                 drm_fb_xrgb8888_to_rgb888_toio(dst, cirrus->pitch, vmap, fb, rect);
 341
 342         } else {
 343                 WARN_ON_ONCE("cpp mismatch");
 344         }
 345
 346         drm_dev_exit(idx);
 347
 348         return 0;
 349 }
 350
 351 static int cirrus_fb_blit_fullscreen(struct drm_framebuffer *fb,
 352                                      const struct iosys_map *map)
 353 {
 354         struct drm_rect fullscreen = {
 355                 .x1 = 0,
 356                 .x2 = fb->width,
 357                 .y1 = 0,
 358                 .y2 = fb->height,
 359         };
 360         return cirrus_fb_blit_rect(fb, map, &fullscreen);
 361 }
 362
 363 static int cirrus_check_size(int width, int height,
 364                              struct drm_framebuffer *fb)
 365 {
 366         int pitch = width * 2;
 367
 368         if (fb)
 369                 pitch = cirrus_pitch(fb);
 370
 371         if (pitch > CIRRUS_MAX_PITCH)
 372                 return -EINVAL;
 373         if (pitch * height > CIRRUS_VRAM_SIZE)
 374                 return -EINVAL;
 375         return 0;
 376 }
 377
 378 /* ------------------------------------------------------------------ */
 379 /* cirrus connector                                                   */
 380
 381 static int cirrus_conn_get_modes(struct drm_connector *conn)
 382 {
 383         int count;
 384
 385         count = drm_add_modes_noedid(conn,
 386                                      conn->dev->mode_config.max_width,
 387                                      conn->dev->mode_config.max_height);
 388         drm_set_preferred_mode(conn, 1024, 768);
 389         return count;
 390 }
 391
 392 static const struct drm_connector_helper_funcs cirrus_conn_helper_funcs = {
 393         .get_modes = cirrus_conn_get_modes,
 394 };
 395
 396 static const struct drm_connector_funcs cirrus_conn_funcs = {
 397         .fill_modes = drm_helper_probe_single_connector_modes,
 398         .destroy = drm_connector_cleanup,
 399         .reset = drm_atomic_helper_connector_reset,
 400         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 401         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 402 };
 403
 404 static int cirrus_conn_init(struct cirrus_device *cirrus)
 405 {
 406         drm_connector_helper_add(&cirrus->conn, &cirrus_conn_helper_funcs);
 407         return drm_connector_init(&cirrus->dev, &cirrus->conn,
 408                                   &cirrus_conn_funcs, DRM_MODE_CONNECTOR_VGA);
 409
 410 }
 411
 412 /* ------------------------------------------------------------------ */
 413 /* cirrus (simple) display pipe                                       */
 414
 415 static enum drm_mode_status cirrus_pipe_mode_valid(struct drm_simple_display_pipe *pipe,
 416                                                    const struct drm_display_mode *mode)
 417 {
 418         if (cirrus_check_size(mode->hdisplay, mode->vdisplay, NULL) < 0)
 419                 return MODE_BAD;
 420         return MODE_OK;
 421 }
 422
 423 static int cirrus_pipe_check(struct drm_simple_display_pipe *pipe,
 424                              struct drm_plane_state *plane_state,
 425                              struct drm_crtc_state *crtc_state)
 426 {
 427         struct drm_framebuffer *fb = plane_state->fb;
 428
 429         if (!fb)
 430                 return 0;
 431         return cirrus_check_size(fb->width, fb->height, fb);
 432 }
 433
 434 static void cirrus_pipe_enable(struct drm_simple_display_pipe *pipe,
 435                                struct drm_crtc_state *crtc_state,
 436                                struct drm_plane_state *plane_state)
 437 {
 438         struct cirrus_device *cirrus = to_cirrus(pipe->crtc.dev);
 439         struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state);
 440
 441         cirrus_mode_set(cirrus, &crtc_state->mode, plane_state->fb);
 442         cirrus_fb_blit_fullscreen(plane_state->fb, &shadow_plane_state->data[0]);
 443 }
 444
 445 static void cirrus_pipe_update(struct drm_simple_display_pipe *pipe,
 446                                struct drm_plane_state *old_state)
 447 {
 448         struct cirrus_device *cirrus = to_cirrus(pipe->crtc.dev);
 449         struct drm_plane_state *state = pipe->plane.state;
 450         struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(state);
 451         struct drm_crtc *crtc = &pipe->crtc;
 452         struct drm_rect rect;
 453
 454         if (state->fb && cirrus->cpp != cirrus_cpp(state->fb))
 455                 cirrus_mode_set(cirrus, &crtc->mode, state->fb);
 456
 457         if (drm_atomic_helper_damage_merged(old_state, state, &rect))
 458                 cirrus_fb_blit_rect(state->fb, &shadow_plane_state->data[0], &rect);
 459 }
 460
 461 static const struct drm_simple_display_pipe_funcs cirrus_pipe_funcs = {
 462         .mode_valid = cirrus_pipe_mode_valid,
 463         .check      = cirrus_pipe_check,
 464         .enable     = cirrus_pipe_enable,
 465         .update     = cirrus_pipe_update,
 466         DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCS,
 467 };
 468
 469 static const uint32_t cirrus_formats[] = {
 470         DRM_FORMAT_RGB565,
 471         DRM_FORMAT_RGB888,
 472         DRM_FORMAT_XRGB8888,
 473 };
 474
 475 static const uint64_t cirrus_modifiers[] = {
 476         DRM_FORMAT_MOD_LINEAR,
 477         DRM_FORMAT_MOD_INVALID
 478 };
 479
 480 static int cirrus_pipe_init(struct cirrus_device *cirrus)
 481 {
 482         return drm_simple_display_pipe_init(&cirrus->dev,
 483                                             &cirrus->pipe,
 484                                             &cirrus_pipe_funcs,
 485                                             cirrus_formats,
 486                                             ARRAY_SIZE(cirrus_formats),
 487                                             cirrus_modifiers,
 488                                             &cirrus->conn);
 489 }
 490
 491 /* ------------------------------------------------------------------ */
 492 /* cirrus framebuffers & mode config                                  */
 493
 494 static struct drm_framebuffer*
 495 cirrus_fb_create(struct drm_device *dev, struct drm_file *file_priv,
 496                  const struct drm_mode_fb_cmd2 *mode_cmd)
 497 {
 498         if (mode_cmd->pixel_format != DRM_FORMAT_RGB565 &&
 499             mode_cmd->pixel_format != DRM_FORMAT_RGB888 &&
 500             mode_cmd->pixel_format != DRM_FORMAT_XRGB8888)
 501                 return ERR_PTR(-EINVAL);
 502         if (cirrus_check_size(mode_cmd->width, mode_cmd->height, NULL) < 0)
 503                 return ERR_PTR(-EINVAL);
 504         return drm_gem_fb_create_with_dirty(dev, file_priv, mode_cmd);
 505 }
 506
 507 static const struct drm_mode_config_funcs cirrus_mode_config_funcs = {
 508         .fb_create = cirrus_fb_create,
 509         .atomic_check = drm_atomic_helper_check,
 510         .atomic_commit = drm_atomic_helper_commit,
 511 };
 512
 513 static int cirrus_mode_config_init(struct cirrus_device *cirrus)
 514 {
 515         struct drm_device *dev = &cirrus->dev;
 516         int ret;
 517
 518         ret = drmm_mode_config_init(dev);
 519         if (ret)
 520                 return ret;
 521
 522         dev->mode_config.min_width = 0;
 523         dev->mode_config.min_height = 0;
 524         dev->mode_config.max_width = CIRRUS_MAX_PITCH / 2;
 525         dev->mode_config.max_height = 1024;
 526         dev->mode_config.preferred_depth = 16;
 527         dev->mode_config.prefer_shadow = 0;
 528         dev->mode_config.funcs = &cirrus_mode_config_funcs;
 529
 530         return 0;
 531 }
 532
 533 /* ------------------------------------------------------------------ */
 534
 535 DEFINE_DRM_GEM_FOPS(cirrus_fops);
 536
 537 static const struct drm_driver cirrus_driver = {
 538         .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
 539
 540         .name            = DRIVER_NAME,
 541         .desc            = DRIVER_DESC,
 542         .date            = DRIVER_DATE,
 543         .major           = DRIVER_MAJOR,
 544         .minor           = DRIVER_MINOR,
 545
 546         .fops            = &cirrus_fops,
 547         DRM_GEM_SHMEM_DRIVER_OPS,
 548 };
 549
 550 static int cirrus_pci_probe(struct pci_dev *pdev,
 551                             const struct pci_device_id *ent)
 552 {
 553         struct drm_device *dev;
 554         struct cirrus_device *cirrus;
 555         int ret;
 556
 557         ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &cirrus_driver);
 558         if (ret)
 559                 return ret;
 560
 561         ret = pcim_enable_device(pdev);
 562         if (ret)
 563                 return ret;
 564
 565         ret = pci_request_regions(pdev, DRIVER_NAME);
 566         if (ret)
 567                 return ret;
 568
 569         ret = -ENOMEM;
 570         cirrus = devm_drm_dev_alloc(&pdev->dev, &cirrus_driver,
 571                                     struct cirrus_device, dev);
 572         if (IS_ERR(cirrus))
 573                 return PTR_ERR(cirrus);
 574
 575         dev = &cirrus->dev;
 576
 577         cirrus->vram = devm_ioremap(&pdev->dev, pci_resource_start(pdev, 0),
 578                                     pci_resource_len(pdev, 0));
 579         if (cirrus->vram == NULL)
 580                 return -ENOMEM;
 581
 582         cirrus->mmio = devm_ioremap(&pdev->dev, pci_resource_start(pdev, 1),
 583                                     pci_resource_len(pdev, 1));
 584         if (cirrus->mmio == NULL)
 585                 return -ENOMEM;
 586
 587         ret = cirrus_mode_config_init(cirrus);
 588         if (ret)
 589                 return ret;
 590
 591         ret = cirrus_conn_init(cirrus);
 592         if (ret < 0)
 593                 return ret;
 594
 595         ret = cirrus_pipe_init(cirrus);
 596         if (ret < 0)
 597                 return ret;
 598
 599         drm_mode_config_reset(dev);
 600
 601         pci_set_drvdata(pdev, dev);
 602         ret = drm_dev_register(dev, 0);
 603         if (ret)
 604                 return ret;
 605
 606         drm_fbdev_generic_setup(dev, dev->mode_config.preferred_depth);
 607         return 0;
 608 }
 609
 610 static void cirrus_pci_remove(struct pci_dev *pdev)
 611 {
 612         struct drm_device *dev = pci_get_drvdata(pdev);
 613
 614         drm_dev_unplug(dev);
 615         drm_atomic_helper_shutdown(dev);
 616 }
 617
 618 static const struct pci_device_id pciidlist[] = {
 619         {
 620                 .vendor    = PCI_VENDOR_ID_CIRRUS,
 621                 .device    = PCI_DEVICE_ID_CIRRUS_5446,
 622                 /* only bind to the cirrus chip in qemu */
 623                 .subvendor = PCI_SUBVENDOR_ID_REDHAT_QUMRANET,
 624                 .subdevice = PCI_SUBDEVICE_ID_QEMU,
 625         }, {
 626                 .vendor    = PCI_VENDOR_ID_CIRRUS,
 627                 .device    = PCI_DEVICE_ID_CIRRUS_5446,
 628                 .subvendor = PCI_VENDOR_ID_XEN,
 629                 .subdevice = 0x0001,
 630         },
 631         { /* end if list */ }
 632 };
 633
 634 static struct pci_driver cirrus_pci_driver = {
 635         .name = DRIVER_NAME,
 636         .id_table = pciidlist,
 637         .probe = cirrus_pci_probe,
 638         .remove = cirrus_pci_remove,
 639 };
 640
 641 drm_module_pci_driver(cirrus_pci_driver)
 642
 643 MODULE_DEVICE_TABLE(pci, pciidlist);
 644 MODULE_LICENSE("GPL");