1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015 MediaTek Inc.
8 #include <linux/clk-provider.h>
9 #include <linux/component.h>
10 #include <linux/iommu.h>
11 #include <linux/module.h>
12 #include <linux/of_address.h>
13 #include <linux/of_platform.h>
14 #include <linux/pm_runtime.h>
15 #include <linux/dma-mapping.h>
17 #include <drm/drm_atomic.h>
18 #include <drm/drm_atomic_helper.h>
19 #include <drm/drm_drv.h>
20 #include <drm/drm_fb_helper.h>
21 #include <drm/drm_fourcc.h>
22 #include <drm/drm_gem.h>
23 #include <drm/drm_gem_cma_helper.h>
24 #include <drm/drm_gem_framebuffer_helper.h>
25 #include <drm/drm_of.h>
26 #include <drm/drm_probe_helper.h>
27 #include <drm/drm_vblank.h>
29 #include "mtk_drm_crtc.h"
30 #include "mtk_drm_ddp_comp.h"
31 #include "mtk_drm_drv.h"
32 #include "mtk_drm_gem.h"
34 #define DRIVER_NAME "mediatek"
35 #define DRIVER_DESC "Mediatek SoC DRM"
36 #define DRIVER_DATE "20150513"
37 #define DRIVER_MAJOR 1
38 #define DRIVER_MINOR 0
40 static const struct drm_mode_config_helper_funcs mtk_drm_mode_config_helpers = {
41 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
44 static struct drm_framebuffer *
45 mtk_drm_mode_fb_create(struct drm_device *dev,
46 struct drm_file *file,
47 const struct drm_mode_fb_cmd2 *cmd)
49 const struct drm_format_info *info = drm_get_format_info(dev, cmd);
51 if (info->num_planes != 1)
52 return ERR_PTR(-EINVAL);
54 return drm_gem_fb_create(dev, file, cmd);
57 static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = {
58 .fb_create = mtk_drm_mode_fb_create,
59 .atomic_check = drm_atomic_helper_check,
60 .atomic_commit = drm_atomic_helper_commit,
63 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = {
71 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = {
76 static const enum mtk_ddp_comp_id mt7623_mtk_ddp_main[] = {
84 static const enum mtk_ddp_comp_id mt7623_mtk_ddp_ext[] = {
89 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
99 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = {
101 DDP_COMPONENT_COLOR1,
109 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_third[] = {
115 static enum mtk_ddp_comp_id mt8167_mtk_ddp_main[] = {
117 DDP_COMPONENT_COLOR0,
121 DDP_COMPONENT_DITHER0,
126 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
128 DDP_COMPONENT_COLOR0,
137 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = {
139 DDP_COMPONENT_COLOR1,
145 static const enum mtk_ddp_comp_id mt8183_mtk_ddp_main[] = {
147 DDP_COMPONENT_OVL_2L0,
149 DDP_COMPONENT_COLOR0,
153 DDP_COMPONENT_DITHER0,
157 static const enum mtk_ddp_comp_id mt8183_mtk_ddp_ext[] = {
158 DDP_COMPONENT_OVL_2L1,
163 static const enum mtk_ddp_comp_id mt8186_mtk_ddp_main[] = {
166 DDP_COMPONENT_COLOR0,
170 DDP_COMPONENT_POSTMASK0,
171 DDP_COMPONENT_DITHER0,
175 static const enum mtk_ddp_comp_id mt8186_mtk_ddp_ext[] = {
176 DDP_COMPONENT_OVL_2L0,
181 static const enum mtk_ddp_comp_id mt8192_mtk_ddp_main[] = {
183 DDP_COMPONENT_OVL_2L0,
185 DDP_COMPONENT_COLOR0,
189 DDP_COMPONENT_POSTMASK0,
190 DDP_COMPONENT_DITHER0,
194 static const enum mtk_ddp_comp_id mt8192_mtk_ddp_ext[] = {
195 DDP_COMPONENT_OVL_2L2,
200 static const enum mtk_ddp_comp_id mt8195_mtk_ddp_main[] = {
203 DDP_COMPONENT_COLOR0,
207 DDP_COMPONENT_DITHER0,
209 DDP_COMPONENT_MERGE0,
210 DDP_COMPONENT_DP_INTF0,
213 static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
214 .main_path = mt2701_mtk_ddp_main,
215 .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main),
216 .ext_path = mt2701_mtk_ddp_ext,
217 .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext),
218 .shadow_register = true,
221 static const struct mtk_mmsys_match_data mt2701_mmsys_match_data = {
224 &mt2701_mmsys_driver_data,
228 static const struct mtk_mmsys_driver_data mt7623_mmsys_driver_data = {
229 .main_path = mt7623_mtk_ddp_main,
230 .main_len = ARRAY_SIZE(mt7623_mtk_ddp_main),
231 .ext_path = mt7623_mtk_ddp_ext,
232 .ext_len = ARRAY_SIZE(mt7623_mtk_ddp_ext),
233 .shadow_register = true,
236 static const struct mtk_mmsys_match_data mt7623_mmsys_match_data = {
239 &mt7623_mmsys_driver_data,
243 static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
244 .main_path = mt2712_mtk_ddp_main,
245 .main_len = ARRAY_SIZE(mt2712_mtk_ddp_main),
246 .ext_path = mt2712_mtk_ddp_ext,
247 .ext_len = ARRAY_SIZE(mt2712_mtk_ddp_ext),
248 .third_path = mt2712_mtk_ddp_third,
249 .third_len = ARRAY_SIZE(mt2712_mtk_ddp_third),
252 static const struct mtk_mmsys_match_data mt2712_mmsys_match_data = {
255 &mt2712_mmsys_driver_data,
259 static const struct mtk_mmsys_driver_data mt8167_mmsys_driver_data = {
260 .main_path = mt8167_mtk_ddp_main,
261 .main_len = ARRAY_SIZE(mt8167_mtk_ddp_main),
264 static const struct mtk_mmsys_match_data mt8167_mmsys_match_data = {
267 &mt8167_mmsys_driver_data,
271 static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
272 .main_path = mt8173_mtk_ddp_main,
273 .main_len = ARRAY_SIZE(mt8173_mtk_ddp_main),
274 .ext_path = mt8173_mtk_ddp_ext,
275 .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext),
278 static const struct mtk_mmsys_match_data mt8173_mmsys_match_data = {
281 &mt8173_mmsys_driver_data,
285 static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = {
286 .main_path = mt8183_mtk_ddp_main,
287 .main_len = ARRAY_SIZE(mt8183_mtk_ddp_main),
288 .ext_path = mt8183_mtk_ddp_ext,
289 .ext_len = ARRAY_SIZE(mt8183_mtk_ddp_ext),
292 static const struct mtk_mmsys_match_data mt8183_mmsys_match_data = {
295 &mt8183_mmsys_driver_data,
299 static const struct mtk_mmsys_driver_data mt8186_mmsys_driver_data = {
300 .main_path = mt8186_mtk_ddp_main,
301 .main_len = ARRAY_SIZE(mt8186_mtk_ddp_main),
302 .ext_path = mt8186_mtk_ddp_ext,
303 .ext_len = ARRAY_SIZE(mt8186_mtk_ddp_ext),
306 static const struct mtk_mmsys_match_data mt8186_mmsys_match_data = {
309 &mt8186_mmsys_driver_data,
313 static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = {
314 .main_path = mt8192_mtk_ddp_main,
315 .main_len = ARRAY_SIZE(mt8192_mtk_ddp_main),
316 .ext_path = mt8192_mtk_ddp_ext,
317 .ext_len = ARRAY_SIZE(mt8192_mtk_ddp_ext),
320 static const struct mtk_mmsys_match_data mt8192_mmsys_match_data = {
323 &mt8192_mmsys_driver_data,
327 static const struct mtk_mmsys_driver_data mt8195_vdosys0_driver_data = {
328 .io_start = 0x1c01a000,
329 .main_path = mt8195_mtk_ddp_main,
330 .main_len = ARRAY_SIZE(mt8195_mtk_ddp_main),
333 static const struct mtk_mmsys_driver_data mt8195_vdosys1_driver_data = {
334 .io_start = 0x1c100000,
337 static const struct mtk_mmsys_match_data mt8195_mmsys_match_data = {
340 &mt8195_vdosys0_driver_data,
341 &mt8195_vdosys1_driver_data,
345 static int mtk_drm_kms_init(struct drm_device *drm)
347 struct mtk_drm_private *private = drm->dev_private;
348 struct platform_device *pdev;
349 struct device_node *np;
350 struct device *dma_dev;
353 if (drm_firmware_drivers_only())
356 if (!iommu_present(&platform_bus_type))
357 return -EPROBE_DEFER;
359 pdev = of_find_device_by_node(private->mutex_node);
361 dev_err(drm->dev, "Waiting for disp-mutex device %pOF\n",
362 private->mutex_node);
363 of_node_put(private->mutex_node);
364 return -EPROBE_DEFER;
366 private->mutex_dev = &pdev->dev;
368 ret = drmm_mode_config_init(drm);
372 drm->mode_config.min_width = 64;
373 drm->mode_config.min_height = 64;
376 * set max width and height as default value(4096x4096).
377 * this value would be used to check framebuffer size limitation
378 * at drm_mode_addfb().
380 drm->mode_config.max_width = 4096;
381 drm->mode_config.max_height = 4096;
382 drm->mode_config.funcs = &mtk_drm_mode_config_funcs;
383 drm->mode_config.helper_private = &mtk_drm_mode_config_helpers;
385 ret = component_bind_all(drm->dev, drm);
390 * We currently support two fixed data streams, each optional,
391 * and each statically assigned to a crtc:
392 * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ...
394 ret = mtk_drm_crtc_create(drm, private->data->main_path,
395 private->data->main_len);
397 goto err_component_unbind;
398 /* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */
399 ret = mtk_drm_crtc_create(drm, private->data->ext_path,
400 private->data->ext_len);
402 goto err_component_unbind;
404 ret = mtk_drm_crtc_create(drm, private->data->third_path,
405 private->data->third_len);
407 goto err_component_unbind;
409 /* Use OVL device for all DMA memory allocations */
410 np = private->comp_node[private->data->main_path[0]] ?:
411 private->comp_node[private->data->ext_path[0]];
412 pdev = of_find_device_by_node(np);
415 dev_err(drm->dev, "Need at least one OVL device\n");
416 goto err_component_unbind;
419 dma_dev = &pdev->dev;
420 private->dma_dev = dma_dev;
423 * Configure the DMA segment size to make sure we get contiguous IOVA
424 * when importing PRIME buffers.
426 ret = dma_set_max_seg_size(dma_dev, UINT_MAX);
428 dev_err(dma_dev, "Failed to set DMA segment size\n");
429 goto err_component_unbind;
432 ret = drm_vblank_init(drm, MAX_CRTC);
434 goto err_component_unbind;
436 drm_kms_helper_poll_init(drm);
437 drm_mode_config_reset(drm);
441 err_component_unbind:
442 component_unbind_all(drm->dev, drm);
444 put_device(private->mutex_dev);
448 static void mtk_drm_kms_deinit(struct drm_device *drm)
450 drm_kms_helper_poll_fini(drm);
451 drm_atomic_helper_shutdown(drm);
453 component_unbind_all(drm->dev, drm);
456 DEFINE_DRM_GEM_FOPS(mtk_drm_fops);
459 * We need to override this because the device used to import the memory is
460 * not dev->dev, as drm_gem_prime_import() expects.
462 static struct drm_gem_object *mtk_drm_gem_prime_import(struct drm_device *dev,
463 struct dma_buf *dma_buf)
465 struct mtk_drm_private *private = dev->dev_private;
467 return drm_gem_prime_import_dev(dev, dma_buf, private->dma_dev);
470 static const struct drm_driver mtk_drm_driver = {
471 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
473 .dumb_create = mtk_drm_gem_dumb_create,
475 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
476 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
477 .gem_prime_import = mtk_drm_gem_prime_import,
478 .gem_prime_import_sg_table = mtk_gem_prime_import_sg_table,
479 .gem_prime_mmap = drm_gem_prime_mmap,
480 .fops = &mtk_drm_fops,
485 .major = DRIVER_MAJOR,
486 .minor = DRIVER_MINOR,
489 static int mtk_drm_bind(struct device *dev)
491 struct mtk_drm_private *private = dev_get_drvdata(dev);
492 struct drm_device *drm;
495 drm = drm_dev_alloc(&mtk_drm_driver, dev);
499 drm->dev_private = private;
502 ret = mtk_drm_kms_init(drm);
506 ret = drm_dev_register(drm, 0);
510 drm_fbdev_generic_setup(drm, 32);
515 mtk_drm_kms_deinit(drm);
521 static void mtk_drm_unbind(struct device *dev)
523 struct mtk_drm_private *private = dev_get_drvdata(dev);
525 drm_dev_unregister(private->drm);
526 mtk_drm_kms_deinit(private->drm);
527 drm_dev_put(private->drm);
528 private->num_pipes = 0;
532 static const struct component_master_ops mtk_drm_ops = {
533 .bind = mtk_drm_bind,
534 .unbind = mtk_drm_unbind,
537 static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
538 { .compatible = "mediatek,mt8167-disp-aal",
539 .data = (void *)MTK_DISP_AAL},
540 { .compatible = "mediatek,mt8173-disp-aal",
541 .data = (void *)MTK_DISP_AAL},
542 { .compatible = "mediatek,mt8183-disp-aal",
543 .data = (void *)MTK_DISP_AAL},
544 { .compatible = "mediatek,mt8192-disp-aal",
545 .data = (void *)MTK_DISP_AAL},
546 { .compatible = "mediatek,mt8167-disp-ccorr",
547 .data = (void *)MTK_DISP_CCORR },
548 { .compatible = "mediatek,mt8183-disp-ccorr",
549 .data = (void *)MTK_DISP_CCORR },
550 { .compatible = "mediatek,mt8192-disp-ccorr",
551 .data = (void *)MTK_DISP_CCORR },
552 { .compatible = "mediatek,mt2701-disp-color",
553 .data = (void *)MTK_DISP_COLOR },
554 { .compatible = "mediatek,mt8167-disp-color",
555 .data = (void *)MTK_DISP_COLOR },
556 { .compatible = "mediatek,mt8173-disp-color",
557 .data = (void *)MTK_DISP_COLOR },
558 { .compatible = "mediatek,mt8167-disp-dither",
559 .data = (void *)MTK_DISP_DITHER },
560 { .compatible = "mediatek,mt8183-disp-dither",
561 .data = (void *)MTK_DISP_DITHER },
562 { .compatible = "mediatek,mt8195-disp-dsc",
563 .data = (void *)MTK_DISP_DSC },
564 { .compatible = "mediatek,mt8167-disp-gamma",
565 .data = (void *)MTK_DISP_GAMMA, },
566 { .compatible = "mediatek,mt8173-disp-gamma",
567 .data = (void *)MTK_DISP_GAMMA, },
568 { .compatible = "mediatek,mt8183-disp-gamma",
569 .data = (void *)MTK_DISP_GAMMA, },
570 { .compatible = "mediatek,mt8195-disp-merge",
571 .data = (void *)MTK_DISP_MERGE },
572 { .compatible = "mediatek,mt2701-disp-mutex",
573 .data = (void *)MTK_DISP_MUTEX },
574 { .compatible = "mediatek,mt2712-disp-mutex",
575 .data = (void *)MTK_DISP_MUTEX },
576 { .compatible = "mediatek,mt8167-disp-mutex",
577 .data = (void *)MTK_DISP_MUTEX },
578 { .compatible = "mediatek,mt8173-disp-mutex",
579 .data = (void *)MTK_DISP_MUTEX },
580 { .compatible = "mediatek,mt8183-disp-mutex",
581 .data = (void *)MTK_DISP_MUTEX },
582 { .compatible = "mediatek,mt8186-disp-mutex",
583 .data = (void *)MTK_DISP_MUTEX },
584 { .compatible = "mediatek,mt8192-disp-mutex",
585 .data = (void *)MTK_DISP_MUTEX },
586 { .compatible = "mediatek,mt8195-disp-mutex",
587 .data = (void *)MTK_DISP_MUTEX },
588 { .compatible = "mediatek,mt8173-disp-od",
589 .data = (void *)MTK_DISP_OD },
590 { .compatible = "mediatek,mt2701-disp-ovl",
591 .data = (void *)MTK_DISP_OVL },
592 { .compatible = "mediatek,mt8167-disp-ovl",
593 .data = (void *)MTK_DISP_OVL },
594 { .compatible = "mediatek,mt8173-disp-ovl",
595 .data = (void *)MTK_DISP_OVL },
596 { .compatible = "mediatek,mt8183-disp-ovl",
597 .data = (void *)MTK_DISP_OVL },
598 { .compatible = "mediatek,mt8192-disp-ovl",
599 .data = (void *)MTK_DISP_OVL },
600 { .compatible = "mediatek,mt8183-disp-ovl-2l",
601 .data = (void *)MTK_DISP_OVL_2L },
602 { .compatible = "mediatek,mt8192-disp-ovl-2l",
603 .data = (void *)MTK_DISP_OVL_2L },
604 { .compatible = "mediatek,mt8192-disp-postmask",
605 .data = (void *)MTK_DISP_POSTMASK },
606 { .compatible = "mediatek,mt2701-disp-pwm",
607 .data = (void *)MTK_DISP_BLS },
608 { .compatible = "mediatek,mt8167-disp-pwm",
609 .data = (void *)MTK_DISP_PWM },
610 { .compatible = "mediatek,mt8173-disp-pwm",
611 .data = (void *)MTK_DISP_PWM },
612 { .compatible = "mediatek,mt2701-disp-rdma",
613 .data = (void *)MTK_DISP_RDMA },
614 { .compatible = "mediatek,mt8167-disp-rdma",
615 .data = (void *)MTK_DISP_RDMA },
616 { .compatible = "mediatek,mt8173-disp-rdma",
617 .data = (void *)MTK_DISP_RDMA },
618 { .compatible = "mediatek,mt8183-disp-rdma",
619 .data = (void *)MTK_DISP_RDMA },
620 { .compatible = "mediatek,mt8195-disp-rdma",
621 .data = (void *)MTK_DISP_RDMA },
622 { .compatible = "mediatek,mt8173-disp-ufoe",
623 .data = (void *)MTK_DISP_UFOE },
624 { .compatible = "mediatek,mt8173-disp-wdma",
625 .data = (void *)MTK_DISP_WDMA },
626 { .compatible = "mediatek,mt2701-dpi",
627 .data = (void *)MTK_DPI },
628 { .compatible = "mediatek,mt8167-dsi",
629 .data = (void *)MTK_DSI },
630 { .compatible = "mediatek,mt8173-dpi",
631 .data = (void *)MTK_DPI },
632 { .compatible = "mediatek,mt8183-dpi",
633 .data = (void *)MTK_DPI },
634 { .compatible = "mediatek,mt8192-dpi",
635 .data = (void *)MTK_DPI },
636 { .compatible = "mediatek,mt8195-dp-intf",
637 .data = (void *)MTK_DP_INTF },
638 { .compatible = "mediatek,mt2701-dsi",
639 .data = (void *)MTK_DSI },
640 { .compatible = "mediatek,mt8173-dsi",
641 .data = (void *)MTK_DSI },
642 { .compatible = "mediatek,mt8183-dsi",
643 .data = (void *)MTK_DSI },
644 { .compatible = "mediatek,mt8186-dsi",
645 .data = (void *)MTK_DSI },
649 static const struct of_device_id mtk_drm_of_ids[] = {
650 { .compatible = "mediatek,mt2701-mmsys",
651 .data = &mt2701_mmsys_match_data},
652 { .compatible = "mediatek,mt7623-mmsys",
653 .data = &mt7623_mmsys_match_data},
654 { .compatible = "mediatek,mt2712-mmsys",
655 .data = &mt2712_mmsys_match_data},
656 { .compatible = "mediatek,mt8167-mmsys",
657 .data = &mt8167_mmsys_match_data},
658 { .compatible = "mediatek,mt8173-mmsys",
659 .data = &mt8173_mmsys_match_data},
660 { .compatible = "mediatek,mt8183-mmsys",
661 .data = &mt8183_mmsys_match_data},
662 { .compatible = "mediatek,mt8186-mmsys",
663 .data = &mt8186_mmsys_match_data},
664 { .compatible = "mediatek,mt8192-mmsys",
665 .data = &mt8192_mmsys_match_data},
666 { .compatible = "mediatek,mt8195-mmsys",
667 .data = &mt8195_mmsys_match_data},
670 MODULE_DEVICE_TABLE(of, mtk_drm_of_ids);
672 static int mtk_drm_find_match_data(struct device *dev,
673 const struct mtk_mmsys_match_data *match_data)
676 struct platform_device *pdev = of_find_device_by_node(dev->parent->of_node);
677 struct resource *res;
679 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
681 dev_err(dev, "failed to get parent resource\n");
685 for (i = 0; i < match_data->num_drv_data; i++)
686 if (match_data->drv_data[i]->io_start == res->start)
692 static int mtk_drm_probe(struct platform_device *pdev)
694 struct device *dev = &pdev->dev;
695 struct device_node *phandle = dev->parent->of_node;
696 const struct of_device_id *of_id;
697 const struct mtk_mmsys_match_data *match_data;
698 struct mtk_drm_private *private;
699 struct device_node *node;
700 struct component_match *match = NULL;
704 private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL);
708 private->mmsys_dev = dev->parent;
709 if (!private->mmsys_dev) {
710 dev_err(dev, "Failed to get MMSYS device\n");
714 of_id = of_match_node(mtk_drm_of_ids, phandle);
718 match_data = of_id->data;
719 if (match_data->num_drv_data > 1) {
720 /* This SoC has multiple mmsys channels */
721 ret = mtk_drm_find_match_data(dev, match_data);
723 dev_err(dev, "Couldn't get match driver data\n");
726 private->data = match_data->drv_data[ret];
728 dev_dbg(dev, "Using single mmsys channel\n");
729 private->data = match_data->drv_data[0];
732 /* Iterate over sibling DISP function blocks */
733 for_each_child_of_node(phandle->parent, node) {
734 const struct of_device_id *of_id;
735 enum mtk_ddp_comp_type comp_type;
738 of_id = of_match_node(mtk_ddp_comp_dt_ids, node);
742 if (!of_device_is_available(node)) {
743 dev_dbg(dev, "Skipping disabled component %pOF\n",
748 comp_type = (enum mtk_ddp_comp_type)of_id->data;
750 if (comp_type == MTK_DISP_MUTEX) {
751 private->mutex_node = of_node_get(node);
755 comp_id = mtk_ddp_comp_get_id(node, comp_type);
757 dev_warn(dev, "Skipping unknown component %pOF\n",
762 private->comp_node[comp_id] = of_node_get(node);
765 * Currently only the AAL, CCORR, COLOR, GAMMA, MERGE, OVL, RDMA, DSI, and DPI
766 * blocks have separate component platform drivers and initialize their own
767 * DDP component structure. The others are initialized here.
769 if (comp_type == MTK_DISP_AAL ||
770 comp_type == MTK_DISP_CCORR ||
771 comp_type == MTK_DISP_COLOR ||
772 comp_type == MTK_DISP_GAMMA ||
773 comp_type == MTK_DISP_MERGE ||
774 comp_type == MTK_DISP_OVL ||
775 comp_type == MTK_DISP_OVL_2L ||
776 comp_type == MTK_DISP_RDMA ||
777 comp_type == MTK_DP_INTF ||
778 comp_type == MTK_DPI ||
779 comp_type == MTK_DSI) {
780 dev_info(dev, "Adding component match for %pOF\n",
782 drm_of_component_match_add(dev, &match, component_compare_of,
786 ret = mtk_ddp_comp_init(node, &private->ddp_comp[comp_id], comp_id);
793 if (!private->mutex_node) {
794 dev_err(dev, "Failed to find disp-mutex node\n");
799 pm_runtime_enable(dev);
801 platform_set_drvdata(pdev, private);
803 ret = component_master_add_with_match(dev, &mtk_drm_ops, match);
810 pm_runtime_disable(dev);
812 of_node_put(private->mutex_node);
813 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
814 of_node_put(private->comp_node[i]);
818 static int mtk_drm_remove(struct platform_device *pdev)
820 struct mtk_drm_private *private = platform_get_drvdata(pdev);
823 component_master_del(&pdev->dev, &mtk_drm_ops);
824 pm_runtime_disable(&pdev->dev);
825 of_node_put(private->mutex_node);
826 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
827 of_node_put(private->comp_node[i]);
832 static int mtk_drm_sys_prepare(struct device *dev)
834 struct mtk_drm_private *private = dev_get_drvdata(dev);
835 struct drm_device *drm = private->drm;
838 ret = drm_mode_config_helper_suspend(drm);
843 static void mtk_drm_sys_complete(struct device *dev)
845 struct mtk_drm_private *private = dev_get_drvdata(dev);
846 struct drm_device *drm = private->drm;
849 ret = drm_mode_config_helper_resume(drm);
851 dev_err(dev, "Failed to resume\n");
854 static const struct dev_pm_ops mtk_drm_pm_ops = {
855 .prepare = mtk_drm_sys_prepare,
856 .complete = mtk_drm_sys_complete,
859 static struct platform_driver mtk_drm_platform_driver = {
860 .probe = mtk_drm_probe,
861 .remove = mtk_drm_remove,
863 .name = "mediatek-drm",
864 .pm = &mtk_drm_pm_ops,
868 static struct platform_driver * const mtk_drm_drivers[] = {
869 &mtk_disp_aal_driver,
870 &mtk_disp_ccorr_driver,
871 &mtk_disp_color_driver,
872 &mtk_disp_gamma_driver,
873 &mtk_disp_merge_driver,
874 &mtk_disp_ovl_driver,
875 &mtk_disp_rdma_driver,
877 &mtk_drm_platform_driver,
879 &mtk_mdp_rdma_driver,
882 static int __init mtk_drm_init(void)
884 return platform_register_drivers(mtk_drm_drivers,
885 ARRAY_SIZE(mtk_drm_drivers));
888 static void __exit mtk_drm_exit(void)
890 platform_unregister_drivers(mtk_drm_drivers,
891 ARRAY_SIZE(mtk_drm_drivers));
894 module_init(mtk_drm_init);
895 module_exit(mtk_drm_exit);
898 MODULE_DESCRIPTION("Mediatek SoC DRM driver");
899 MODULE_LICENSE("GPL v2");