drivers/gpu/drm/i915/pxp/intel_pxp_irq.c

   1 // SPDX-License-Identifier: MIT
   2 /*
   3  * Copyright(c) 2020 Intel Corporation.
   4  */
   5 #include <linux/workqueue.h>
   6 #include "intel_pxp.h"
   7 #include "intel_pxp_irq.h"
   8 #include "intel_pxp_session.h"
   9 #include "gt/intel_gt_irq.h"
  10 #include "gt/intel_gt_regs.h"
  11 #include "gt/intel_gt_types.h"
  12 #include "i915_irq.h"
  13 #include "i915_reg.h"
  14 #include "intel_runtime_pm.h"
  15
  16 /**
  17  * intel_pxp_irq_handler - Handles PXP interrupts.
  18  * @pxp: pointer to pxp struct
  19  * @iir: interrupt vector
  20  */
  21 void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir)
  22 {
  23         struct intel_gt *gt = pxp_to_gt(pxp);
  24
  25         if (GEM_WARN_ON(!intel_pxp_is_enabled(pxp)))
  26                 return;
  27
  28         lockdep_assert_held(&gt->irq_lock);
  29
  30         if (unlikely(!iir))
  31                 return;
  32
  33         if (iir & (GEN12_DISPLAY_PXP_STATE_TERMINATED_INTERRUPT |
  34                    GEN12_DISPLAY_APP_TERMINATED_PER_FW_REQ_INTERRUPT)) {
  35                 /* immediately mark PXP as inactive on termination */
  36                 intel_pxp_mark_termination_in_progress(pxp);
  37                 pxp->session_events |= PXP_TERMINATION_REQUEST | PXP_INVAL_REQUIRED;
  38         }
  39
  40         if (iir & GEN12_DISPLAY_STATE_RESET_COMPLETE_INTERRUPT)
  41                 pxp->session_events |= PXP_TERMINATION_COMPLETE;
  42
  43         if (pxp->session_events)
  44                 queue_work(system_unbound_wq, &pxp->session_work);
  45 }
  46
  47 static inline void __pxp_set_interrupts(struct intel_gt *gt, u32 interrupts)
  48 {
  49         struct intel_uncore *uncore = gt->uncore;
  50         const u32 mask = interrupts << 16;
  51
  52         intel_uncore_write(uncore, GEN11_CRYPTO_RSVD_INTR_ENABLE, mask);
  53         intel_uncore_write(uncore, GEN11_CRYPTO_RSVD_INTR_MASK,  ~mask);
  54 }
  55
  56 static inline void pxp_irq_reset(struct intel_gt *gt)
  57 {
  58         spin_lock_irq(&gt->irq_lock);
  59         gen11_gt_reset_one_iir(gt, 0, GEN11_KCR);
  60         spin_unlock_irq(&gt->irq_lock);
  61 }
  62
  63 void intel_pxp_irq_enable(struct intel_pxp *pxp)
  64 {
  65         struct intel_gt *gt = pxp_to_gt(pxp);
  66
  67         spin_lock_irq(&gt->irq_lock);
  68
  69         if (!pxp->irq_enabled)
  70                 WARN_ON_ONCE(gen11_gt_reset_one_iir(gt, 0, GEN11_KCR));
  71
  72         __pxp_set_interrupts(gt, GEN12_PXP_INTERRUPTS);
  73         pxp->irq_enabled = true;
  74
  75         spin_unlock_irq(&gt->irq_lock);
  76 }
  77
  78 void intel_pxp_irq_disable(struct intel_pxp *pxp)
  79 {
  80         struct intel_gt *gt = pxp_to_gt(pxp);
  81
  82         /*
  83          * We always need to submit a global termination when we re-enable the
  84          * interrupts, so there is no need to make sure that the session state
  85          * makes sense at the end of this function. Just make sure this is not
  86          * called in a path were the driver consider the session as valid and
  87          * doesn't call a termination on restart.
  88          */
  89         GEM_WARN_ON(intel_pxp_is_active(pxp));
  90
  91         spin_lock_irq(&gt->irq_lock);
  92
  93         pxp->irq_enabled = false;
  94         __pxp_set_interrupts(gt, 0);
  95
  96         spin_unlock_irq(&gt->irq_lock);
  97         intel_synchronize_irq(gt->i915);
  98
  99         pxp_irq_reset(gt);
 100
 101         flush_work(&pxp->session_work);
 102 }