1 // SPDX-License-Identifier: MIT
3 * Copyright © 2020,2021 Intel Corporation
7 #include "intel_step.h"
10 * Some platforms have unusual ways of mapping PCI revision ID to GT/display
11 * steppings. E.g., in some cases a higher PCI revision may translate to a
12 * lower stepping of the GT and/or display IP. This file provides lookup
13 * tables to map the PCI revision into a standard set of stepping values that
14 * can be compared numerically.
16 * Also note that some revisions/steppings may have been set aside as
17 * placeholders but never materialized in real hardware; in those cases there
18 * may be jumps in the revision IDs or stepping values in the tables below.
22 * Some platforms always have the same stepping value for GT and display;
23 * use a macro to define these to make it easier to identify the platforms
24 * where the two steppings can deviate.
26 #define COMMON_STEP(x) .graphics_step = STEP_##x, .display_step = STEP_##x, .media_step = STEP_##x
27 #define COMMON_GT_MEDIA_STEP(x) .graphics_step = STEP_##x, .media_step = STEP_##x
29 static const struct intel_step_info skl_revids[] = {
30 [0x6] = { COMMON_STEP(G0) },
31 [0x7] = { COMMON_STEP(H0) },
32 [0x9] = { COMMON_STEP(J0) },
33 [0xA] = { COMMON_STEP(I1) },
36 static const struct intel_step_info kbl_revids[] = {
37 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 },
38 [2] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B0 },
39 [3] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_B0 },
40 [4] = { COMMON_GT_MEDIA_STEP(F0), .display_step = STEP_C0 },
41 [5] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B1 },
42 [6] = { COMMON_GT_MEDIA_STEP(D1), .display_step = STEP_B1 },
43 [7] = { COMMON_GT_MEDIA_STEP(G0), .display_step = STEP_C0 },
46 static const struct intel_step_info bxt_revids[] = {
47 [0xA] = { COMMON_STEP(C0) },
48 [0xB] = { COMMON_STEP(C0) },
49 [0xC] = { COMMON_STEP(D0) },
50 [0xD] = { COMMON_STEP(E0) },
53 static const struct intel_step_info glk_revids[] = {
54 [3] = { COMMON_STEP(B0) },
57 static const struct intel_step_info icl_revids[] = {
58 [7] = { COMMON_STEP(D0) },
61 static const struct intel_step_info jsl_ehl_revids[] = {
62 [0] = { COMMON_STEP(A0) },
63 [1] = { COMMON_STEP(B0) },
66 static const struct intel_step_info tgl_uy_revids[] = {
67 [0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 },
68 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_C0 },
69 [2] = { COMMON_GT_MEDIA_STEP(B1), .display_step = STEP_C0 },
70 [3] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_D0 },
73 /* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
74 static const struct intel_step_info tgl_revids[] = {
75 [0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_B0 },
76 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_D0 },
79 static const struct intel_step_info rkl_revids[] = {
80 [0] = { COMMON_STEP(A0) },
81 [1] = { COMMON_STEP(B0) },
82 [4] = { COMMON_STEP(C0) },
85 static const struct intel_step_info dg1_revids[] = {
86 [0] = { COMMON_STEP(A0) },
87 [1] = { COMMON_STEP(B0) },
90 static const struct intel_step_info adls_revids[] = {
91 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 },
92 [0x1] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A2 },
93 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 },
94 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B0 },
95 [0xC] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_C0 },
98 static const struct intel_step_info adlp_revids[] = {
99 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 },
100 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 },
101 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_C0 },
102 [0xC] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_D0 },
105 static const struct intel_step_info xehpsdv_revids[] = {
106 [0x0] = { COMMON_GT_MEDIA_STEP(A0) },
107 [0x1] = { COMMON_GT_MEDIA_STEP(A1) },
108 [0x4] = { COMMON_GT_MEDIA_STEP(B0) },
109 [0x8] = { COMMON_GT_MEDIA_STEP(C0) },
112 static const struct intel_step_info dg2_g10_revid_step_tbl[] = {
113 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 },
114 [0x1] = { COMMON_GT_MEDIA_STEP(A1), .display_step = STEP_A0 },
115 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 },
116 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_C0 },
119 static const struct intel_step_info dg2_g11_revid_step_tbl[] = {
120 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_B0 },
121 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_C0 },
122 [0x5] = { COMMON_GT_MEDIA_STEP(B1), .display_step = STEP_C0 },
125 static const struct intel_step_info dg2_g12_revid_step_tbl[] = {
126 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_C0 },
129 static const struct intel_step_info adls_rpls_revids[] = {
130 [0x4] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_D0 },
131 [0xC] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_C0 },
134 static const struct intel_step_info adlp_n_revids[] = {
135 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_D0 },
138 static void pvc_step_init(struct drm_i915_private *i915, int pci_revid);
140 void intel_step_init(struct drm_i915_private *i915)
142 const struct intel_step_info *revids = NULL;
144 int revid = INTEL_REVID(i915);
145 struct intel_step_info step = {};
147 if (IS_PONTEVECCHIO(i915)) {
148 pvc_step_init(i915, revid);
150 } else if (IS_DG2_G10(i915)) {
151 revids = dg2_g10_revid_step_tbl;
152 size = ARRAY_SIZE(dg2_g10_revid_step_tbl);
153 } else if (IS_DG2_G11(i915)) {
154 revids = dg2_g11_revid_step_tbl;
155 size = ARRAY_SIZE(dg2_g11_revid_step_tbl);
156 } else if (IS_DG2_G12(i915)) {
157 revids = dg2_g12_revid_step_tbl;
158 size = ARRAY_SIZE(dg2_g12_revid_step_tbl);
159 } else if (IS_XEHPSDV(i915)) {
160 revids = xehpsdv_revids;
161 size = ARRAY_SIZE(xehpsdv_revids);
162 } else if (IS_ADLP_N(i915)) {
163 revids = adlp_n_revids;
164 size = ARRAY_SIZE(adlp_n_revids);
165 } else if (IS_ALDERLAKE_P(i915)) {
166 revids = adlp_revids;
167 size = ARRAY_SIZE(adlp_revids);
168 } else if (IS_ADLS_RPLS(i915)) {
169 revids = adls_rpls_revids;
170 size = ARRAY_SIZE(adls_rpls_revids);
171 } else if (IS_ALDERLAKE_S(i915)) {
172 revids = adls_revids;
173 size = ARRAY_SIZE(adls_revids);
174 } else if (IS_DG1(i915)) {
176 size = ARRAY_SIZE(dg1_revids);
177 } else if (IS_ROCKETLAKE(i915)) {
179 size = ARRAY_SIZE(rkl_revids);
180 } else if (IS_TGL_UY(i915)) {
181 revids = tgl_uy_revids;
182 size = ARRAY_SIZE(tgl_uy_revids);
183 } else if (IS_TIGERLAKE(i915)) {
185 size = ARRAY_SIZE(tgl_revids);
186 } else if (IS_JSL_EHL(i915)) {
187 revids = jsl_ehl_revids;
188 size = ARRAY_SIZE(jsl_ehl_revids);
189 } else if (IS_ICELAKE(i915)) {
191 size = ARRAY_SIZE(icl_revids);
192 } else if (IS_GEMINILAKE(i915)) {
194 size = ARRAY_SIZE(glk_revids);
195 } else if (IS_BROXTON(i915)) {
197 size = ARRAY_SIZE(bxt_revids);
198 } else if (IS_KABYLAKE(i915)) {
200 size = ARRAY_SIZE(kbl_revids);
201 } else if (IS_SKYLAKE(i915)) {
203 size = ARRAY_SIZE(skl_revids);
206 /* Not using the stepping scheme for the platform yet. */
210 if (revid < size && revids[revid].graphics_step != STEP_NONE) {
211 step = revids[revid];
213 drm_warn(&i915->drm, "Unknown revid 0x%02x\n", revid);
216 * If we hit a gap in the revid array, use the information for
219 * This may be wrong in all sorts of ways, especially if the
220 * steppings in the array are not monotonically increasing, but
221 * it's better than defaulting to 0.
223 while (revid < size && revids[revid].graphics_step == STEP_NONE)
227 drm_dbg(&i915->drm, "Using steppings for revid 0x%02x\n",
229 step = revids[revid];
231 drm_dbg(&i915->drm, "Using future steppings\n");
232 step.graphics_step = STEP_FUTURE;
233 step.display_step = STEP_FUTURE;
237 if (drm_WARN_ON(&i915->drm, step.graphics_step == STEP_NONE))
240 RUNTIME_INFO(i915)->step = step;
243 #define PVC_BD_REVID GENMASK(5, 3)
244 #define PVC_CT_REVID GENMASK(2, 0)
246 static const int pvc_bd_subids[] = {
253 static const int pvc_ct_subids[] = {
261 pvc_step_lookup(struct drm_i915_private *i915, const char *type,
262 const int *table, int size, int subid)
264 if (subid < size && table[subid] != STEP_NONE)
267 drm_warn(&i915->drm, "Unknown %s id 0x%02x\n", type, subid);
270 * As on other platforms, try to use the next higher ID if we land on a
273 while (subid < size && table[subid] == STEP_NONE)
277 drm_dbg(&i915->drm, "Using steppings for %s id 0x%02x\n",
282 drm_dbg(&i915->drm, "Using future steppings\n");
287 * PVC needs special handling since we don't lookup the
288 * revid in a table, but rather specific bitfields within
289 * the revid for various components.
291 static void pvc_step_init(struct drm_i915_private *i915, int pci_revid)
293 int ct_subid, bd_subid;
295 bd_subid = FIELD_GET(PVC_BD_REVID, pci_revid);
296 ct_subid = FIELD_GET(PVC_CT_REVID, pci_revid);
298 RUNTIME_INFO(i915)->step.basedie_step =
299 pvc_step_lookup(i915, "Base Die", pvc_bd_subids,
300 ARRAY_SIZE(pvc_bd_subids), bd_subid);
301 RUNTIME_INFO(i915)->step.graphics_step =
302 pvc_step_lookup(i915, "Compute Tile", pvc_ct_subids,
303 ARRAY_SIZE(pvc_ct_subids), ct_subid);
306 #define STEP_NAME_CASE(name) \
310 const char *intel_step_name(enum intel_step step)
313 STEP_NAME_LIST(STEP_NAME_CASE);