1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2014-2022 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <linux/slab.h>
26 #include <linux/list.h>
27 #include "kfd_device_queue_manager.h"
29 #include "kfd_kernel_queue.h"
30 #include "amdgpu_amdkfd.h"
32 static inline struct process_queue_node *get_queue_by_qid(
33 struct process_queue_manager *pqm, unsigned int qid)
35 struct process_queue_node *pqn;
37 list_for_each_entry(pqn, &pqm->queues, process_queue_list) {
38 if ((pqn->q && pqn->q->properties.queue_id == qid) ||
39 (pqn->kq && pqn->kq->queue->properties.queue_id == qid))
46 static int assign_queue_slot_by_qid(struct process_queue_manager *pqm,
49 if (qid >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS)
52 if (__test_and_set_bit(qid, pqm->queue_slot_bitmap)) {
53 pr_err("Cannot create new queue because requested qid(%u) is in use\n", qid);
60 static int find_available_queue_slot(struct process_queue_manager *pqm,
65 found = find_first_zero_bit(pqm->queue_slot_bitmap,
66 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS);
68 pr_debug("The new slot id %lu\n", found);
70 if (found >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) {
71 pr_info("Cannot open more queues for process with pasid 0x%x\n",
76 set_bit(found, pqm->queue_slot_bitmap);
82 void kfd_process_dequeue_from_device(struct kfd_process_device *pdd)
84 struct kfd_dev *dev = pdd->dev;
86 if (pdd->already_dequeued)
89 dev->dqm->ops.process_termination(dev->dqm, &pdd->qpd);
90 pdd->already_dequeued = true;
93 int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid,
96 struct kfd_dev *dev = NULL;
97 struct process_queue_node *pqn;
98 struct kfd_process_device *pdd;
99 struct kgd_mem *mem = NULL;
102 pqn = get_queue_by_qid(pqm, qid);
104 pr_err("Queue id does not match any known queue\n");
109 dev = pqn->q->device;
113 pdd = kfd_get_process_device_data(dev, pqm->process);
115 pr_err("Process device data doesn't exist\n");
119 /* Only allow one queue per process can have GWS assigned */
120 if (gws && pdd->qpd.num_gws)
123 if (!gws && pdd->qpd.num_gws == 0)
127 ret = amdgpu_amdkfd_add_gws_to_process(pdd->process->kgd_process_info,
130 ret = amdgpu_amdkfd_remove_gws_from_process(pdd->process->kgd_process_info,
136 pdd->qpd.num_gws = gws ? dev->adev->gds.gws_size : 0;
138 return pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm,
142 void kfd_process_dequeue_from_all_devices(struct kfd_process *p)
146 for (i = 0; i < p->n_pdds; i++)
147 kfd_process_dequeue_from_device(p->pdds[i]);
150 int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p)
152 INIT_LIST_HEAD(&pqm->queues);
153 pqm->queue_slot_bitmap = bitmap_zalloc(KFD_MAX_NUM_OF_QUEUES_PER_PROCESS,
155 if (!pqm->queue_slot_bitmap)
162 void pqm_uninit(struct process_queue_manager *pqm)
164 struct process_queue_node *pqn, *next;
166 list_for_each_entry_safe(pqn, next, &pqm->queues, process_queue_list) {
167 if (pqn->q && pqn->q->gws)
168 amdgpu_amdkfd_remove_gws_from_process(pqm->process->kgd_process_info,
170 kfd_procfs_del_queue(pqn->q);
171 uninit_queue(pqn->q);
172 list_del(&pqn->process_queue_list);
176 bitmap_free(pqm->queue_slot_bitmap);
177 pqm->queue_slot_bitmap = NULL;
180 static int init_user_queue(struct process_queue_manager *pqm,
181 struct kfd_dev *dev, struct queue **q,
182 struct queue_properties *q_properties,
183 struct file *f, struct amdgpu_bo *wptr_bo,
188 /* Doorbell initialized in user space*/
189 q_properties->doorbell_ptr = NULL;
191 /* let DQM handle it*/
192 q_properties->vmid = 0;
193 q_properties->queue_id = qid;
195 retval = init_queue(q, q_properties);
200 (*q)->process = pqm->process;
202 if (dev->shared_resources.enable_mes) {
203 retval = amdgpu_amdkfd_alloc_gtt_mem(dev->adev,
204 AMDGPU_MES_GANG_CTX_SIZE,
206 &(*q)->gang_ctx_gpu_addr,
207 &(*q)->gang_ctx_cpu_ptr,
210 pr_err("failed to allocate gang context bo\n");
213 memset((*q)->gang_ctx_cpu_ptr, 0, AMDGPU_MES_GANG_CTX_SIZE);
214 (*q)->wptr_bo = wptr_bo;
217 pr_debug("PQM After init queue");
221 if (dev->shared_resources.enable_mes)
226 int pqm_create_queue(struct process_queue_manager *pqm,
229 struct queue_properties *properties,
231 struct amdgpu_bo *wptr_bo,
232 const struct kfd_criu_queue_priv_data *q_data,
233 const void *restore_mqd,
234 const void *restore_ctl_stack,
235 uint32_t *p_doorbell_offset_in_process)
238 struct kfd_process_device *pdd;
240 struct process_queue_node *pqn;
241 struct kernel_queue *kq;
242 enum kfd_queue_type type = properties->type;
243 unsigned int max_queues = 127; /* HWS limit */
248 pdd = kfd_get_process_device_data(dev, pqm->process);
250 pr_err("Process device data doesn't exist\n");
255 * for debug process, verify that it is within the static queues limit
256 * currently limit is set to half of the total avail HQD slots
257 * If we are just about to create DIQ, the is_debug flag is not set yet
258 * Hence we also check the type as well
260 if ((pdd->qpd.is_debug) || (type == KFD_QUEUE_TYPE_DIQ))
261 max_queues = dev->device_info.max_no_of_hqd/2;
263 if (pdd->qpd.queue_count >= max_queues)
267 retval = assign_queue_slot_by_qid(pqm, q_data->q_id);
270 retval = find_available_queue_slot(pqm, qid);
275 if (list_empty(&pdd->qpd.queues_list) &&
276 list_empty(&pdd->qpd.priv_queue_list))
277 dev->dqm->ops.register_process(dev->dqm, &pdd->qpd);
279 pqn = kzalloc(sizeof(*pqn), GFP_KERNEL);
282 goto err_allocate_pqn;
286 case KFD_QUEUE_TYPE_SDMA:
287 case KFD_QUEUE_TYPE_SDMA_XGMI:
288 /* SDMA queues are always allocated statically no matter
289 * which scheduler mode is used. We also do not need to
290 * check whether a SDMA queue can be allocated here, because
291 * allocate_sdma_queue() in create_queue() has the
292 * corresponding check logic.
294 retval = init_user_queue(pqm, dev, &q, properties, f, wptr_bo, *qid);
296 goto err_create_queue;
299 retval = dev->dqm->ops.create_queue(dev->dqm, q, &pdd->qpd, q_data,
300 restore_mqd, restore_ctl_stack);
304 case KFD_QUEUE_TYPE_COMPUTE:
305 /* check if there is over subscription */
306 if ((dev->dqm->sched_policy ==
307 KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION) &&
308 ((dev->dqm->processes_count >= dev->vm_info.vmid_num_kfd) ||
309 (dev->dqm->active_queue_count >= get_cp_queues_num(dev->dqm)))) {
310 pr_debug("Over-subscription is not allowed when amdkfd.sched_policy == 1\n");
312 goto err_create_queue;
315 retval = init_user_queue(pqm, dev, &q, properties, f, wptr_bo, *qid);
317 goto err_create_queue;
320 retval = dev->dqm->ops.create_queue(dev->dqm, q, &pdd->qpd, q_data,
321 restore_mqd, restore_ctl_stack);
324 case KFD_QUEUE_TYPE_DIQ:
325 kq = kernel_queue_init(dev, KFD_QUEUE_TYPE_DIQ);
328 goto err_create_queue;
330 kq->queue->properties.queue_id = *qid;
333 retval = dev->dqm->ops.create_kernel_queue(dev->dqm,
337 WARN(1, "Invalid queue type %d", type);
342 pr_err("Pasid 0x%x DQM create queue type %d failed. ret %d\n",
343 pqm->process->pasid, type, retval);
344 goto err_create_queue;
347 if (q && p_doorbell_offset_in_process)
348 /* Return the doorbell offset within the doorbell page
349 * to the caller so it can be passed up to user mode
351 * There are always 1024 doorbells per process, so in case
352 * of 8-byte doorbells, there are two doorbell pages per
355 *p_doorbell_offset_in_process =
356 (q->properties.doorbell_off * sizeof(uint32_t)) &
357 (kfd_doorbell_process_slice(dev) - 1);
359 pr_debug("PQM After DQM create queue\n");
361 list_add(&pqn->process_queue_list, &pqm->queues);
364 pr_debug("PQM done creating queue\n");
365 kfd_procfs_add_queue(q);
366 print_queue_properties(&q->properties);
374 kernel_queue_uninit(kq, false);
377 /* check if queues list is empty unregister process from device */
378 clear_bit(*qid, pqm->queue_slot_bitmap);
379 if (list_empty(&pdd->qpd.queues_list) &&
380 list_empty(&pdd->qpd.priv_queue_list))
381 dev->dqm->ops.unregister_process(dev->dqm, &pdd->qpd);
385 int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid)
387 struct process_queue_node *pqn;
388 struct kfd_process_device *pdd;
389 struct device_queue_manager *dqm;
397 pqn = get_queue_by_qid(pqm, qid);
399 pr_err("Queue id does not match any known queue\n");
407 dev = pqn->q->device;
411 pdd = kfd_get_process_device_data(dev, pqm->process);
413 pr_err("Process device data doesn't exist\n");
418 /* destroy kernel queue (DIQ) */
419 dqm = pqn->kq->dev->dqm;
420 dqm->ops.destroy_kernel_queue(dqm, pqn->kq, &pdd->qpd);
421 kernel_queue_uninit(pqn->kq, false);
425 kfd_procfs_del_queue(pqn->q);
426 dqm = pqn->q->device->dqm;
427 retval = dqm->ops.destroy_queue(dqm, &pdd->qpd, pqn->q);
429 pr_err("Pasid 0x%x destroy queue %d failed, ret %d\n",
431 pqn->q->properties.queue_id, retval);
432 if (retval != -ETIME)
433 goto err_destroy_queue;
437 amdgpu_amdkfd_remove_gws_from_process(pqm->process->kgd_process_info,
439 pdd->qpd.num_gws = 0;
442 if (dev->shared_resources.enable_mes) {
443 amdgpu_amdkfd_free_gtt_mem(dev->adev,
444 pqn->q->gang_ctx_bo);
446 amdgpu_amdkfd_free_gtt_mem(dev->adev, pqn->q->wptr_bo);
449 uninit_queue(pqn->q);
452 list_del(&pqn->process_queue_list);
454 clear_bit(qid, pqm->queue_slot_bitmap);
456 if (list_empty(&pdd->qpd.queues_list) &&
457 list_empty(&pdd->qpd.priv_queue_list))
458 dqm->ops.unregister_process(dqm, &pdd->qpd);
464 int pqm_update_queue_properties(struct process_queue_manager *pqm,
465 unsigned int qid, struct queue_properties *p)
468 struct process_queue_node *pqn;
470 pqn = get_queue_by_qid(pqm, qid);
472 pr_debug("No queue %d exists for update operation\n", qid);
476 pqn->q->properties.queue_address = p->queue_address;
477 pqn->q->properties.queue_size = p->queue_size;
478 pqn->q->properties.queue_percent = p->queue_percent;
479 pqn->q->properties.priority = p->priority;
481 retval = pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm,
489 int pqm_update_mqd(struct process_queue_manager *pqm,
490 unsigned int qid, struct mqd_update_info *minfo)
493 struct process_queue_node *pqn;
495 pqn = get_queue_by_qid(pqm, qid);
497 pr_debug("No queue %d exists for update operation\n", qid);
501 /* ASICs that have WGPs must enforce pairwise enabled mask checks. */
502 if (minfo && minfo->update_flag == UPDATE_FLAG_CU_MASK && minfo->cu_mask.ptr &&
503 KFD_GC_VERSION(pqn->q->device) >= IP_VERSION(10, 0, 0)) {
506 for (i = 0; i < minfo->cu_mask.count; i += 2) {
507 uint32_t cu_pair = (minfo->cu_mask.ptr[i / 32] >> (i % 32)) & 0x3;
509 if (cu_pair && cu_pair != 0x3) {
510 pr_debug("CUs must be adjacent pairwise enabled.\n");
516 retval = pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm,
524 struct kernel_queue *pqm_get_kernel_queue(
525 struct process_queue_manager *pqm,
528 struct process_queue_node *pqn;
530 pqn = get_queue_by_qid(pqm, qid);
537 struct queue *pqm_get_user_queue(struct process_queue_manager *pqm,
540 struct process_queue_node *pqn;
542 pqn = get_queue_by_qid(pqm, qid);
543 return pqn ? pqn->q : NULL;
546 int pqm_get_wave_state(struct process_queue_manager *pqm,
548 void __user *ctl_stack,
549 u32 *ctl_stack_used_size,
550 u32 *save_area_used_size)
552 struct process_queue_node *pqn;
554 pqn = get_queue_by_qid(pqm, qid);
556 pr_debug("amdkfd: No queue %d exists for operation\n",
561 return pqn->q->device->dqm->ops.get_wave_state(pqn->q->device->dqm,
565 save_area_used_size);
568 static int get_queue_data_sizes(struct kfd_process_device *pdd,
571 uint32_t *ctl_stack_size)
575 ret = pqm_get_queue_checkpoint_info(&pdd->process->pqm,
576 q->properties.queue_id,
580 pr_err("Failed to get queue dump info (%d)\n", ret);
585 int kfd_process_get_queue_info(struct kfd_process *p,
586 uint32_t *num_queues,
587 uint64_t *priv_data_sizes)
589 uint32_t extra_data_sizes = 0;
596 /* Run over all PDDs of the process */
597 for (i = 0; i < p->n_pdds; i++) {
598 struct kfd_process_device *pdd = p->pdds[i];
600 list_for_each_entry(q, &pdd->qpd.queues_list, list) {
601 if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE ||
602 q->properties.type == KFD_QUEUE_TYPE_SDMA ||
603 q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) {
604 uint32_t mqd_size, ctl_stack_size;
606 *num_queues = *num_queues + 1;
608 ret = get_queue_data_sizes(pdd, q, &mqd_size, &ctl_stack_size);
612 extra_data_sizes += mqd_size + ctl_stack_size;
614 pr_err("Unsupported queue type (%d)\n", q->properties.type);
619 *priv_data_sizes = extra_data_sizes +
620 (*num_queues * sizeof(struct kfd_criu_queue_priv_data));
625 static int pqm_checkpoint_mqd(struct process_queue_manager *pqm,
630 struct process_queue_node *pqn;
632 pqn = get_queue_by_qid(pqm, qid);
634 pr_debug("amdkfd: No queue %d exists for operation\n", qid);
638 if (!pqn->q->device->dqm->ops.checkpoint_mqd) {
639 pr_err("amdkfd: queue dumping not supported on this device\n");
643 return pqn->q->device->dqm->ops.checkpoint_mqd(pqn->q->device->dqm,
644 pqn->q, mqd, ctl_stack);
647 static int criu_checkpoint_queue(struct kfd_process_device *pdd,
649 struct kfd_criu_queue_priv_data *q_data)
651 uint8_t *mqd, *ctl_stack;
654 mqd = (void *)(q_data + 1);
655 ctl_stack = mqd + q_data->mqd_size;
657 q_data->gpu_id = pdd->user_gpu_id;
658 q_data->type = q->properties.type;
659 q_data->format = q->properties.format;
660 q_data->q_id = q->properties.queue_id;
661 q_data->q_address = q->properties.queue_address;
662 q_data->q_size = q->properties.queue_size;
663 q_data->priority = q->properties.priority;
664 q_data->q_percent = q->properties.queue_percent;
665 q_data->read_ptr_addr = (uint64_t)q->properties.read_ptr;
666 q_data->write_ptr_addr = (uint64_t)q->properties.write_ptr;
667 q_data->doorbell_id = q->doorbell_id;
669 q_data->sdma_id = q->sdma_id;
671 q_data->eop_ring_buffer_address =
672 q->properties.eop_ring_buffer_address;
674 q_data->eop_ring_buffer_size = q->properties.eop_ring_buffer_size;
676 q_data->ctx_save_restore_area_address =
677 q->properties.ctx_save_restore_area_address;
679 q_data->ctx_save_restore_area_size =
680 q->properties.ctx_save_restore_area_size;
682 q_data->gws = !!q->gws;
684 ret = pqm_checkpoint_mqd(&pdd->process->pqm, q->properties.queue_id, mqd, ctl_stack);
686 pr_err("Failed checkpoint queue_mqd (%d)\n", ret);
690 pr_debug("Dumping Queue: gpu_id:%x queue_id:%u\n", q_data->gpu_id, q_data->q_id);
694 static int criu_checkpoint_queues_device(struct kfd_process_device *pdd,
695 uint8_t __user *user_priv,
696 unsigned int *q_index,
697 uint64_t *queues_priv_data_offset)
699 unsigned int q_private_data_size = 0;
700 uint8_t *q_private_data = NULL; /* Local buffer to store individual queue private data */
704 list_for_each_entry(q, &pdd->qpd.queues_list, list) {
705 struct kfd_criu_queue_priv_data *q_data;
706 uint64_t q_data_size;
708 uint32_t ctl_stack_size;
710 if (q->properties.type != KFD_QUEUE_TYPE_COMPUTE &&
711 q->properties.type != KFD_QUEUE_TYPE_SDMA &&
712 q->properties.type != KFD_QUEUE_TYPE_SDMA_XGMI) {
714 pr_err("Unsupported queue type (%d)\n", q->properties.type);
719 ret = get_queue_data_sizes(pdd, q, &mqd_size, &ctl_stack_size);
723 q_data_size = sizeof(*q_data) + mqd_size + ctl_stack_size;
725 /* Increase local buffer space if needed */
726 if (q_private_data_size < q_data_size) {
727 kfree(q_private_data);
729 q_private_data = kzalloc(q_data_size, GFP_KERNEL);
730 if (!q_private_data) {
734 q_private_data_size = q_data_size;
737 q_data = (struct kfd_criu_queue_priv_data *)q_private_data;
739 /* data stored in this order: priv_data, mqd, ctl_stack */
740 q_data->mqd_size = mqd_size;
741 q_data->ctl_stack_size = ctl_stack_size;
743 ret = criu_checkpoint_queue(pdd, q, q_data);
747 q_data->object_type = KFD_CRIU_OBJECT_TYPE_QUEUE;
749 ret = copy_to_user(user_priv + *queues_priv_data_offset,
750 q_data, q_data_size);
755 *queues_priv_data_offset += q_data_size;
756 *q_index = *q_index + 1;
759 kfree(q_private_data);
764 int kfd_criu_checkpoint_queues(struct kfd_process *p,
765 uint8_t __user *user_priv_data,
766 uint64_t *priv_data_offset)
768 int ret = 0, pdd_index, q_index = 0;
770 for (pdd_index = 0; pdd_index < p->n_pdds; pdd_index++) {
771 struct kfd_process_device *pdd = p->pdds[pdd_index];
774 * criu_checkpoint_queues_device will copy data to user and update q_index and
775 * queues_priv_data_offset
777 ret = criu_checkpoint_queues_device(pdd, user_priv_data, &q_index,
787 static void set_queue_properties_from_criu(struct queue_properties *qp,
788 struct kfd_criu_queue_priv_data *q_data)
790 qp->is_interop = false;
791 qp->queue_percent = q_data->q_percent;
792 qp->priority = q_data->priority;
793 qp->queue_address = q_data->q_address;
794 qp->queue_size = q_data->q_size;
795 qp->read_ptr = (uint32_t *) q_data->read_ptr_addr;
796 qp->write_ptr = (uint32_t *) q_data->write_ptr_addr;
797 qp->eop_ring_buffer_address = q_data->eop_ring_buffer_address;
798 qp->eop_ring_buffer_size = q_data->eop_ring_buffer_size;
799 qp->ctx_save_restore_area_address = q_data->ctx_save_restore_area_address;
800 qp->ctx_save_restore_area_size = q_data->ctx_save_restore_area_size;
801 qp->ctl_stack_size = q_data->ctl_stack_size;
802 qp->type = q_data->type;
803 qp->format = q_data->format;
806 int kfd_criu_restore_queue(struct kfd_process *p,
807 uint8_t __user *user_priv_ptr,
808 uint64_t *priv_data_offset,
809 uint64_t max_priv_data_size)
811 uint8_t *mqd, *ctl_stack, *q_extra_data = NULL;
812 struct kfd_criu_queue_priv_data *q_data;
813 struct kfd_process_device *pdd;
814 uint64_t q_extra_data_size;
815 struct queue_properties qp;
816 unsigned int queue_id;
819 if (*priv_data_offset + sizeof(*q_data) > max_priv_data_size)
822 q_data = kmalloc(sizeof(*q_data), GFP_KERNEL);
826 ret = copy_from_user(q_data, user_priv_ptr + *priv_data_offset, sizeof(*q_data));
832 *priv_data_offset += sizeof(*q_data);
833 q_extra_data_size = (uint64_t)q_data->ctl_stack_size + q_data->mqd_size;
835 if (*priv_data_offset + q_extra_data_size > max_priv_data_size) {
840 q_extra_data = kmalloc(q_extra_data_size, GFP_KERNEL);
846 ret = copy_from_user(q_extra_data, user_priv_ptr + *priv_data_offset, q_extra_data_size);
852 *priv_data_offset += q_extra_data_size;
854 pdd = kfd_process_device_data_by_id(p, q_data->gpu_id);
856 pr_err("Failed to get pdd\n");
860 /* data stored in this order: mqd, ctl_stack */
862 ctl_stack = mqd + q_data->mqd_size;
864 memset(&qp, 0, sizeof(qp));
865 set_queue_properties_from_criu(&qp, q_data);
867 print_queue_properties(&qp);
869 ret = pqm_create_queue(&p->pqm, pdd->dev, NULL, &qp, &queue_id, NULL, q_data, mqd, ctl_stack,
872 pr_err("Failed to create new queue err:%d\n", ret);
877 ret = pqm_set_gws(&p->pqm, q_data->q_id, pdd->dev->gws);
881 pr_err("Failed to restore queue (%d)\n", ret);
883 pr_debug("Queue id %d was restored successfully\n", queue_id);
890 int pqm_get_queue_checkpoint_info(struct process_queue_manager *pqm,
893 uint32_t *ctl_stack_size)
895 struct process_queue_node *pqn;
897 pqn = get_queue_by_qid(pqm, qid);
899 pr_debug("amdkfd: No queue %d exists for operation\n", qid);
903 if (!pqn->q->device->dqm->ops.get_queue_checkpoint_info) {
904 pr_err("amdkfd: queue dumping not supported on this device\n");
908 pqn->q->device->dqm->ops.get_queue_checkpoint_info(pqn->q->device->dqm,
914 #if defined(CONFIG_DEBUG_FS)
916 int pqm_debugfs_mqds(struct seq_file *m, void *data)
918 struct process_queue_manager *pqm = data;
919 struct process_queue_node *pqn;
921 enum KFD_MQD_TYPE mqd_type;
922 struct mqd_manager *mqd_mgr;
925 list_for_each_entry(pqn, &pqm->queues, process_queue_list) {
928 switch (q->properties.type) {
929 case KFD_QUEUE_TYPE_SDMA:
930 case KFD_QUEUE_TYPE_SDMA_XGMI:
931 seq_printf(m, " SDMA queue on device %x\n",
933 mqd_type = KFD_MQD_TYPE_SDMA;
935 case KFD_QUEUE_TYPE_COMPUTE:
936 seq_printf(m, " Compute queue on device %x\n",
938 mqd_type = KFD_MQD_TYPE_CP;
942 " Bad user queue type %d on device %x\n",
943 q->properties.type, q->device->id);
946 mqd_mgr = q->device->dqm->mqd_mgrs[mqd_type];
947 } else if (pqn->kq) {
949 mqd_mgr = pqn->kq->mqd_mgr;
950 switch (q->properties.type) {
951 case KFD_QUEUE_TYPE_DIQ:
952 seq_printf(m, " DIQ on device %x\n",
957 " Bad kernel queue type %d on device %x\n",
964 " Weird: Queue node with neither kernel nor user queue\n");
968 r = mqd_mgr->debugfs_show_mqd(m, q->mqd);