2 * i.MX IPUv3 DP Overlay Planes
4 * Copyright (C) 2013 Philipp Zabel, Pengutronix
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
17 #include <drm/drm_atomic.h>
18 #include <drm/drm_atomic_helper.h>
19 #include <drm/drm_fb_cma_helper.h>
20 #include <drm/drm_gem_cma_helper.h>
21 #include <drm/drm_gem_framebuffer_helper.h>
22 #include <drm/drm_plane_helper.h>
24 #include "video/imx-ipu-v3.h"
26 #include "ipuv3-plane.h"
28 struct ipu_plane_state {
29 struct drm_plane_state base;
33 static inline struct ipu_plane_state *
34 to_ipu_plane_state(struct drm_plane_state *p)
36 return container_of(p, struct ipu_plane_state, base);
39 static inline struct ipu_plane *to_ipu_plane(struct drm_plane *p)
41 return container_of(p, struct ipu_plane, base);
44 static const uint32_t ipu_plane_formats[] = {
77 DRM_FORMAT_RGBX8888_A8,
78 DRM_FORMAT_BGRX8888_A8,
81 static const uint64_t ipu_format_modifiers[] = {
82 DRM_FORMAT_MOD_LINEAR,
83 DRM_FORMAT_MOD_INVALID
86 static const uint64_t pre_format_modifiers[] = {
87 DRM_FORMAT_MOD_LINEAR,
88 DRM_FORMAT_MOD_VIVANTE_TILED,
89 DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
90 DRM_FORMAT_MOD_INVALID
93 int ipu_plane_irq(struct ipu_plane *ipu_plane)
95 return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch,
99 static inline unsigned long
100 drm_plane_state_to_eba(struct drm_plane_state *state, int plane)
102 struct drm_framebuffer *fb = state->fb;
103 struct drm_gem_cma_object *cma_obj;
104 int x = state->src.x1 >> 16;
105 int y = state->src.y1 >> 16;
107 cma_obj = drm_fb_cma_get_gem_obj(fb, plane);
110 return cma_obj->paddr + fb->offsets[plane] + fb->pitches[plane] * y +
111 fb->format->cpp[plane] * x;
114 static inline unsigned long
115 drm_plane_state_to_ubo(struct drm_plane_state *state)
117 struct drm_framebuffer *fb = state->fb;
118 struct drm_gem_cma_object *cma_obj;
119 unsigned long eba = drm_plane_state_to_eba(state, 0);
120 int x = state->src.x1 >> 16;
121 int y = state->src.y1 >> 16;
123 cma_obj = drm_fb_cma_get_gem_obj(fb, 1);
126 x /= drm_format_horz_chroma_subsampling(fb->format->format);
127 y /= drm_format_vert_chroma_subsampling(fb->format->format);
129 return cma_obj->paddr + fb->offsets[1] + fb->pitches[1] * y +
130 fb->format->cpp[1] * x - eba;
133 static inline unsigned long
134 drm_plane_state_to_vbo(struct drm_plane_state *state)
136 struct drm_framebuffer *fb = state->fb;
137 struct drm_gem_cma_object *cma_obj;
138 unsigned long eba = drm_plane_state_to_eba(state, 0);
139 int x = state->src.x1 >> 16;
140 int y = state->src.y1 >> 16;
142 cma_obj = drm_fb_cma_get_gem_obj(fb, 2);
145 x /= drm_format_horz_chroma_subsampling(fb->format->format);
146 y /= drm_format_vert_chroma_subsampling(fb->format->format);
148 return cma_obj->paddr + fb->offsets[2] + fb->pitches[2] * y +
149 fb->format->cpp[2] * x - eba;
152 void ipu_plane_put_resources(struct ipu_plane *ipu_plane)
154 if (!IS_ERR_OR_NULL(ipu_plane->dp))
155 ipu_dp_put(ipu_plane->dp);
156 if (!IS_ERR_OR_NULL(ipu_plane->dmfc))
157 ipu_dmfc_put(ipu_plane->dmfc);
158 if (!IS_ERR_OR_NULL(ipu_plane->ipu_ch))
159 ipu_idmac_put(ipu_plane->ipu_ch);
160 if (!IS_ERR_OR_NULL(ipu_plane->alpha_ch))
161 ipu_idmac_put(ipu_plane->alpha_ch);
164 int ipu_plane_get_resources(struct ipu_plane *ipu_plane)
169 ipu_plane->ipu_ch = ipu_idmac_get(ipu_plane->ipu, ipu_plane->dma);
170 if (IS_ERR(ipu_plane->ipu_ch)) {
171 ret = PTR_ERR(ipu_plane->ipu_ch);
172 DRM_ERROR("failed to get idmac channel: %d\n", ret);
176 alpha_ch = ipu_channel_alpha_channel(ipu_plane->dma);
178 ipu_plane->alpha_ch = ipu_idmac_get(ipu_plane->ipu, alpha_ch);
179 if (IS_ERR(ipu_plane->alpha_ch)) {
180 ret = PTR_ERR(ipu_plane->alpha_ch);
181 DRM_ERROR("failed to get alpha idmac channel %d: %d\n",
187 ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma);
188 if (IS_ERR(ipu_plane->dmfc)) {
189 ret = PTR_ERR(ipu_plane->dmfc);
190 DRM_ERROR("failed to get dmfc: ret %d\n", ret);
194 if (ipu_plane->dp_flow >= 0) {
195 ipu_plane->dp = ipu_dp_get(ipu_plane->ipu, ipu_plane->dp_flow);
196 if (IS_ERR(ipu_plane->dp)) {
197 ret = PTR_ERR(ipu_plane->dp);
198 DRM_ERROR("failed to get dp flow: %d\n", ret);
205 ipu_plane_put_resources(ipu_plane);
210 static bool ipu_plane_separate_alpha(struct ipu_plane *ipu_plane)
212 switch (ipu_plane->base.state->fb->format->format) {
213 case DRM_FORMAT_RGB565_A8:
214 case DRM_FORMAT_BGR565_A8:
215 case DRM_FORMAT_RGB888_A8:
216 case DRM_FORMAT_BGR888_A8:
217 case DRM_FORMAT_RGBX8888_A8:
218 case DRM_FORMAT_BGRX8888_A8:
225 static void ipu_plane_enable(struct ipu_plane *ipu_plane)
228 ipu_dp_enable(ipu_plane->ipu);
229 ipu_dmfc_enable_channel(ipu_plane->dmfc);
230 ipu_idmac_enable_channel(ipu_plane->ipu_ch);
231 if (ipu_plane_separate_alpha(ipu_plane))
232 ipu_idmac_enable_channel(ipu_plane->alpha_ch);
234 ipu_dp_enable_channel(ipu_plane->dp);
237 void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel)
239 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
241 ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
243 if (ipu_plane->dp && disable_dp_channel)
244 ipu_dp_disable_channel(ipu_plane->dp, false);
245 ipu_idmac_disable_channel(ipu_plane->ipu_ch);
246 if (ipu_plane->alpha_ch)
247 ipu_idmac_disable_channel(ipu_plane->alpha_ch);
248 ipu_dmfc_disable_channel(ipu_plane->dmfc);
250 ipu_dp_disable(ipu_plane->ipu);
251 if (ipu_prg_present(ipu_plane->ipu))
252 ipu_prg_channel_disable(ipu_plane->ipu_ch);
255 void ipu_plane_disable_deferred(struct drm_plane *plane)
257 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
259 if (ipu_plane->disabling) {
260 ipu_plane->disabling = false;
261 ipu_plane_disable(ipu_plane, false);
264 EXPORT_SYMBOL_GPL(ipu_plane_disable_deferred);
266 static void ipu_plane_destroy(struct drm_plane *plane)
268 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
270 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
272 drm_plane_cleanup(plane);
276 static void ipu_plane_state_reset(struct drm_plane *plane)
278 struct ipu_plane_state *ipu_state;
281 ipu_state = to_ipu_plane_state(plane->state);
282 __drm_atomic_helper_plane_destroy_state(plane->state);
287 ipu_state = kzalloc(sizeof(*ipu_state), GFP_KERNEL);
290 __drm_atomic_helper_plane_reset(plane, &ipu_state->base);
293 static struct drm_plane_state *
294 ipu_plane_duplicate_state(struct drm_plane *plane)
296 struct ipu_plane_state *state;
298 if (WARN_ON(!plane->state))
301 state = kmalloc(sizeof(*state), GFP_KERNEL);
303 __drm_atomic_helper_plane_duplicate_state(plane, &state->base);
308 static void ipu_plane_destroy_state(struct drm_plane *plane,
309 struct drm_plane_state *state)
311 struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
313 __drm_atomic_helper_plane_destroy_state(state);
317 static bool ipu_plane_format_mod_supported(struct drm_plane *plane,
318 uint32_t format, uint64_t modifier)
320 struct ipu_soc *ipu = to_ipu_plane(plane)->ipu;
322 /* linear is supported for all planes and formats */
323 if (modifier == DRM_FORMAT_MOD_LINEAR)
326 /* without a PRG there are no supported modifiers */
327 if (!ipu_prg_present(ipu))
330 return ipu_prg_format_supported(ipu, format, modifier);
333 static const struct drm_plane_funcs ipu_plane_funcs = {
334 .update_plane = drm_atomic_helper_update_plane,
335 .disable_plane = drm_atomic_helper_disable_plane,
336 .destroy = ipu_plane_destroy,
337 .reset = ipu_plane_state_reset,
338 .atomic_duplicate_state = ipu_plane_duplicate_state,
339 .atomic_destroy_state = ipu_plane_destroy_state,
340 .format_mod_supported = ipu_plane_format_mod_supported,
343 static int ipu_plane_atomic_check(struct drm_plane *plane,
344 struct drm_plane_state *state)
346 struct drm_plane_state *old_state = plane->state;
347 struct drm_crtc_state *crtc_state;
348 struct device *dev = plane->dev->dev;
349 struct drm_framebuffer *fb = state->fb;
350 struct drm_framebuffer *old_fb = old_state->fb;
351 unsigned long eba, ubo, vbo, old_ubo, old_vbo, alpha_eba;
352 bool can_position = (plane->type == DRM_PLANE_TYPE_OVERLAY);
364 drm_atomic_get_existing_crtc_state(state->state, state->crtc);
365 if (WARN_ON(!crtc_state))
368 ret = drm_atomic_helper_check_plane_state(state, crtc_state,
369 DRM_PLANE_HELPER_NO_SCALING,
370 DRM_PLANE_HELPER_NO_SCALING,
375 /* CRTC should be enabled */
376 if (!crtc_state->enable)
379 switch (plane->type) {
380 case DRM_PLANE_TYPE_PRIMARY:
381 /* full plane minimum width is 13 pixels */
382 if (drm_rect_width(&state->dst) < 13)
385 case DRM_PLANE_TYPE_OVERLAY:
388 dev_warn(dev, "Unsupported plane type %d\n", plane->type);
392 if (drm_rect_height(&state->dst) < 2)
396 * We support resizing active plane or changing its format by
397 * forcing CRTC mode change in plane's ->atomic_check callback
398 * and disabling all affected active planes in CRTC's ->atomic_disable
399 * callback. The planes will be reenabled in plane's ->atomic_update
403 (drm_rect_width(&state->dst) != drm_rect_width(&old_state->dst) ||
404 drm_rect_height(&state->dst) != drm_rect_height(&old_state->dst) ||
405 fb->format != old_fb->format))
406 crtc_state->mode_changed = true;
408 eba = drm_plane_state_to_eba(state, 0);
413 if (fb->pitches[0] < 1 || fb->pitches[0] > 16384)
416 if (old_fb && fb->pitches[0] != old_fb->pitches[0])
417 crtc_state->mode_changed = true;
419 switch (fb->format->format) {
420 case DRM_FORMAT_YUV420:
421 case DRM_FORMAT_YVU420:
422 case DRM_FORMAT_YUV422:
423 case DRM_FORMAT_YVU422:
424 case DRM_FORMAT_YUV444:
425 case DRM_FORMAT_YVU444:
427 * Multiplanar formats have to meet the following restrictions:
428 * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
429 * - EBA, UBO and VBO are a multiple of 8
430 * - UBO and VBO are unsigned and not larger than 0xfffff8
431 * - Only EBA may be changed while scanout is active
432 * - The strides of U and V planes must be identical.
434 vbo = drm_plane_state_to_vbo(state);
436 if (vbo & 0x7 || vbo > 0xfffff8)
439 if (old_fb && (fb->format == old_fb->format)) {
440 old_vbo = drm_plane_state_to_vbo(old_state);
442 crtc_state->mode_changed = true;
445 if (fb->pitches[1] != fb->pitches[2])
449 case DRM_FORMAT_NV12:
450 case DRM_FORMAT_NV16:
451 ubo = drm_plane_state_to_ubo(state);
453 if (ubo & 0x7 || ubo > 0xfffff8)
456 if (old_fb && (fb->format == old_fb->format)) {
457 old_ubo = drm_plane_state_to_ubo(old_state);
459 crtc_state->mode_changed = true;
462 if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
465 if (old_fb && old_fb->pitches[1] != fb->pitches[1])
466 crtc_state->mode_changed = true;
469 * The x/y offsets must be even in case of horizontal/vertical
470 * chroma subsampling.
472 hsub = drm_format_horz_chroma_subsampling(fb->format->format);
473 vsub = drm_format_vert_chroma_subsampling(fb->format->format);
474 if (((state->src.x1 >> 16) & (hsub - 1)) ||
475 ((state->src.y1 >> 16) & (vsub - 1)))
478 case DRM_FORMAT_RGB565_A8:
479 case DRM_FORMAT_BGR565_A8:
480 case DRM_FORMAT_RGB888_A8:
481 case DRM_FORMAT_BGR888_A8:
482 case DRM_FORMAT_RGBX8888_A8:
483 case DRM_FORMAT_BGRX8888_A8:
484 alpha_eba = drm_plane_state_to_eba(state, 1);
488 if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
491 if (old_fb && old_fb->pitches[1] != fb->pitches[1])
492 crtc_state->mode_changed = true;
499 static void ipu_plane_atomic_disable(struct drm_plane *plane,
500 struct drm_plane_state *old_state)
502 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
505 ipu_dp_disable_channel(ipu_plane->dp, true);
506 ipu_plane->disabling = true;
509 static int ipu_chan_assign_axi_id(int ipu_chan)
512 case IPUV3_CHANNEL_MEM_BG_SYNC:
514 case IPUV3_CHANNEL_MEM_FG_SYNC:
516 case IPUV3_CHANNEL_MEM_DC_SYNC:
523 static void ipu_calculate_bursts(u32 width, u32 cpp, u32 stride,
524 u8 *burstsize, u8 *num_bursts)
526 const unsigned int width_bytes = width * cpp;
527 unsigned int npb, bursts;
529 /* Maximum number of pixels per burst without overshooting stride */
530 for (npb = 64 / cpp; npb > 0; --npb) {
531 if (round_up(width_bytes, npb * cpp) <= stride)
536 /* Maximum number of consecutive bursts without overshooting stride */
537 for (bursts = 8; bursts > 1; bursts /= 2) {
538 if (round_up(width_bytes, npb * cpp * bursts) <= stride)
541 *num_bursts = bursts;
544 static void ipu_plane_atomic_update(struct drm_plane *plane,
545 struct drm_plane_state *old_state)
547 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
548 struct drm_plane_state *state = plane->state;
549 struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
550 struct drm_crtc_state *crtc_state = state->crtc->state;
551 struct drm_framebuffer *fb = state->fb;
552 struct drm_rect *dst = &state->dst;
553 unsigned long eba, ubo, vbo;
554 unsigned long alpha_eba = 0;
555 enum ipu_color_space ics;
556 unsigned int axi_id = 0;
557 const struct drm_format_info *info;
558 u8 burstsize, num_bursts;
562 if (ipu_plane->dp_flow == IPU_DP_FLOW_SYNC_FG)
563 ipu_dp_set_window_pos(ipu_plane->dp, dst->x1, dst->y1);
565 eba = drm_plane_state_to_eba(state, 0);
568 * Configure PRG channel and attached PRE, this changes the EBA to an
569 * internal SRAM location.
571 if (ipu_state->use_pre) {
572 axi_id = ipu_chan_assign_axi_id(ipu_plane->dma);
573 ipu_prg_channel_configure(ipu_plane->ipu_ch, axi_id,
574 drm_rect_width(&state->src) >> 16,
575 drm_rect_height(&state->src) >> 16,
576 fb->pitches[0], fb->format->format,
580 if (old_state->fb && !drm_atomic_crtc_needs_modeset(crtc_state)) {
581 /* nothing to do if PRE is used */
582 if (ipu_state->use_pre)
584 active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
585 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
586 ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
587 if (ipu_plane_separate_alpha(ipu_plane)) {
588 active = ipu_idmac_get_current_buffer(ipu_plane->alpha_ch);
589 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, !active,
591 ipu_idmac_select_buffer(ipu_plane->alpha_ch, !active);
596 ics = ipu_drm_fourcc_to_colorspace(fb->format->format);
597 switch (ipu_plane->dp_flow) {
598 case IPU_DP_FLOW_SYNC_BG:
599 ipu_dp_setup_channel(ipu_plane->dp, ics, IPUV3_COLORSPACE_RGB);
600 ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
602 case IPU_DP_FLOW_SYNC_FG:
603 ipu_dp_setup_channel(ipu_plane->dp, ics,
604 IPUV3_COLORSPACE_UNKNOWN);
605 /* Enable local alpha on partial plane */
606 switch (fb->format->format) {
607 case DRM_FORMAT_ARGB1555:
608 case DRM_FORMAT_ABGR1555:
609 case DRM_FORMAT_RGBA5551:
610 case DRM_FORMAT_BGRA5551:
611 case DRM_FORMAT_ARGB4444:
612 case DRM_FORMAT_ARGB8888:
613 case DRM_FORMAT_ABGR8888:
614 case DRM_FORMAT_RGBA8888:
615 case DRM_FORMAT_BGRA8888:
616 case DRM_FORMAT_RGB565_A8:
617 case DRM_FORMAT_BGR565_A8:
618 case DRM_FORMAT_RGB888_A8:
619 case DRM_FORMAT_BGR888_A8:
620 case DRM_FORMAT_RGBX8888_A8:
621 case DRM_FORMAT_BGRX8888_A8:
622 ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false);
625 ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
630 ipu_dmfc_config_wait4eot(ipu_plane->dmfc, drm_rect_width(dst));
632 width = drm_rect_width(&state->src) >> 16;
633 height = drm_rect_height(&state->src) >> 16;
634 info = drm_format_info(fb->format->format);
635 ipu_calculate_bursts(width, info->cpp[0], fb->pitches[0],
636 &burstsize, &num_bursts);
638 ipu_cpmem_zero(ipu_plane->ipu_ch);
639 ipu_cpmem_set_resolution(ipu_plane->ipu_ch, width, height);
640 ipu_cpmem_set_fmt(ipu_plane->ipu_ch, fb->format->format);
641 ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, burstsize);
642 ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
643 ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
644 ipu_cpmem_set_stride(ipu_plane->ipu_ch, fb->pitches[0]);
645 ipu_cpmem_set_axi_id(ipu_plane->ipu_ch, axi_id);
647 switch (fb->format->format) {
648 case DRM_FORMAT_YUV420:
649 case DRM_FORMAT_YVU420:
650 case DRM_FORMAT_YUV422:
651 case DRM_FORMAT_YVU422:
652 case DRM_FORMAT_YUV444:
653 case DRM_FORMAT_YVU444:
654 ubo = drm_plane_state_to_ubo(state);
655 vbo = drm_plane_state_to_vbo(state);
656 if (fb->format->format == DRM_FORMAT_YVU420 ||
657 fb->format->format == DRM_FORMAT_YVU422 ||
658 fb->format->format == DRM_FORMAT_YVU444)
661 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
662 fb->pitches[1], ubo, vbo);
664 dev_dbg(ipu_plane->base.dev->dev,
665 "phy = %lu %lu %lu, x = %d, y = %d", eba, ubo, vbo,
666 state->src.x1 >> 16, state->src.y1 >> 16);
668 case DRM_FORMAT_NV12:
669 case DRM_FORMAT_NV16:
670 ubo = drm_plane_state_to_ubo(state);
672 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
673 fb->pitches[1], ubo, ubo);
675 dev_dbg(ipu_plane->base.dev->dev,
676 "phy = %lu %lu, x = %d, y = %d", eba, ubo,
677 state->src.x1 >> 16, state->src.y1 >> 16);
679 case DRM_FORMAT_RGB565_A8:
680 case DRM_FORMAT_BGR565_A8:
681 case DRM_FORMAT_RGB888_A8:
682 case DRM_FORMAT_BGR888_A8:
683 case DRM_FORMAT_RGBX8888_A8:
684 case DRM_FORMAT_BGRX8888_A8:
685 alpha_eba = drm_plane_state_to_eba(state, 1);
688 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu %lu, x = %d, y = %d",
689 eba, alpha_eba, state->src.x1 >> 16, state->src.y1 >> 16);
691 ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, 16);
693 ipu_cpmem_zero(ipu_plane->alpha_ch);
694 ipu_cpmem_set_resolution(ipu_plane->alpha_ch,
695 drm_rect_width(&state->src) >> 16,
696 drm_rect_height(&state->src) >> 16);
697 ipu_cpmem_set_format_passthrough(ipu_plane->alpha_ch, 8);
698 ipu_cpmem_set_high_priority(ipu_plane->alpha_ch);
699 ipu_idmac_set_double_buffer(ipu_plane->alpha_ch, 1);
700 ipu_cpmem_set_stride(ipu_plane->alpha_ch, fb->pitches[1]);
701 ipu_cpmem_set_burstsize(ipu_plane->alpha_ch, 16);
702 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 0, alpha_eba);
703 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 1, alpha_eba);
706 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu, x = %d, y = %d",
707 eba, state->src.x1 >> 16, state->src.y1 >> 16);
710 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 0, eba);
711 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
712 ipu_idmac_lock_enable(ipu_plane->ipu_ch, num_bursts);
713 ipu_plane_enable(ipu_plane);
716 static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {
717 .prepare_fb = drm_gem_fb_prepare_fb,
718 .atomic_check = ipu_plane_atomic_check,
719 .atomic_disable = ipu_plane_atomic_disable,
720 .atomic_update = ipu_plane_atomic_update,
723 int ipu_planes_assign_pre(struct drm_device *dev,
724 struct drm_atomic_state *state)
726 struct drm_crtc_state *old_crtc_state, *crtc_state;
727 struct drm_plane_state *plane_state;
728 struct ipu_plane_state *ipu_state;
729 struct ipu_plane *ipu_plane;
730 struct drm_plane *plane;
731 struct drm_crtc *crtc;
732 int available_pres = ipu_prg_max_active_channels();
735 for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc_state, i) {
736 ret = drm_atomic_add_affected_planes(state, crtc);
742 * We are going over the planes in 2 passes: first we assign PREs to
743 * planes with a tiling modifier, which need the PREs to resolve into
744 * linear. Any failure to assign a PRE there is fatal. In the second
745 * pass we try to assign PREs to linear FBs, to improve memory access
746 * patterns for them. Failure at this point is non-fatal, as we can
747 * scan out linear FBs without a PRE.
749 for_each_new_plane_in_state(state, plane, plane_state, i) {
750 ipu_state = to_ipu_plane_state(plane_state);
751 ipu_plane = to_ipu_plane(plane);
753 if (!plane_state->fb) {
754 ipu_state->use_pre = false;
758 if (!(plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) ||
759 plane_state->fb->modifier == DRM_FORMAT_MOD_LINEAR)
762 if (!ipu_prg_present(ipu_plane->ipu) || !available_pres)
765 if (!ipu_prg_format_supported(ipu_plane->ipu,
766 plane_state->fb->format->format,
767 plane_state->fb->modifier))
770 ipu_state->use_pre = true;
774 for_each_new_plane_in_state(state, plane, plane_state, i) {
775 ipu_state = to_ipu_plane_state(plane_state);
776 ipu_plane = to_ipu_plane(plane);
778 if (!plane_state->fb) {
779 ipu_state->use_pre = false;
783 if ((plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) &&
784 plane_state->fb->modifier != DRM_FORMAT_MOD_LINEAR)
787 /* make sure that modifier is initialized */
788 plane_state->fb->modifier = DRM_FORMAT_MOD_LINEAR;
790 if (ipu_prg_present(ipu_plane->ipu) && available_pres &&
791 ipu_prg_format_supported(ipu_plane->ipu,
792 plane_state->fb->format->format,
793 plane_state->fb->modifier)) {
794 ipu_state->use_pre = true;
797 ipu_state->use_pre = false;
803 EXPORT_SYMBOL_GPL(ipu_planes_assign_pre);
805 struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
806 int dma, int dp, unsigned int possible_crtcs,
807 enum drm_plane_type type)
809 struct ipu_plane *ipu_plane;
810 const uint64_t *modifiers = ipu_format_modifiers;
813 DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",
814 dma, dp, possible_crtcs);
816 ipu_plane = kzalloc(sizeof(*ipu_plane), GFP_KERNEL);
818 DRM_ERROR("failed to allocate plane\n");
819 return ERR_PTR(-ENOMEM);
822 ipu_plane->ipu = ipu;
823 ipu_plane->dma = dma;
824 ipu_plane->dp_flow = dp;
826 if (ipu_prg_present(ipu))
827 modifiers = pre_format_modifiers;
829 ret = drm_universal_plane_init(dev, &ipu_plane->base, possible_crtcs,
830 &ipu_plane_funcs, ipu_plane_formats,
831 ARRAY_SIZE(ipu_plane_formats),
832 modifiers, type, NULL);
834 DRM_ERROR("failed to initialize plane\n");
839 drm_plane_helper_add(&ipu_plane->base, &ipu_plane_helper_funcs);