drivers/scsi/mpt2sas/mpi/mpi2_ioc.h

   1 /*
   2  *  Copyright (c) 2000-2011 LSI Corporation.
   3  *
   4  *
   5  *           Name:  mpi2_ioc.h
   6  *          Title:  MPI IOC, Port, Event, FW Download, and FW Upload messages
   7  *  Creation Date:  October 11, 2006
   8  *
   9  *  mpi2_ioc.h Version:  02.00.18
  10  *
  11  *  Version History
  12  *  ---------------
  13  *
  14  *  Date      Version   Description
  15  *  --------  --------  ------------------------------------------------------
  16  *  04-30-07  02.00.00  Corresponds to Fusion-MPT MPI Specification Rev A.
  17  *  06-04-07  02.00.01  In IOCFacts Reply structure, renamed MaxDevices to
  18  *                      MaxTargets.
  19  *                      Added TotalImageSize field to FWDownload Request.
  20  *                      Added reserved words to FWUpload Request.
  21  *  06-26-07  02.00.02  Added IR Configuration Change List Event.
  22  *  08-31-07  02.00.03  Removed SystemReplyQueueDepth field from the IOCInit
  23  *                      request and replaced it with
  24  *                      ReplyDescriptorPostQueueDepth and ReplyFreeQueueDepth.
  25  *                      Replaced the MinReplyQueueDepth field of the IOCFacts
  26  *                      reply with MaxReplyDescriptorPostQueueDepth.
  27  *                      Added MPI2_RDPQ_DEPTH_MIN define to specify the minimum
  28  *                      depth for the Reply Descriptor Post Queue.
  29  *                      Added SASAddress field to Initiator Device Table
  30  *                      Overflow Event data.
  31  *  10-31-07  02.00.04  Added ReasonCode MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING
  32  *                      for SAS Initiator Device Status Change Event data.
  33  *                      Modified Reason Code defines for SAS Topology Change
  34  *                      List Event data, including adding a bit for PHY Vacant
  35  *                      status, and adding a mask for the Reason Code.
  36  *                      Added define for
  37  *                      MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING.
  38  *                      Added define for MPI2_EXT_IMAGE_TYPE_MEGARAID.
  39  *  12-18-07  02.00.05  Added Boot Status defines for the IOCExceptions field of
  40  *                      the IOCFacts Reply.
  41  *                      Removed MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
  42  *                      Moved MPI2_VERSION_UNION to mpi2.h.
  43  *                      Changed MPI2_EVENT_NOTIFICATION_REQUEST to use masks
  44  *                      instead of enables, and added SASBroadcastPrimitiveMasks
  45  *                      field.
  46  *                      Added Log Entry Added Event and related structure.
  47  *  02-29-08  02.00.06  Added define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID.
  48  *                      Removed define MPI2_IOCFACTS_PROTOCOL_SMP_TARGET.
  49  *                      Added MaxVolumes and MaxPersistentEntries fields to
  50  *                      IOCFacts reply.
  51  *                      Added ProtocalFlags and IOCCapabilities fields to
  52  *                      MPI2_FW_IMAGE_HEADER.
  53  *                      Removed MPI2_PORTENABLE_FLAGS_ENABLE_SINGLE_PORT.
  54  *  03-03-08  02.00.07  Fixed MPI2_FW_IMAGE_HEADER by changing Reserved26 to
  55  *                      a U16 (from a U32).
  56  *                      Removed extra 's' from EventMasks name.
  57  *  06-27-08  02.00.08  Fixed an offset in a comment.
  58  *  10-02-08  02.00.09  Removed SystemReplyFrameSize from MPI2_IOC_INIT_REQUEST.
  59  *                      Removed CurReplyFrameSize from MPI2_IOC_FACTS_REPLY and
  60  *                      renamed MinReplyFrameSize to ReplyFrameSize.
  61  *                      Added MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX.
  62  *                      Added two new RAIDOperation values for Integrated RAID
  63  *                      Operations Status Event data.
  64  *                      Added four new IR Configuration Change List Event data
  65  *                      ReasonCode values.
  66  *                      Added two new ReasonCode defines for SAS Device Status
  67  *                      Change Event data.
  68  *                      Added three new DiscoveryStatus bits for the SAS
  69  *                      Discovery event data.
  70  *                      Added Multiplexing Status Change bit to the PhyStatus
  71  *                      field of the SAS Topology Change List event data.
  72  *                      Removed define for MPI2_INIT_IMAGE_BOOTFLAGS_XMEMCOPY.
  73  *                      BootFlags are now product-specific.
  74  *                      Added defines for the indivdual signature bytes
  75  *                      for MPI2_INIT_IMAGE_FOOTER.
  76  *  01-19-09  02.00.10  Added MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY define.
  77  *                      Added MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR
  78  *                      define.
  79  *                      Added MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE
  80  *                      define.
  81  *                      Removed MPI2_EVENT_SAS_DISC_DS_SATA_INIT_FAILURE define.
  82  *  05-06-09  02.00.11  Added MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR define.
  83  *                      Added MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX define.
  84  *                      Added two new reason codes for SAS Device Status Change
  85  *                      Event.
  86  *                      Added new event: SAS PHY Counter.
  87  *  07-30-09  02.00.12  Added GPIO Interrupt event define and structure.
  88  *                      Added MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
  89  *                      Added new product id family for 2208.
  90  *  10-28-09  02.00.13  Added HostMSIxVectors field to MPI2_IOC_INIT_REQUEST.
  91  *                      Added MaxMSIxVectors field to MPI2_IOC_FACTS_REPLY.
  92  *                      Added MinDevHandle field to MPI2_IOC_FACTS_REPLY.
  93  *                      Added MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY.
  94  *                      Added MPI2_EVENT_HOST_BASED_DISCOVERY_PHY define.
  95  *                      Added MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER define.
  96  *                      Added Host Based Discovery Phy Event data.
  97  *                      Added defines for ProductID Product field
  98  *                      (MPI2_FW_HEADER_PID_).
  99  *                      Modified values for SAS ProductID Family
 100  *                      (MPI2_FW_HEADER_PID_FAMILY_).
 101  *  02-10-10  02.00.14  Added SAS Quiesce Event structure and defines.
 102  *                      Added PowerManagementControl Request structures and
 103  *                      defines.
 104  *  05-12-10  02.00.15  Marked Task Set Full Event as obsolete.
 105  *                      Added MPI2_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY define.
 106  *  11-10-10  02.00.16  Added MPI2_FW_DOWNLOAD_ITYPE_MIN_PRODUCT_SPECIFIC.
 107  *  02-23-11  02.00.17  Added SAS NOTIFY Primitive event, and added
 108  *                      SASNotifyPrimitiveMasks field to
 109  *                      MPI2_EVENT_NOTIFICATION_REQUEST.
 110  *                      Added Temperature Threshold Event.
 111  *                      Added Host Message Event.
 112  *                      Added Send Host Message request and reply.
 113  *  05-25-11  02.00.18  For Extended Image Header, added
 114  *                      MPI2_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC and
 115  *                      MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC defines.
 116  *                      Deprecated MPI2_EXT_IMAGE_TYPE_MAX define.
 117  *  --------------------------------------------------------------------------
 118  */
 119
 120 #ifndef MPI2_IOC_H
 121 #define MPI2_IOC_H
 122
 123 /*****************************************************************************
 124 *
 125 *               IOC Messages
 126 *
 127 *****************************************************************************/
 128
 129 /****************************************************************************
 130 *  IOCInit message
 131 ****************************************************************************/
 132
 133 /* IOCInit Request message */
 134 typedef struct _MPI2_IOC_INIT_REQUEST
 135 {
 136     U8                      WhoInit;                        /* 0x00 */
 137     U8                      Reserved1;                      /* 0x01 */
 138     U8                      ChainOffset;                    /* 0x02 */
 139     U8                      Function;                       /* 0x03 */
 140     U16                     Reserved2;                      /* 0x04 */
 141     U8                      Reserved3;                      /* 0x06 */
 142     U8                      MsgFlags;                       /* 0x07 */
 143     U8                      VP_ID;                          /* 0x08 */
 144     U8                      VF_ID;                          /* 0x09 */
 145     U16                     Reserved4;                      /* 0x0A */
 146     U16                     MsgVersion;                     /* 0x0C */
 147     U16                     HeaderVersion;                  /* 0x0E */
 148     U32                     Reserved5;                      /* 0x10 */
 149     U16                     Reserved6;                      /* 0x14 */
 150     U8                      Reserved7;                      /* 0x16 */
 151     U8                      HostMSIxVectors;                /* 0x17 */
 152     U16                     Reserved8;                      /* 0x18 */
 153     U16                     SystemRequestFrameSize;         /* 0x1A */
 154     U16                     ReplyDescriptorPostQueueDepth;  /* 0x1C */
 155     U16                     ReplyFreeQueueDepth;            /* 0x1E */
 156     U32                     SenseBufferAddressHigh;         /* 0x20 */
 157     U32                     SystemReplyAddressHigh;         /* 0x24 */
 158     U64                     SystemRequestFrameBaseAddress;  /* 0x28 */
 159     U64                     ReplyDescriptorPostQueueAddress;/* 0x30 */
 160     U64                     ReplyFreeQueueAddress;          /* 0x38 */
 161     U64                     TimeStamp;                      /* 0x40 */
 162 } MPI2_IOC_INIT_REQUEST, MPI2_POINTER PTR_MPI2_IOC_INIT_REQUEST,
 163   Mpi2IOCInitRequest_t, MPI2_POINTER pMpi2IOCInitRequest_t;
 164
 165 /* WhoInit values */
 166 #define MPI2_WHOINIT_NOT_INITIALIZED            (0x00)
 167 #define MPI2_WHOINIT_SYSTEM_BIOS                (0x01)
 168 #define MPI2_WHOINIT_ROM_BIOS                   (0x02)
 169 #define MPI2_WHOINIT_PCI_PEER                   (0x03)
 170 #define MPI2_WHOINIT_HOST_DRIVER                (0x04)
 171 #define MPI2_WHOINIT_MANUFACTURER               (0x05)
 172
 173 /* MsgVersion */
 174 #define MPI2_IOCINIT_MSGVERSION_MAJOR_MASK      (0xFF00)
 175 #define MPI2_IOCINIT_MSGVERSION_MAJOR_SHIFT     (8)
 176 #define MPI2_IOCINIT_MSGVERSION_MINOR_MASK      (0x00FF)
 177 #define MPI2_IOCINIT_MSGVERSION_MINOR_SHIFT     (0)
 178
 179 /* HeaderVersion */
 180 #define MPI2_IOCINIT_HDRVERSION_UNIT_MASK       (0xFF00)
 181 #define MPI2_IOCINIT_HDRVERSION_UNIT_SHIFT      (8)
 182 #define MPI2_IOCINIT_HDRVERSION_DEV_MASK        (0x00FF)
 183 #define MPI2_IOCINIT_HDRVERSION_DEV_SHIFT       (0)
 184
 185 /* minimum depth for the Reply Descriptor Post Queue */
 186 #define MPI2_RDPQ_DEPTH_MIN                     (16)
 187
 188
 189 /* IOCInit Reply message */
 190 typedef struct _MPI2_IOC_INIT_REPLY
 191 {
 192     U8                      WhoInit;                        /* 0x00 */
 193     U8                      Reserved1;                      /* 0x01 */
 194     U8                      MsgLength;                      /* 0x02 */
 195     U8                      Function;                       /* 0x03 */
 196     U16                     Reserved2;                      /* 0x04 */
 197     U8                      Reserved3;                      /* 0x06 */
 198     U8                      MsgFlags;                       /* 0x07 */
 199     U8                      VP_ID;                          /* 0x08 */
 200     U8                      VF_ID;                          /* 0x09 */
 201     U16                     Reserved4;                      /* 0x0A */
 202     U16                     Reserved5;                      /* 0x0C */
 203     U16                     IOCStatus;                      /* 0x0E */
 204     U32                     IOCLogInfo;                     /* 0x10 */
 205 } MPI2_IOC_INIT_REPLY, MPI2_POINTER PTR_MPI2_IOC_INIT_REPLY,
 206   Mpi2IOCInitReply_t, MPI2_POINTER pMpi2IOCInitReply_t;
 207
 208
 209 /****************************************************************************
 210 *  IOCFacts message
 211 ****************************************************************************/
 212
 213 /* IOCFacts Request message */
 214 typedef struct _MPI2_IOC_FACTS_REQUEST
 215 {
 216     U16                     Reserved1;                      /* 0x00 */
 217     U8                      ChainOffset;                    /* 0x02 */
 218     U8                      Function;                       /* 0x03 */
 219     U16                     Reserved2;                      /* 0x04 */
 220     U8                      Reserved3;                      /* 0x06 */
 221     U8                      MsgFlags;                       /* 0x07 */
 222     U8                      VP_ID;                          /* 0x08 */
 223     U8                      VF_ID;                          /* 0x09 */
 224     U16                     Reserved4;                      /* 0x0A */
 225 } MPI2_IOC_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_IOC_FACTS_REQUEST,
 226   Mpi2IOCFactsRequest_t, MPI2_POINTER pMpi2IOCFactsRequest_t;
 227
 228
 229 /* IOCFacts Reply message */
 230 typedef struct _MPI2_IOC_FACTS_REPLY
 231 {
 232     U16                     MsgVersion;                     /* 0x00 */
 233     U8                      MsgLength;                      /* 0x02 */
 234     U8                      Function;                       /* 0x03 */
 235     U16                     HeaderVersion;                  /* 0x04 */
 236     U8                      IOCNumber;                      /* 0x06 */
 237     U8                      MsgFlags;                       /* 0x07 */
 238     U8                      VP_ID;                          /* 0x08 */
 239     U8                      VF_ID;                          /* 0x09 */
 240     U16                     Reserved1;                      /* 0x0A */
 241     U16                     IOCExceptions;                  /* 0x0C */
 242     U16                     IOCStatus;                      /* 0x0E */
 243     U32                     IOCLogInfo;                     /* 0x10 */
 244     U8                      MaxChainDepth;                  /* 0x14 */
 245     U8                      WhoInit;                        /* 0x15 */
 246     U8                      NumberOfPorts;                  /* 0x16 */
 247     U8                      MaxMSIxVectors;                 /* 0x17 */
 248     U16                     RequestCredit;                  /* 0x18 */
 249     U16                     ProductID;                      /* 0x1A */
 250     U32                     IOCCapabilities;                /* 0x1C */
 251     MPI2_VERSION_UNION      FWVersion;                      /* 0x20 */
 252     U16                     IOCRequestFrameSize;            /* 0x24 */
 253     U16                     Reserved3;                      /* 0x26 */
 254     U16                     MaxInitiators;                  /* 0x28 */
 255     U16                     MaxTargets;                     /* 0x2A */
 256     U16                     MaxSasExpanders;                /* 0x2C */
 257     U16                     MaxEnclosures;                  /* 0x2E */
 258     U16                     ProtocolFlags;                  /* 0x30 */
 259     U16                     HighPriorityCredit;             /* 0x32 */
 260     U16                     MaxReplyDescriptorPostQueueDepth; /* 0x34 */
 261     U8                      ReplyFrameSize;                 /* 0x36 */
 262     U8                      MaxVolumes;                     /* 0x37 */
 263     U16                     MaxDevHandle;                   /* 0x38 */
 264     U16                     MaxPersistentEntries;           /* 0x3A */
 265     U16                     MinDevHandle;                   /* 0x3C */
 266     U16                     Reserved4;                      /* 0x3E */
 267 } MPI2_IOC_FACTS_REPLY, MPI2_POINTER PTR_MPI2_IOC_FACTS_REPLY,
 268   Mpi2IOCFactsReply_t, MPI2_POINTER pMpi2IOCFactsReply_t;
 269
 270 /* MsgVersion */
 271 #define MPI2_IOCFACTS_MSGVERSION_MAJOR_MASK             (0xFF00)
 272 #define MPI2_IOCFACTS_MSGVERSION_MAJOR_SHIFT            (8)
 273 #define MPI2_IOCFACTS_MSGVERSION_MINOR_MASK             (0x00FF)
 274 #define MPI2_IOCFACTS_MSGVERSION_MINOR_SHIFT            (0)
 275
 276 /* HeaderVersion */
 277 #define MPI2_IOCFACTS_HDRVERSION_UNIT_MASK              (0xFF00)
 278 #define MPI2_IOCFACTS_HDRVERSION_UNIT_SHIFT             (8)
 279 #define MPI2_IOCFACTS_HDRVERSION_DEV_MASK               (0x00FF)
 280 #define MPI2_IOCFACTS_HDRVERSION_DEV_SHIFT              (0)
 281
 282 /* IOCExceptions */
 283 #define MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX      (0x0100)
 284
 285 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_MASK              (0x00E0)
 286 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_GOOD              (0x0000)
 287 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_BACKUP            (0x0020)
 288 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_RESTORED          (0x0040)
 289 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_CORRUPT_BACKUP    (0x0060)
 290
 291 #define MPI2_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED       (0x0010)
 292 #define MPI2_IOCFACTS_EXCEPT_MANUFACT_CHECKSUM_FAIL     (0x0008)
 293 #define MPI2_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL           (0x0004)
 294 #define MPI2_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID        (0x0002)
 295 #define MPI2_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL       (0x0001)
 296
 297 /* defines for WhoInit field are after the IOCInit Request */
 298
 299 /* ProductID field uses MPI2_FW_HEADER_PID_ */
 300
 301 /* IOCCapabilities */
 302 #define MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY   (0x00010000)
 303 #define MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX            (0x00008000)
 304 #define MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR       (0x00004000)
 305 #define MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY           (0x00002000)
 306 #define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID        (0x00001000)
 307 #define MPI2_IOCFACTS_CAPABILITY_TLR                    (0x00000800)
 308 #define MPI2_IOCFACTS_CAPABILITY_MULTICAST              (0x00000100)
 309 #define MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET   (0x00000080)
 310 #define MPI2_IOCFACTS_CAPABILITY_EEDP                   (0x00000040)
 311 #define MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER        (0x00000020)
 312 #define MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER        (0x00000010)
 313 #define MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER      (0x00000008)
 314 #define MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING (0x00000004)
 315
 316 /* ProtocolFlags */
 317 #define MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET              (0x0001)
 318 #define MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR           (0x0002)
 319
 320
 321 /****************************************************************************
 322 *  PortFacts message
 323 ****************************************************************************/
 324
 325 /* PortFacts Request message */
 326 typedef struct _MPI2_PORT_FACTS_REQUEST
 327 {
 328     U16                     Reserved1;                      /* 0x00 */
 329     U8                      ChainOffset;                    /* 0x02 */
 330     U8                      Function;                       /* 0x03 */
 331     U16                     Reserved2;                      /* 0x04 */
 332     U8                      PortNumber;                     /* 0x06 */
 333     U8                      MsgFlags;                       /* 0x07 */
 334     U8                      VP_ID;                          /* 0x08 */
 335     U8                      VF_ID;                          /* 0x09 */
 336     U16                     Reserved3;                      /* 0x0A */
 337 } MPI2_PORT_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_PORT_FACTS_REQUEST,
 338   Mpi2PortFactsRequest_t, MPI2_POINTER pMpi2PortFactsRequest_t;
 339
 340 /* PortFacts Reply message */
 341 typedef struct _MPI2_PORT_FACTS_REPLY
 342 {
 343     U16                     Reserved1;                      /* 0x00 */
 344     U8                      MsgLength;                      /* 0x02 */
 345     U8                      Function;                       /* 0x03 */
 346     U16                     Reserved2;                      /* 0x04 */
 347     U8                      PortNumber;                     /* 0x06 */
 348     U8                      MsgFlags;                       /* 0x07 */
 349     U8                      VP_ID;                          /* 0x08 */
 350     U8                      VF_ID;                          /* 0x09 */
 351     U16                     Reserved3;                      /* 0x0A */
 352     U16                     Reserved4;                      /* 0x0C */
 353     U16                     IOCStatus;                      /* 0x0E */
 354     U32                     IOCLogInfo;                     /* 0x10 */
 355     U8                      Reserved5;                      /* 0x14 */
 356     U8                      PortType;                       /* 0x15 */
 357     U16                     Reserved6;                      /* 0x16 */
 358     U16                     MaxPostedCmdBuffers;            /* 0x18 */
 359     U16                     Reserved7;                      /* 0x1A */
 360 } MPI2_PORT_FACTS_REPLY, MPI2_POINTER PTR_MPI2_PORT_FACTS_REPLY,
 361   Mpi2PortFactsReply_t, MPI2_POINTER pMpi2PortFactsReply_t;
 362
 363 /* PortType values */
 364 #define MPI2_PORTFACTS_PORTTYPE_INACTIVE            (0x00)
 365 #define MPI2_PORTFACTS_PORTTYPE_FC                  (0x10)
 366 #define MPI2_PORTFACTS_PORTTYPE_ISCSI               (0x20)
 367 #define MPI2_PORTFACTS_PORTTYPE_SAS_PHYSICAL        (0x30)
 368 #define MPI2_PORTFACTS_PORTTYPE_SAS_VIRTUAL         (0x31)
 369
 370
 371 /****************************************************************************
 372 *  PortEnable message
 373 ****************************************************************************/
 374
 375 /* PortEnable Request message */
 376 typedef struct _MPI2_PORT_ENABLE_REQUEST
 377 {
 378     U16                     Reserved1;                      /* 0x00 */
 379     U8                      ChainOffset;                    /* 0x02 */
 380     U8                      Function;                       /* 0x03 */
 381     U8                      Reserved2;                      /* 0x04 */
 382     U8                      PortFlags;                      /* 0x05 */
 383     U8                      Reserved3;                      /* 0x06 */
 384     U8                      MsgFlags;                       /* 0x07 */
 385     U8                      VP_ID;                          /* 0x08 */
 386     U8                      VF_ID;                          /* 0x09 */
 387     U16                     Reserved4;                      /* 0x0A */
 388 } MPI2_PORT_ENABLE_REQUEST, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REQUEST,
 389   Mpi2PortEnableRequest_t, MPI2_POINTER pMpi2PortEnableRequest_t;
 390
 391
 392 /* PortEnable Reply message */
 393 typedef struct _MPI2_PORT_ENABLE_REPLY
 394 {
 395     U16                     Reserved1;                      /* 0x00 */
 396     U8                      MsgLength;                      /* 0x02 */
 397     U8                      Function;                       /* 0x03 */
 398     U8                      Reserved2;                      /* 0x04 */
 399     U8                      PortFlags;                      /* 0x05 */
 400     U8                      Reserved3;                      /* 0x06 */
 401     U8                      MsgFlags;                       /* 0x07 */
 402     U8                      VP_ID;                          /* 0x08 */
 403     U8                      VF_ID;                          /* 0x09 */
 404     U16                     Reserved4;                      /* 0x0A */
 405     U16                     Reserved5;                      /* 0x0C */
 406     U16                     IOCStatus;                      /* 0x0E */
 407     U32                     IOCLogInfo;                     /* 0x10 */
 408 } MPI2_PORT_ENABLE_REPLY, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REPLY,
 409   Mpi2PortEnableReply_t, MPI2_POINTER pMpi2PortEnableReply_t;
 410
 411
 412 /****************************************************************************
 413 *  EventNotification message
 414 ****************************************************************************/
 415
 416 /* EventNotification Request message */
 417 #define MPI2_EVENT_NOTIFY_EVENTMASK_WORDS           (4)
 418
 419 typedef struct _MPI2_EVENT_NOTIFICATION_REQUEST
 420 {
 421     U16                     Reserved1;                      /* 0x00 */
 422     U8                      ChainOffset;                    /* 0x02 */
 423     U8                      Function;                       /* 0x03 */
 424     U16                     Reserved2;                      /* 0x04 */
 425     U8                      Reserved3;                      /* 0x06 */
 426     U8                      MsgFlags;                       /* 0x07 */
 427     U8                      VP_ID;                          /* 0x08 */
 428     U8                      VF_ID;                          /* 0x09 */
 429     U16                     Reserved4;                      /* 0x0A */
 430     U32                     Reserved5;                      /* 0x0C */
 431     U32                     Reserved6;                      /* 0x10 */
 432     U32                     EventMasks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];/* 0x14 */
 433     U16                     SASBroadcastPrimitiveMasks;     /* 0x24 */
 434          U16                     SASNotifyPrimitiveMasks;        /* 0x26 */
 435     U32                     Reserved8;                      /* 0x28 */
 436 } MPI2_EVENT_NOTIFICATION_REQUEST,
 437   MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REQUEST,
 438   Mpi2EventNotificationRequest_t, MPI2_POINTER pMpi2EventNotificationRequest_t;
 439
 440
 441 /* EventNotification Reply message */
 442 typedef struct _MPI2_EVENT_NOTIFICATION_REPLY
 443 {
 444     U16                     EventDataLength;                /* 0x00 */
 445     U8                      MsgLength;                      /* 0x02 */
 446     U8                      Function;                       /* 0x03 */
 447     U16                     Reserved1;                      /* 0x04 */
 448     U8                      AckRequired;                    /* 0x06 */
 449     U8                      MsgFlags;                       /* 0x07 */
 450     U8                      VP_ID;                          /* 0x08 */
 451     U8                      VF_ID;                          /* 0x09 */
 452     U16                     Reserved2;                      /* 0x0A */
 453     U16                     Reserved3;                      /* 0x0C */
 454     U16                     IOCStatus;                      /* 0x0E */
 455     U32                     IOCLogInfo;                     /* 0x10 */
 456     U16                     Event;                          /* 0x14 */
 457     U16                     Reserved4;                      /* 0x16 */
 458     U32                     EventContext;                   /* 0x18 */
 459     U32                     EventData[1];                   /* 0x1C */
 460 } MPI2_EVENT_NOTIFICATION_REPLY, MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REPLY,
 461   Mpi2EventNotificationReply_t, MPI2_POINTER pMpi2EventNotificationReply_t;
 462
 463 /* AckRequired */
 464 #define MPI2_EVENT_NOTIFICATION_ACK_NOT_REQUIRED    (0x00)
 465 #define MPI2_EVENT_NOTIFICATION_ACK_REQUIRED        (0x01)
 466
 467 /* Event */
 468 #define MPI2_EVENT_LOG_DATA                         (0x0001)
 469 #define MPI2_EVENT_STATE_CHANGE                     (0x0002)
 470 #define MPI2_EVENT_HARD_RESET_RECEIVED              (0x0005)
 471 #define MPI2_EVENT_EVENT_CHANGE                     (0x000A)
 472 #define MPI2_EVENT_TASK_SET_FULL                    (0x000E) /* obsolete */
 473 #define MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE         (0x000F)
 474 #define MPI2_EVENT_IR_OPERATION_STATUS              (0x0014)
 475 #define MPI2_EVENT_SAS_DISCOVERY                    (0x0016)
 476 #define MPI2_EVENT_SAS_BROADCAST_PRIMITIVE          (0x0017)
 477 #define MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE    (0x0018)
 478 #define MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW          (0x0019)
 479 #define MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST         (0x001C)
 480 #define MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE    (0x001D)
 481 #define MPI2_EVENT_IR_VOLUME                        (0x001E)
 482 #define MPI2_EVENT_IR_PHYSICAL_DISK                 (0x001F)
 483 #define MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST     (0x0020)
 484 #define MPI2_EVENT_LOG_ENTRY_ADDED                  (0x0021)
 485 #define MPI2_EVENT_SAS_PHY_COUNTER                  (0x0022)
 486 #define MPI2_EVENT_GPIO_INTERRUPT                   (0x0023)
 487 #define MPI2_EVENT_HOST_BASED_DISCOVERY_PHY         (0x0024)
 488 #define MPI2_EVENT_SAS_QUIESCE                      (0x0025)
 489 #define MPI2_EVENT_SAS_NOTIFY_PRIMITIVE             (0x0026)
 490 #define MPI2_EVENT_TEMP_THRESHOLD                   (0x0027)
 491 #define MPI2_EVENT_HOST_MESSAGE                     (0x0028)
 492
 493
 494 /* Log Entry Added Event data */
 495
 496 /* the following structure matches MPI2_LOG_0_ENTRY in mpi2_cnfg.h */
 497 #define MPI2_EVENT_DATA_LOG_DATA_LENGTH             (0x1C)
 498
 499 typedef struct _MPI2_EVENT_DATA_LOG_ENTRY_ADDED
 500 {
 501     U64         TimeStamp;                          /* 0x00 */
 502     U32         Reserved1;                          /* 0x08 */
 503     U16         LogSequence;                        /* 0x0C */
 504     U16         LogEntryQualifier;                  /* 0x0E */
 505     U8          VP_ID;                              /* 0x10 */
 506     U8          VF_ID;                              /* 0x11 */
 507     U16         Reserved2;                          /* 0x12 */
 508     U8          LogData[MPI2_EVENT_DATA_LOG_DATA_LENGTH];/* 0x14 */
 509 } MPI2_EVENT_DATA_LOG_ENTRY_ADDED,
 510   MPI2_POINTER PTR_MPI2_EVENT_DATA_LOG_ENTRY_ADDED,
 511   Mpi2EventDataLogEntryAdded_t, MPI2_POINTER pMpi2EventDataLogEntryAdded_t;
 512
 513 /* GPIO Interrupt Event data */
 514
 515 typedef struct _MPI2_EVENT_DATA_GPIO_INTERRUPT {
 516     U8          GPIONum;                            /* 0x00 */
 517     U8          Reserved1;                          /* 0x01 */
 518     U16         Reserved2;                          /* 0x02 */
 519 } MPI2_EVENT_DATA_GPIO_INTERRUPT,
 520   MPI2_POINTER PTR_MPI2_EVENT_DATA_GPIO_INTERRUPT,
 521   Mpi2EventDataGpioInterrupt_t, MPI2_POINTER pMpi2EventDataGpioInterrupt_t;
 522
 523 /* Temperature Threshold Event data */
 524
 525 typedef struct _MPI2_EVENT_DATA_TEMPERATURE {
 526         U16         Status;                             /* 0x00 */
 527         U8          SensorNum;                          /* 0x02 */
 528         U8          Reserved1;                          /* 0x03 */
 529         U16         CurrentTemperature;                 /* 0x04 */
 530         U16         Reserved2;                          /* 0x06 */
 531         U32         Reserved3;                          /* 0x08 */
 532         U32         Reserved4;                          /* 0x0C */
 533 } MPI2_EVENT_DATA_TEMPERATURE,
 534 MPI2_POINTER PTR_MPI2_EVENT_DATA_TEMPERATURE,
 535 Mpi2EventDataTemperature_t, MPI2_POINTER pMpi2EventDataTemperature_t;
 536
 537 /* Temperature Threshold Event data Status bits */
 538 #define MPI2_EVENT_TEMPERATURE3_EXCEEDED            (0x0008)
 539 #define MPI2_EVENT_TEMPERATURE2_EXCEEDED            (0x0004)
 540 #define MPI2_EVENT_TEMPERATURE1_EXCEEDED            (0x0002)
 541 #define MPI2_EVENT_TEMPERATURE0_EXCEEDED            (0x0001)
 542
 543
 544 /* Host Message Event data */
 545
 546 typedef struct _MPI2_EVENT_DATA_HOST_MESSAGE {
 547         U8          SourceVF_ID;                        /* 0x00 */
 548         U8          Reserved1;                          /* 0x01 */
 549         U16         Reserved2;                          /* 0x02 */
 550         U32         Reserved3;                          /* 0x04 */
 551         U32         HostData[1];                        /* 0x08 */
 552 } MPI2_EVENT_DATA_HOST_MESSAGE, MPI2_POINTER PTR_MPI2_EVENT_DATA_HOST_MESSAGE,
 553 Mpi2EventDataHostMessage_t, MPI2_POINTER pMpi2EventDataHostMessage_t;
 554
 555
 556 /* Hard Reset Received Event data */
 557
 558 typedef struct _MPI2_EVENT_DATA_HARD_RESET_RECEIVED
 559 {
 560     U8                      Reserved1;                      /* 0x00 */
 561     U8                      Port;                           /* 0x01 */
 562     U16                     Reserved2;                      /* 0x02 */
 563 } MPI2_EVENT_DATA_HARD_RESET_RECEIVED,
 564   MPI2_POINTER PTR_MPI2_EVENT_DATA_HARD_RESET_RECEIVED,
 565   Mpi2EventDataHardResetReceived_t,
 566   MPI2_POINTER pMpi2EventDataHardResetReceived_t;
 567
 568 /* Task Set Full Event data */
 569 /*   this event is obsolete */
 570
 571 typedef struct _MPI2_EVENT_DATA_TASK_SET_FULL
 572 {
 573     U16                     DevHandle;                      /* 0x00 */
 574     U16                     CurrentDepth;                   /* 0x02 */
 575 } MPI2_EVENT_DATA_TASK_SET_FULL, MPI2_POINTER PTR_MPI2_EVENT_DATA_TASK_SET_FULL,
 576   Mpi2EventDataTaskSetFull_t, MPI2_POINTER pMpi2EventDataTaskSetFull_t;
 577
 578
 579 /* SAS Device Status Change Event data */
 580
 581 typedef struct _MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
 582 {
 583     U16                     TaskTag;                        /* 0x00 */
 584     U8                      ReasonCode;                     /* 0x02 */
 585     U8                      Reserved1;                      /* 0x03 */
 586     U8                      ASC;                            /* 0x04 */
 587     U8                      ASCQ;                           /* 0x05 */
 588     U16                     DevHandle;                      /* 0x06 */
 589     U32                     Reserved2;                      /* 0x08 */
 590     U64                     SASAddress;                     /* 0x0C */
 591     U8                      LUN[8];                         /* 0x14 */
 592 } MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
 593   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
 594   Mpi2EventDataSasDeviceStatusChange_t,
 595   MPI2_POINTER pMpi2EventDataSasDeviceStatusChange_t;
 596
 597 /* SAS Device Status Change Event data ReasonCode values */
 598 #define MPI2_EVENT_SAS_DEV_STAT_RC_SMART_DATA                           (0x05)
 599 #define MPI2_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED                          (0x07)
 600 #define MPI2_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET                (0x08)
 601 #define MPI2_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL                  (0x09)
 602 #define MPI2_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL              (0x0A)
 603 #define MPI2_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL              (0x0B)
 604 #define MPI2_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL                  (0x0C)
 605 #define MPI2_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION                   (0x0D)
 606 #define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_INTERNAL_DEV_RESET               (0x0E)
 607 #define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_TASK_ABORT_INTERNAL              (0x0F)
 608 #define MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE                    (0x10)
 609 #define MPI2_EVENT_SAS_DEV_STAT_RC_EXPANDER_REDUCED_FUNCTIONALITY       (0x11)
 610 #define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_EXPANDER_REDUCED_FUNCTIONALITY   (0x12)
 611
 612
 613 /* Integrated RAID Operation Status Event data */
 614
 615 typedef struct _MPI2_EVENT_DATA_IR_OPERATION_STATUS
 616 {
 617     U16                     VolDevHandle;               /* 0x00 */
 618     U16                     Reserved1;                  /* 0x02 */
 619     U8                      RAIDOperation;              /* 0x04 */
 620     U8                      PercentComplete;            /* 0x05 */
 621     U16                     Reserved2;                  /* 0x06 */
 622     U32                     Resereved3;                 /* 0x08 */
 623 } MPI2_EVENT_DATA_IR_OPERATION_STATUS,
 624   MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_OPERATION_STATUS,
 625   Mpi2EventDataIrOperationStatus_t,
 626   MPI2_POINTER pMpi2EventDataIrOperationStatus_t;
 627
 628 /* Integrated RAID Operation Status Event data RAIDOperation values */
 629 #define MPI2_EVENT_IR_RAIDOP_RESYNC                     (0x00)
 630 #define MPI2_EVENT_IR_RAIDOP_ONLINE_CAP_EXPANSION       (0x01)
 631 #define MPI2_EVENT_IR_RAIDOP_CONSISTENCY_CHECK          (0x02)
 632 #define MPI2_EVENT_IR_RAIDOP_BACKGROUND_INIT            (0x03)
 633 #define MPI2_EVENT_IR_RAIDOP_MAKE_DATA_CONSISTENT       (0x04)
 634
 635
 636 /* Integrated RAID Volume Event data */
 637
 638 typedef struct _MPI2_EVENT_DATA_IR_VOLUME
 639 {
 640     U16                     VolDevHandle;               /* 0x00 */
 641     U8                      ReasonCode;                 /* 0x02 */
 642     U8                      Reserved1;                  /* 0x03 */
 643     U32                     NewValue;                   /* 0x04 */
 644     U32                     PreviousValue;              /* 0x08 */
 645 } MPI2_EVENT_DATA_IR_VOLUME, MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_VOLUME,
 646   Mpi2EventDataIrVolume_t, MPI2_POINTER pMpi2EventDataIrVolume_t;
 647
 648 /* Integrated RAID Volume Event data ReasonCode values */
 649 #define MPI2_EVENT_IR_VOLUME_RC_SETTINGS_CHANGED        (0x01)
 650 #define MPI2_EVENT_IR_VOLUME_RC_STATUS_FLAGS_CHANGED    (0x02)
 651 #define MPI2_EVENT_IR_VOLUME_RC_STATE_CHANGED           (0x03)
 652
 653
 654 /* Integrated RAID Physical Disk Event data */
 655
 656 typedef struct _MPI2_EVENT_DATA_IR_PHYSICAL_DISK
 657 {
 658     U16                     Reserved1;                  /* 0x00 */
 659     U8                      ReasonCode;                 /* 0x02 */
 660     U8                      PhysDiskNum;                /* 0x03 */
 661     U16                     PhysDiskDevHandle;          /* 0x04 */
 662     U16                     Reserved2;                  /* 0x06 */
 663     U16                     Slot;                       /* 0x08 */
 664     U16                     EnclosureHandle;            /* 0x0A */
 665     U32                     NewValue;                   /* 0x0C */
 666     U32                     PreviousValue;              /* 0x10 */
 667 } MPI2_EVENT_DATA_IR_PHYSICAL_DISK,
 668   MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_PHYSICAL_DISK,
 669   Mpi2EventDataIrPhysicalDisk_t, MPI2_POINTER pMpi2EventDataIrPhysicalDisk_t;
 670
 671 /* Integrated RAID Physical Disk Event data ReasonCode values */
 672 #define MPI2_EVENT_IR_PHYSDISK_RC_SETTINGS_CHANGED      (0x01)
 673 #define MPI2_EVENT_IR_PHYSDISK_RC_STATUS_FLAGS_CHANGED  (0x02)
 674 #define MPI2_EVENT_IR_PHYSDISK_RC_STATE_CHANGED         (0x03)
 675
 676
 677 /* Integrated RAID Configuration Change List Event data */
 678
 679 /*
 680  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
 681  * one and check NumElements at runtime.
 682  */
 683 #ifndef MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT
 684 #define MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT          (1)
 685 #endif
 686
 687 typedef struct _MPI2_EVENT_IR_CONFIG_ELEMENT
 688 {
 689     U16                     ElementFlags;               /* 0x00 */
 690     U16                     VolDevHandle;               /* 0x02 */
 691     U8                      ReasonCode;                 /* 0x04 */
 692     U8                      PhysDiskNum;                /* 0x05 */
 693     U16                     PhysDiskDevHandle;          /* 0x06 */
 694 } MPI2_EVENT_IR_CONFIG_ELEMENT, MPI2_POINTER PTR_MPI2_EVENT_IR_CONFIG_ELEMENT,
 695   Mpi2EventIrConfigElement_t, MPI2_POINTER pMpi2EventIrConfigElement_t;
 696
 697 /* IR Configuration Change List Event data ElementFlags values */
 698 #define MPI2_EVENT_IR_CHANGE_EFLAGS_ELEMENT_TYPE_MASK   (0x000F)
 699 #define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLUME_ELEMENT      (0x0000)
 700 #define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLPHYSDISK_ELEMENT (0x0001)
 701 #define MPI2_EVENT_IR_CHANGE_EFLAGS_HOTSPARE_ELEMENT    (0x0002)
 702
 703 /* IR Configuration Change List Event data ReasonCode values */
 704 #define MPI2_EVENT_IR_CHANGE_RC_ADDED                   (0x01)
 705 #define MPI2_EVENT_IR_CHANGE_RC_REMOVED                 (0x02)
 706 #define MPI2_EVENT_IR_CHANGE_RC_NO_CHANGE               (0x03)
 707 #define MPI2_EVENT_IR_CHANGE_RC_HIDE                    (0x04)
 708 #define MPI2_EVENT_IR_CHANGE_RC_UNHIDE                  (0x05)
 709 #define MPI2_EVENT_IR_CHANGE_RC_VOLUME_CREATED          (0x06)
 710 #define MPI2_EVENT_IR_CHANGE_RC_VOLUME_DELETED          (0x07)
 711 #define MPI2_EVENT_IR_CHANGE_RC_PD_CREATED              (0x08)
 712 #define MPI2_EVENT_IR_CHANGE_RC_PD_DELETED              (0x09)
 713
 714 typedef struct _MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST
 715 {
 716     U8                              NumElements;        /* 0x00 */
 717     U8                              Reserved1;          /* 0x01 */
 718     U8                              Reserved2;          /* 0x02 */
 719     U8                              ConfigNum;          /* 0x03 */
 720     U32                             Flags;              /* 0x04 */
 721     MPI2_EVENT_IR_CONFIG_ELEMENT    ConfigElement[MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT];    /* 0x08 */
 722 } MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST,
 723   MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST,
 724   Mpi2EventDataIrConfigChangeList_t,
 725   MPI2_POINTER pMpi2EventDataIrConfigChangeList_t;
 726
 727 /* IR Configuration Change List Event data Flags values */
 728 #define MPI2_EVENT_IR_CHANGE_FLAGS_FOREIGN_CONFIG   (0x00000001)
 729
 730
 731 /* SAS Discovery Event data */
 732
 733 typedef struct _MPI2_EVENT_DATA_SAS_DISCOVERY
 734 {
 735     U8                      Flags;                      /* 0x00 */
 736     U8                      ReasonCode;                 /* 0x01 */
 737     U8                      PhysicalPort;               /* 0x02 */
 738     U8                      Reserved1;                  /* 0x03 */
 739     U32                     DiscoveryStatus;            /* 0x04 */
 740 } MPI2_EVENT_DATA_SAS_DISCOVERY,
 741   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DISCOVERY,
 742   Mpi2EventDataSasDiscovery_t, MPI2_POINTER pMpi2EventDataSasDiscovery_t;
 743
 744 /* SAS Discovery Event data Flags values */
 745 #define MPI2_EVENT_SAS_DISC_DEVICE_CHANGE                   (0x02)
 746 #define MPI2_EVENT_SAS_DISC_IN_PROGRESS                     (0x01)
 747
 748 /* SAS Discovery Event data ReasonCode values */
 749 #define MPI2_EVENT_SAS_DISC_RC_STARTED                      (0x01)
 750 #define MPI2_EVENT_SAS_DISC_RC_COMPLETED                    (0x02)
 751
 752 /* SAS Discovery Event data DiscoveryStatus values */
 753 #define MPI2_EVENT_SAS_DISC_DS_MAX_ENCLOSURES_EXCEED            (0x80000000)
 754 #define MPI2_EVENT_SAS_DISC_DS_MAX_EXPANDERS_EXCEED             (0x40000000)
 755 #define MPI2_EVENT_SAS_DISC_DS_MAX_DEVICES_EXCEED               (0x20000000)
 756 #define MPI2_EVENT_SAS_DISC_DS_MAX_TOPO_PHYS_EXCEED             (0x10000000)
 757 #define MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR             (0x08000000)
 758 #define MPI2_EVENT_SAS_DISC_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE    (0x00008000)
 759 #define MPI2_EVENT_SAS_DISC_DS_EXP_MULTI_SUBTRACTIVE            (0x00004000)
 760 #define MPI2_EVENT_SAS_DISC_DS_MULTI_PORT_DOMAIN                (0x00002000)
 761 #define MPI2_EVENT_SAS_DISC_DS_TABLE_TO_SUBTRACTIVE_LINK        (0x00001000)
 762 #define MPI2_EVENT_SAS_DISC_DS_UNSUPPORTED_DEVICE               (0x00000800)
 763 #define MPI2_EVENT_SAS_DISC_DS_TABLE_LINK                       (0x00000400)
 764 #define MPI2_EVENT_SAS_DISC_DS_SUBTRACTIVE_LINK                 (0x00000200)
 765 #define MPI2_EVENT_SAS_DISC_DS_SMP_CRC_ERROR                    (0x00000100)
 766 #define MPI2_EVENT_SAS_DISC_DS_SMP_FUNCTION_FAILED              (0x00000080)
 767 #define MPI2_EVENT_SAS_DISC_DS_INDEX_NOT_EXIST                  (0x00000040)
 768 #define MPI2_EVENT_SAS_DISC_DS_OUT_ROUTE_ENTRIES                (0x00000020)
 769 #define MPI2_EVENT_SAS_DISC_DS_SMP_TIMEOUT                      (0x00000010)
 770 #define MPI2_EVENT_SAS_DISC_DS_MULTIPLE_PORTS                   (0x00000004)
 771 #define MPI2_EVENT_SAS_DISC_DS_UNADDRESSABLE_DEVICE             (0x00000002)
 772 #define MPI2_EVENT_SAS_DISC_DS_LOOP_DETECTED                    (0x00000001)
 773
 774
 775 /* SAS Broadcast Primitive Event data */
 776
 777 typedef struct _MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE
 778 {
 779     U8                      PhyNum;                     /* 0x00 */
 780     U8                      Port;                       /* 0x01 */
 781     U8                      PortWidth;                  /* 0x02 */
 782     U8                      Primitive;                  /* 0x03 */
 783 } MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
 784   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
 785   Mpi2EventDataSasBroadcastPrimitive_t,
 786   MPI2_POINTER pMpi2EventDataSasBroadcastPrimitive_t;
 787
 788 /* defines for the Primitive field */
 789 #define MPI2_EVENT_PRIMITIVE_CHANGE                         (0x01)
 790 #define MPI2_EVENT_PRIMITIVE_SES                            (0x02)
 791 #define MPI2_EVENT_PRIMITIVE_EXPANDER                       (0x03)
 792 #define MPI2_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT             (0x04)
 793 #define MPI2_EVENT_PRIMITIVE_RESERVED3                      (0x05)
 794 #define MPI2_EVENT_PRIMITIVE_RESERVED4                      (0x06)
 795 #define MPI2_EVENT_PRIMITIVE_CHANGE0_RESERVED               (0x07)
 796 #define MPI2_EVENT_PRIMITIVE_CHANGE1_RESERVED               (0x08)
 797
 798 /* SAS Notify Primitive Event data */
 799
 800 typedef struct _MPI2_EVENT_DATA_SAS_NOTIFY_PRIMITIVE {
 801         U8                      PhyNum;                     /* 0x00 */
 802         U8                      Port;                       /* 0x01 */
 803         U8                      Reserved1;                  /* 0x02 */
 804         U8                      Primitive;                  /* 0x03 */
 805 } MPI2_EVENT_DATA_SAS_NOTIFY_PRIMITIVE,
 806 MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_NOTIFY_PRIMITIVE,
 807 Mpi2EventDataSasNotifyPrimitive_t,
 808 MPI2_POINTER pMpi2EventDataSasNotifyPrimitive_t;
 809
 810 /* defines for the Primitive field */
 811 #define MPI2_EVENT_NOTIFY_ENABLE_SPINUP                     (0x01)
 812 #define MPI2_EVENT_NOTIFY_POWER_LOSS_EXPECTED               (0x02)
 813 #define MPI2_EVENT_NOTIFY_RESERVED1                         (0x03)
 814 #define MPI2_EVENT_NOTIFY_RESERVED2                         (0x04)
 815
 816
 817 /* SAS Initiator Device Status Change Event data */
 818
 819 typedef struct _MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
 820 {
 821     U8                      ReasonCode;                 /* 0x00 */
 822     U8                      PhysicalPort;               /* 0x01 */
 823     U16                     DevHandle;                  /* 0x02 */
 824     U64                     SASAddress;                 /* 0x04 */
 825 } MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
 826   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
 827   Mpi2EventDataSasInitDevStatusChange_t,
 828   MPI2_POINTER pMpi2EventDataSasInitDevStatusChange_t;
 829
 830 /* SAS Initiator Device Status Change event ReasonCode values */
 831 #define MPI2_EVENT_SAS_INIT_RC_ADDED                (0x01)
 832 #define MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING       (0x02)
 833
 834
 835 /* SAS Initiator Device Table Overflow Event data */
 836
 837 typedef struct _MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
 838 {
 839     U16                     MaxInit;                    /* 0x00 */
 840     U16                     CurrentInit;                /* 0x02 */
 841     U64                     SASAddress;                 /* 0x04 */
 842 } MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
 843   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
 844   Mpi2EventDataSasInitTableOverflow_t,
 845   MPI2_POINTER pMpi2EventDataSasInitTableOverflow_t;
 846
 847
 848 /* SAS Topology Change List Event data */
 849
 850 /*
 851  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
 852  * one and check NumEntries at runtime.
 853  */
 854 #ifndef MPI2_EVENT_SAS_TOPO_PHY_COUNT
 855 #define MPI2_EVENT_SAS_TOPO_PHY_COUNT           (1)
 856 #endif
 857
 858 typedef struct _MPI2_EVENT_SAS_TOPO_PHY_ENTRY
 859 {
 860     U16                     AttachedDevHandle;          /* 0x00 */
 861     U8                      LinkRate;                   /* 0x02 */
 862     U8                      PhyStatus;                  /* 0x03 */
 863 } MPI2_EVENT_SAS_TOPO_PHY_ENTRY, MPI2_POINTER PTR_MPI2_EVENT_SAS_TOPO_PHY_ENTRY,
 864   Mpi2EventSasTopoPhyEntry_t, MPI2_POINTER pMpi2EventSasTopoPhyEntry_t;
 865
 866 typedef struct _MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST
 867 {
 868     U16                             EnclosureHandle;            /* 0x00 */
 869     U16                             ExpanderDevHandle;          /* 0x02 */
 870     U8                              NumPhys;                    /* 0x04 */
 871     U8                              Reserved1;                  /* 0x05 */
 872     U16                             Reserved2;                  /* 0x06 */
 873     U8                              NumEntries;                 /* 0x08 */
 874     U8                              StartPhyNum;                /* 0x09 */
 875     U8                              ExpStatus;                  /* 0x0A */
 876     U8                              PhysicalPort;               /* 0x0B */
 877     MPI2_EVENT_SAS_TOPO_PHY_ENTRY   PHY[MPI2_EVENT_SAS_TOPO_PHY_COUNT]; /* 0x0C*/
 878 } MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
 879   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
 880   Mpi2EventDataSasTopologyChangeList_t,
 881   MPI2_POINTER pMpi2EventDataSasTopologyChangeList_t;
 882
 883 /* values for the ExpStatus field */
 884 #define MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER                  (0x00)
 885 #define MPI2_EVENT_SAS_TOPO_ES_ADDED                        (0x01)
 886 #define MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING               (0x02)
 887 #define MPI2_EVENT_SAS_TOPO_ES_RESPONDING                   (0x03)
 888 #define MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING         (0x04)
 889
 890 /* defines for the LinkRate field */
 891 #define MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK                 (0xF0)
 892 #define MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT                (4)
 893 #define MPI2_EVENT_SAS_TOPO_LR_PREV_MASK                    (0x0F)
 894 #define MPI2_EVENT_SAS_TOPO_LR_PREV_SHIFT                   (0)
 895
 896 #define MPI2_EVENT_SAS_TOPO_LR_UNKNOWN_LINK_RATE            (0x00)
 897 #define MPI2_EVENT_SAS_TOPO_LR_PHY_DISABLED                 (0x01)
 898 #define MPI2_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED           (0x02)
 899 #define MPI2_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE            (0x03)
 900 #define MPI2_EVENT_SAS_TOPO_LR_PORT_SELECTOR                (0x04)
 901 #define MPI2_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS        (0x05)
 902 #define MPI2_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY              (0x06)
 903 #define MPI2_EVENT_SAS_TOPO_LR_RATE_1_5                     (0x08)
 904 #define MPI2_EVENT_SAS_TOPO_LR_RATE_3_0                     (0x09)
 905 #define MPI2_EVENT_SAS_TOPO_LR_RATE_6_0                     (0x0A)
 906
 907 /* values for the PhyStatus field */
 908 #define MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT                (0x80)
 909 #define MPI2_EVENT_SAS_TOPO_PS_MULTIPLEX_CHANGE             (0x10)
 910 /* values for the PhyStatus ReasonCode sub-field */
 911 #define MPI2_EVENT_SAS_TOPO_RC_MASK                         (0x0F)
 912 #define MPI2_EVENT_SAS_TOPO_RC_TARG_ADDED                   (0x01)
 913 #define MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING          (0x02)
 914 #define MPI2_EVENT_SAS_TOPO_RC_PHY_CHANGED                  (0x03)
 915 #define MPI2_EVENT_SAS_TOPO_RC_NO_CHANGE                    (0x04)
 916 #define MPI2_EVENT_SAS_TOPO_RC_DELAY_NOT_RESPONDING         (0x05)
 917
 918
 919 /* SAS Enclosure Device Status Change Event data */
 920
 921 typedef struct _MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE
 922 {
 923     U16                     EnclosureHandle;            /* 0x00 */
 924     U8                      ReasonCode;                 /* 0x02 */
 925     U8                      PhysicalPort;               /* 0x03 */
 926     U64                     EnclosureLogicalID;         /* 0x04 */
 927     U16                     NumSlots;                   /* 0x0C */
 928     U16                     StartSlot;                  /* 0x0E */
 929     U32                     PhyBits;                    /* 0x10 */
 930 } MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE,
 931   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE,
 932   Mpi2EventDataSasEnclDevStatusChange_t,
 933   MPI2_POINTER pMpi2EventDataSasEnclDevStatusChange_t;
 934
 935 /* SAS Enclosure Device Status Change event ReasonCode values */
 936 #define MPI2_EVENT_SAS_ENCL_RC_ADDED                (0x01)
 937 #define MPI2_EVENT_SAS_ENCL_RC_NOT_RESPONDING       (0x02)
 938
 939
 940 /* SAS PHY Counter Event data */
 941
 942 typedef struct _MPI2_EVENT_DATA_SAS_PHY_COUNTER {
 943     U64         TimeStamp;          /* 0x00 */
 944     U32         Reserved1;          /* 0x08 */
 945     U8          PhyEventCode;       /* 0x0C */
 946     U8          PhyNum;             /* 0x0D */
 947     U16         Reserved2;          /* 0x0E */
 948     U32         PhyEventInfo;       /* 0x10 */
 949     U8          CounterType;        /* 0x14 */
 950     U8          ThresholdWindow;    /* 0x15 */
 951     U8          TimeUnits;          /* 0x16 */
 952     U8          Reserved3;          /* 0x17 */
 953     U32         EventThreshold;     /* 0x18 */
 954     U16         ThresholdFlags;     /* 0x1C */
 955     U16         Reserved4;          /* 0x1E */
 956 } MPI2_EVENT_DATA_SAS_PHY_COUNTER,
 957   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_PHY_COUNTER,
 958   Mpi2EventDataSasPhyCounter_t, MPI2_POINTER pMpi2EventDataSasPhyCounter_t;
 959
 960 /* use MPI2_SASPHY3_EVENT_CODE_ values from mpi2_cnfg.h for the
 961  * PhyEventCode field
 962  * use MPI2_SASPHY3_COUNTER_TYPE_ values from mpi2_cnfg.h for the
 963  * CounterType field
 964  * use MPI2_SASPHY3_TIME_UNITS_ values from mpi2_cnfg.h for the
 965  * TimeUnits field
 966  * use MPI2_SASPHY3_TFLAGS_ values from mpi2_cnfg.h for the
 967  * ThresholdFlags field
 968  * */
 969
 970
 971 /* SAS Quiesce Event data */
 972
 973 typedef struct _MPI2_EVENT_DATA_SAS_QUIESCE {
 974     U8                      ReasonCode;                 /* 0x00 */
 975     U8                      Reserved1;                  /* 0x01 */
 976     U16                     Reserved2;                  /* 0x02 */
 977     U32                     Reserved3;                  /* 0x04 */
 978 } MPI2_EVENT_DATA_SAS_QUIESCE,
 979   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_QUIESCE,
 980   Mpi2EventDataSasQuiesce_t, MPI2_POINTER pMpi2EventDataSasQuiesce_t;
 981
 982 /* SAS Quiesce Event data ReasonCode values */
 983 #define MPI2_EVENT_SAS_QUIESCE_RC_STARTED                   (0x01)
 984 #define MPI2_EVENT_SAS_QUIESCE_RC_COMPLETED                 (0x02)
 985
 986
 987 /* Host Based Discovery Phy Event data */
 988
 989 typedef struct _MPI2_EVENT_HBD_PHY_SAS {
 990     U8          Flags;                      /* 0x00 */
 991     U8          NegotiatedLinkRate;         /* 0x01 */
 992     U8          PhyNum;                     /* 0x02 */
 993     U8          PhysicalPort;               /* 0x03 */
 994     U32         Reserved1;                  /* 0x04 */
 995     U8          InitialFrame[28];           /* 0x08 */
 996 } MPI2_EVENT_HBD_PHY_SAS, MPI2_POINTER PTR_MPI2_EVENT_HBD_PHY_SAS,
 997   Mpi2EventHbdPhySas_t, MPI2_POINTER pMpi2EventHbdPhySas_t;
 998
 999 /* values for the Flags field */
1000 #define MPI2_EVENT_HBD_SAS_FLAGS_FRAME_VALID        (0x02)
1001 #define MPI2_EVENT_HBD_SAS_FLAGS_SATA_FRAME         (0x01)
1002
1003 /* use MPI2_SAS_NEG_LINK_RATE_ defines from mpi2_cnfg.h for
1004  * the NegotiatedLinkRate field */
1005
1006 typedef union _MPI2_EVENT_HBD_DESCRIPTOR {
1007     MPI2_EVENT_HBD_PHY_SAS      Sas;
1008 } MPI2_EVENT_HBD_DESCRIPTOR, MPI2_POINTER PTR_MPI2_EVENT_HBD_DESCRIPTOR,
1009   Mpi2EventHbdDescriptor_t, MPI2_POINTER pMpi2EventHbdDescriptor_t;
1010
1011 typedef struct _MPI2_EVENT_DATA_HBD_PHY {
1012     U8                          DescriptorType;     /* 0x00 */
1013     U8                          Reserved1;          /* 0x01 */
1014     U16                         Reserved2;          /* 0x02 */
1015     U32                         Reserved3;          /* 0x04 */
1016     MPI2_EVENT_HBD_DESCRIPTOR   Descriptor;         /* 0x08 */
1017 } MPI2_EVENT_DATA_HBD_PHY, MPI2_POINTER PTR_MPI2_EVENT_DATA_HBD_PHY,
1018   Mpi2EventDataHbdPhy_t, MPI2_POINTER pMpi2EventDataMpi2EventDataHbdPhy_t;
1019
1020 /* values for the DescriptorType field */
1021 #define MPI2_EVENT_HBD_DT_SAS               (0x01)
1022
1023
1024
1025 /****************************************************************************
1026 *  EventAck message
1027 ****************************************************************************/
1028
1029 /* EventAck Request message */
1030 typedef struct _MPI2_EVENT_ACK_REQUEST
1031 {
1032     U16                     Reserved1;                      /* 0x00 */
1033     U8                      ChainOffset;                    /* 0x02 */
1034     U8                      Function;                       /* 0x03 */
1035     U16                     Reserved2;                      /* 0x04 */
1036     U8                      Reserved3;                      /* 0x06 */
1037     U8                      MsgFlags;                       /* 0x07 */
1038     U8                      VP_ID;                          /* 0x08 */
1039     U8                      VF_ID;                          /* 0x09 */
1040     U16                     Reserved4;                      /* 0x0A */
1041     U16                     Event;                          /* 0x0C */
1042     U16                     Reserved5;                      /* 0x0E */
1043     U32                     EventContext;                   /* 0x10 */
1044 } MPI2_EVENT_ACK_REQUEST, MPI2_POINTER PTR_MPI2_EVENT_ACK_REQUEST,
1045   Mpi2EventAckRequest_t, MPI2_POINTER pMpi2EventAckRequest_t;
1046
1047
1048 /* EventAck Reply message */
1049 typedef struct _MPI2_EVENT_ACK_REPLY
1050 {
1051     U16                     Reserved1;                      /* 0x00 */
1052     U8                      MsgLength;                      /* 0x02 */
1053     U8                      Function;                       /* 0x03 */
1054     U16                     Reserved2;                      /* 0x04 */
1055     U8                      Reserved3;                      /* 0x06 */
1056     U8                      MsgFlags;                       /* 0x07 */
1057     U8                      VP_ID;                          /* 0x08 */
1058     U8                      VF_ID;                          /* 0x09 */
1059     U16                     Reserved4;                      /* 0x0A */
1060     U16                     Reserved5;                      /* 0x0C */
1061     U16                     IOCStatus;                      /* 0x0E */
1062     U32                     IOCLogInfo;                     /* 0x10 */
1063 } MPI2_EVENT_ACK_REPLY, MPI2_POINTER PTR_MPI2_EVENT_ACK_REPLY,
1064   Mpi2EventAckReply_t, MPI2_POINTER pMpi2EventAckReply_t;
1065
1066
1067 /****************************************************************************
1068 *  SendHostMessage message
1069 ****************************************************************************/
1070
1071 /* SendHostMessage Request message */
1072 typedef struct _MPI2_SEND_HOST_MESSAGE_REQUEST {
1073         U16                     HostDataLength;                 /* 0x00 */
1074         U8                      ChainOffset;                    /* 0x02 */
1075         U8                      Function;                       /* 0x03 */
1076         U16                     Reserved1;                      /* 0x04 */
1077         U8                      Reserved2;                      /* 0x06 */
1078         U8                      MsgFlags;                       /* 0x07 */
1079         U8                      VP_ID;                          /* 0x08 */
1080         U8                      VF_ID;                          /* 0x09 */
1081         U16                     Reserved3;                      /* 0x0A */
1082         U8                      Reserved4;                      /* 0x0C */
1083         U8                      DestVF_ID;                      /* 0x0D */
1084         U16                     Reserved5;                      /* 0x0E */
1085         U32                     Reserved6;                      /* 0x10 */
1086         U32                     Reserved7;                      /* 0x14 */
1087         U32                     Reserved8;                      /* 0x18 */
1088         U32                     Reserved9;                      /* 0x1C */
1089         U32                     Reserved10;                     /* 0x20 */
1090         U32                     HostData[1];                    /* 0x24 */
1091 } MPI2_SEND_HOST_MESSAGE_REQUEST,
1092 MPI2_POINTER PTR_MPI2_SEND_HOST_MESSAGE_REQUEST,
1093 Mpi2SendHostMessageRequest_t, MPI2_POINTER pMpi2SendHostMessageRequest_t;
1094
1095
1096 /* SendHostMessage Reply message */
1097 typedef struct _MPI2_SEND_HOST_MESSAGE_REPLY {
1098         U16                     HostDataLength;                 /* 0x00 */
1099         U8                      MsgLength;                      /* 0x02 */
1100         U8                      Function;                       /* 0x03 */
1101         U16                     Reserved1;                      /* 0x04 */
1102         U8                      Reserved2;                      /* 0x06 */
1103         U8                      MsgFlags;                       /* 0x07 */
1104         U8                      VP_ID;                          /* 0x08 */
1105         U8                      VF_ID;                          /* 0x09 */
1106         U16                     Reserved3;                      /* 0x0A */
1107         U16                     Reserved4;                      /* 0x0C */
1108         U16                     IOCStatus;                      /* 0x0E */
1109         U32                     IOCLogInfo;                     /* 0x10 */
1110 } MPI2_SEND_HOST_MESSAGE_REPLY, MPI2_POINTER PTR_MPI2_SEND_HOST_MESSAGE_REPLY,
1111 Mpi2SendHostMessageReply_t, MPI2_POINTER pMpi2SendHostMessageReply_t;
1112
1113
1114 /****************************************************************************
1115 *  FWDownload message
1116 ****************************************************************************/
1117
1118 /* FWDownload Request message */
1119 typedef struct _MPI2_FW_DOWNLOAD_REQUEST
1120 {
1121     U8                      ImageType;                  /* 0x00 */
1122     U8                      Reserved1;                  /* 0x01 */
1123     U8                      ChainOffset;                /* 0x02 */
1124     U8                      Function;                   /* 0x03 */
1125     U16                     Reserved2;                  /* 0x04 */
1126     U8                      Reserved3;                  /* 0x06 */
1127     U8                      MsgFlags;                   /* 0x07 */
1128     U8                      VP_ID;                      /* 0x08 */
1129     U8                      VF_ID;                      /* 0x09 */
1130     U16                     Reserved4;                  /* 0x0A */
1131     U32                     TotalImageSize;             /* 0x0C */
1132     U32                     Reserved5;                  /* 0x10 */
1133     MPI2_MPI_SGE_UNION      SGL;                        /* 0x14 */
1134 } MPI2_FW_DOWNLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REQUEST,
1135   Mpi2FWDownloadRequest, MPI2_POINTER pMpi2FWDownloadRequest;
1136
1137 #define MPI2_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT   (0x01)
1138
1139 #define MPI2_FW_DOWNLOAD_ITYPE_FW                   (0x01)
1140 #define MPI2_FW_DOWNLOAD_ITYPE_BIOS                 (0x02)
1141 #define MPI2_FW_DOWNLOAD_ITYPE_MANUFACTURING        (0x06)
1142 #define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_1             (0x07)
1143 #define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_2             (0x08)
1144 #define MPI2_FW_DOWNLOAD_ITYPE_MEGARAID             (0x09)
1145 #define MPI2_FW_DOWNLOAD_ITYPE_COMPLETE             (0x0A)
1146 #define MPI2_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK    (0x0B)
1147 #define MPI2_FW_DOWNLOAD_ITYPE_MIN_PRODUCT_SPECIFIC (0xF0)
1148
1149 /* FWDownload TransactionContext Element */
1150 typedef struct _MPI2_FW_DOWNLOAD_TCSGE
1151 {
1152     U8                      Reserved1;                  /* 0x00 */
1153     U8                      ContextSize;                /* 0x01 */
1154     U8                      DetailsLength;              /* 0x02 */
1155     U8                      Flags;                      /* 0x03 */
1156     U32                     Reserved2;                  /* 0x04 */
1157     U32                     ImageOffset;                /* 0x08 */
1158     U32                     ImageSize;                  /* 0x0C */
1159 } MPI2_FW_DOWNLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_TCSGE,
1160   Mpi2FWDownloadTCSGE_t, MPI2_POINTER pMpi2FWDownloadTCSGE_t;
1161
1162 /* FWDownload Reply message */
1163 typedef struct _MPI2_FW_DOWNLOAD_REPLY
1164 {
1165     U8                      ImageType;                  /* 0x00 */
1166     U8                      Reserved1;                  /* 0x01 */
1167     U8                      MsgLength;                  /* 0x02 */
1168     U8                      Function;                   /* 0x03 */
1169     U16                     Reserved2;                  /* 0x04 */
1170     U8                      Reserved3;                  /* 0x06 */
1171     U8                      MsgFlags;                   /* 0x07 */
1172     U8                      VP_ID;                      /* 0x08 */
1173     U8                      VF_ID;                      /* 0x09 */
1174     U16                     Reserved4;                  /* 0x0A */
1175     U16                     Reserved5;                  /* 0x0C */
1176     U16                     IOCStatus;                  /* 0x0E */
1177     U32                     IOCLogInfo;                 /* 0x10 */
1178 } MPI2_FW_DOWNLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REPLY,
1179   Mpi2FWDownloadReply_t, MPI2_POINTER pMpi2FWDownloadReply_t;
1180
1181
1182 /****************************************************************************
1183 *  FWUpload message
1184 ****************************************************************************/
1185
1186 /* FWUpload Request message */
1187 typedef struct _MPI2_FW_UPLOAD_REQUEST
1188 {
1189     U8                      ImageType;                  /* 0x00 */
1190     U8                      Reserved1;                  /* 0x01 */
1191     U8                      ChainOffset;                /* 0x02 */
1192     U8                      Function;                   /* 0x03 */
1193     U16                     Reserved2;                  /* 0x04 */
1194     U8                      Reserved3;                  /* 0x06 */
1195     U8                      MsgFlags;                   /* 0x07 */
1196     U8                      VP_ID;                      /* 0x08 */
1197     U8                      VF_ID;                      /* 0x09 */
1198     U16                     Reserved4;                  /* 0x0A */
1199     U32                     Reserved5;                  /* 0x0C */
1200     U32                     Reserved6;                  /* 0x10 */
1201     MPI2_MPI_SGE_UNION      SGL;                        /* 0x14 */
1202 } MPI2_FW_UPLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REQUEST,
1203   Mpi2FWUploadRequest_t, MPI2_POINTER pMpi2FWUploadRequest_t;
1204
1205 #define MPI2_FW_UPLOAD_ITYPE_FW_CURRENT         (0x00)
1206 #define MPI2_FW_UPLOAD_ITYPE_FW_FLASH           (0x01)
1207 #define MPI2_FW_UPLOAD_ITYPE_BIOS_FLASH         (0x02)
1208 #define MPI2_FW_UPLOAD_ITYPE_FW_BACKUP          (0x05)
1209 #define MPI2_FW_UPLOAD_ITYPE_MANUFACTURING      (0x06)
1210 #define MPI2_FW_UPLOAD_ITYPE_CONFIG_1           (0x07)
1211 #define MPI2_FW_UPLOAD_ITYPE_CONFIG_2           (0x08)
1212 #define MPI2_FW_UPLOAD_ITYPE_MEGARAID           (0x09)
1213 #define MPI2_FW_UPLOAD_ITYPE_COMPLETE           (0x0A)
1214 #define MPI2_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK  (0x0B)
1215
1216 typedef struct _MPI2_FW_UPLOAD_TCSGE
1217 {
1218     U8                      Reserved1;                  /* 0x00 */
1219     U8                      ContextSize;                /* 0x01 */
1220     U8                      DetailsLength;              /* 0x02 */
1221     U8                      Flags;                      /* 0x03 */
1222     U32                     Reserved2;                  /* 0x04 */
1223     U32                     ImageOffset;                /* 0x08 */
1224     U32                     ImageSize;                  /* 0x0C */
1225 } MPI2_FW_UPLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_UPLOAD_TCSGE,
1226   Mpi2FWUploadTCSGE_t, MPI2_POINTER pMpi2FWUploadTCSGE_t;
1227
1228 /* FWUpload Reply message */
1229 typedef struct _MPI2_FW_UPLOAD_REPLY
1230 {
1231     U8                      ImageType;                  /* 0x00 */
1232     U8                      Reserved1;                  /* 0x01 */
1233     U8                      MsgLength;                  /* 0x02 */
1234     U8                      Function;                   /* 0x03 */
1235     U16                     Reserved2;                  /* 0x04 */
1236     U8                      Reserved3;                  /* 0x06 */
1237     U8                      MsgFlags;                   /* 0x07 */
1238     U8                      VP_ID;                      /* 0x08 */
1239     U8                      VF_ID;                      /* 0x09 */
1240     U16                     Reserved4;                  /* 0x0A */
1241     U16                     Reserved5;                  /* 0x0C */
1242     U16                     IOCStatus;                  /* 0x0E */
1243     U32                     IOCLogInfo;                 /* 0x10 */
1244     U32                     ActualImageSize;            /* 0x14 */
1245 } MPI2_FW_UPLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REPLY,
1246   Mpi2FWUploadReply_t, MPI2_POINTER pMPi2FWUploadReply_t;
1247
1248
1249 /* FW Image Header */
1250 typedef struct _MPI2_FW_IMAGE_HEADER
1251 {
1252     U32                     Signature;                  /* 0x00 */
1253     U32                     Signature0;                 /* 0x04 */
1254     U32                     Signature1;                 /* 0x08 */
1255     U32                     Signature2;                 /* 0x0C */
1256     MPI2_VERSION_UNION      MPIVersion;                 /* 0x10 */
1257     MPI2_VERSION_UNION      FWVersion;                  /* 0x14 */
1258     MPI2_VERSION_UNION      NVDATAVersion;              /* 0x18 */
1259     MPI2_VERSION_UNION      PackageVersion;             /* 0x1C */
1260     U16                     VendorID;                   /* 0x20 */
1261     U16                     ProductID;                  /* 0x22 */
1262     U16                     ProtocolFlags;              /* 0x24 */
1263     U16                     Reserved26;                 /* 0x26 */
1264     U32                     IOCCapabilities;            /* 0x28 */
1265     U32                     ImageSize;                  /* 0x2C */
1266     U32                     NextImageHeaderOffset;      /* 0x30 */
1267     U32                     Checksum;                   /* 0x34 */
1268     U32                     Reserved38;                 /* 0x38 */
1269     U32                     Reserved3C;                 /* 0x3C */
1270     U32                     Reserved40;                 /* 0x40 */
1271     U32                     Reserved44;                 /* 0x44 */
1272     U32                     Reserved48;                 /* 0x48 */
1273     U32                     Reserved4C;                 /* 0x4C */
1274     U32                     Reserved50;                 /* 0x50 */
1275     U32                     Reserved54;                 /* 0x54 */
1276     U32                     Reserved58;                 /* 0x58 */
1277     U32                     Reserved5C;                 /* 0x5C */
1278     U32                     Reserved60;                 /* 0x60 */
1279     U32                     FirmwareVersionNameWhat;    /* 0x64 */
1280     U8                      FirmwareVersionName[32];    /* 0x68 */
1281     U32                     VendorNameWhat;             /* 0x88 */
1282     U8                      VendorName[32];             /* 0x8C */
1283     U32                     PackageNameWhat;            /* 0x88 */
1284     U8                      PackageName[32];            /* 0x8C */
1285     U32                     ReservedD0;                 /* 0xD0 */
1286     U32                     ReservedD4;                 /* 0xD4 */
1287     U32                     ReservedD8;                 /* 0xD8 */
1288     U32                     ReservedDC;                 /* 0xDC */
1289     U32                     ReservedE0;                 /* 0xE0 */
1290     U32                     ReservedE4;                 /* 0xE4 */
1291     U32                     ReservedE8;                 /* 0xE8 */
1292     U32                     ReservedEC;                 /* 0xEC */
1293     U32                     ReservedF0;                 /* 0xF0 */
1294     U32                     ReservedF4;                 /* 0xF4 */
1295     U32                     ReservedF8;                 /* 0xF8 */
1296     U32                     ReservedFC;                 /* 0xFC */
1297 } MPI2_FW_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_FW_IMAGE_HEADER,
1298   Mpi2FWImageHeader_t, MPI2_POINTER pMpi2FWImageHeader_t;
1299
1300 /* Signature field */
1301 #define MPI2_FW_HEADER_SIGNATURE_OFFSET         (0x00)
1302 #define MPI2_FW_HEADER_SIGNATURE_MASK           (0xFF000000)
1303 #define MPI2_FW_HEADER_SIGNATURE                (0xEA000000)
1304
1305 /* Signature0 field */
1306 #define MPI2_FW_HEADER_SIGNATURE0_OFFSET        (0x04)
1307 #define MPI2_FW_HEADER_SIGNATURE0               (0x5AFAA55A)
1308
1309 /* Signature1 field */
1310 #define MPI2_FW_HEADER_SIGNATURE1_OFFSET        (0x08)
1311 #define MPI2_FW_HEADER_SIGNATURE1               (0xA55AFAA5)
1312
1313 /* Signature2 field */
1314 #define MPI2_FW_HEADER_SIGNATURE2_OFFSET        (0x0C)
1315 #define MPI2_FW_HEADER_SIGNATURE2               (0x5AA55AFA)
1316
1317
1318 /* defines for using the ProductID field */
1319 #define MPI2_FW_HEADER_PID_TYPE_MASK            (0xF000)
1320 #define MPI2_FW_HEADER_PID_TYPE_SAS             (0x2000)
1321
1322 #define MPI2_FW_HEADER_PID_PROD_MASK                    (0x0F00)
1323 #define MPI2_FW_HEADER_PID_PROD_A                       (0x0000)
1324 #define MPI2_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI   (0x0200)
1325 #define MPI2_FW_HEADER_PID_PROD_IR_SCSI                 (0x0700)
1326
1327
1328 #define MPI2_FW_HEADER_PID_FAMILY_MASK          (0x00FF)
1329 /* SAS */
1330 #define MPI2_FW_HEADER_PID_FAMILY_2108_SAS      (0x0013)
1331 #define MPI2_FW_HEADER_PID_FAMILY_2208_SAS      (0x0014)
1332
1333 /* use MPI2_IOCFACTS_PROTOCOL_ defines for ProtocolFlags field */
1334
1335 /* use MPI2_IOCFACTS_CAPABILITY_ defines for IOCCapabilities field */
1336
1337
1338 #define MPI2_FW_HEADER_IMAGESIZE_OFFSET         (0x2C)
1339 #define MPI2_FW_HEADER_NEXTIMAGE_OFFSET         (0x30)
1340 #define MPI2_FW_HEADER_VERNMHWAT_OFFSET         (0x64)
1341
1342 #define MPI2_FW_HEADER_WHAT_SIGNATURE           (0x29232840)
1343
1344 #define MPI2_FW_HEADER_SIZE                     (0x100)
1345
1346
1347 /* Extended Image Header */
1348 typedef struct _MPI2_EXT_IMAGE_HEADER
1349
1350 {
1351     U8                      ImageType;                  /* 0x00 */
1352     U8                      Reserved1;                  /* 0x01 */
1353     U16                     Reserved2;                  /* 0x02 */
1354     U32                     Checksum;                   /* 0x04 */
1355     U32                     ImageSize;                  /* 0x08 */
1356     U32                     NextImageHeaderOffset;      /* 0x0C */
1357     U32                     PackageVersion;             /* 0x10 */
1358     U32                     Reserved3;                  /* 0x14 */
1359     U32                     Reserved4;                  /* 0x18 */
1360     U32                     Reserved5;                  /* 0x1C */
1361     U8                      IdentifyString[32];         /* 0x20 */
1362 } MPI2_EXT_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_EXT_IMAGE_HEADER,
1363   Mpi2ExtImageHeader_t, MPI2_POINTER pMpi2ExtImageHeader_t;
1364
1365 /* useful offsets */
1366 #define MPI2_EXT_IMAGE_IMAGETYPE_OFFSET         (0x00)
1367 #define MPI2_EXT_IMAGE_IMAGESIZE_OFFSET         (0x08)
1368 #define MPI2_EXT_IMAGE_NEXTIMAGE_OFFSET         (0x0C)
1369
1370 #define MPI2_EXT_IMAGE_HEADER_SIZE              (0x40)
1371
1372 /* defines for the ImageType field */
1373 #define MPI2_EXT_IMAGE_TYPE_UNSPECIFIED                         (0x00)
1374 #define MPI2_EXT_IMAGE_TYPE_FW                                          (0x01)
1375 #define MPI2_EXT_IMAGE_TYPE_NVDATA                                      (0x03)
1376 #define MPI2_EXT_IMAGE_TYPE_BOOTLOADER                          (0x04)
1377 #define MPI2_EXT_IMAGE_TYPE_INITIALIZATION                      (0x05)
1378 #define MPI2_EXT_IMAGE_TYPE_FLASH_LAYOUT                        (0x06)
1379 #define MPI2_EXT_IMAGE_TYPE_SUPPORTED_DEVICES           (0x07)
1380 #define MPI2_EXT_IMAGE_TYPE_MEGARAID                            (0x08)
1381 #define MPI2_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC    (0x80)
1382 #define MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC    (0xFF)
1383 #define MPI2_EXT_IMAGE_TYPE_MAX                   \
1384         (MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC)      /* deprecated */
1385
1386
1387
1388 /* FLASH Layout Extended Image Data */
1389
1390 /*
1391  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1392  * one and check RegionsPerLayout at runtime.
1393  */
1394 #ifndef MPI2_FLASH_NUMBER_OF_REGIONS
1395 #define MPI2_FLASH_NUMBER_OF_REGIONS        (1)
1396 #endif
1397
1398 /*
1399  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1400  * one and check NumberOfLayouts at runtime.
1401  */
1402 #ifndef MPI2_FLASH_NUMBER_OF_LAYOUTS
1403 #define MPI2_FLASH_NUMBER_OF_LAYOUTS        (1)
1404 #endif
1405
1406 typedef struct _MPI2_FLASH_REGION
1407 {
1408     U8                      RegionType;                 /* 0x00 */
1409     U8                      Reserved1;                  /* 0x01 */
1410     U16                     Reserved2;                  /* 0x02 */
1411     U32                     RegionOffset;               /* 0x04 */
1412     U32                     RegionSize;                 /* 0x08 */
1413     U32                     Reserved3;                  /* 0x0C */
1414 } MPI2_FLASH_REGION, MPI2_POINTER PTR_MPI2_FLASH_REGION,
1415   Mpi2FlashRegion_t, MPI2_POINTER pMpi2FlashRegion_t;
1416
1417 typedef struct _MPI2_FLASH_LAYOUT
1418 {
1419     U32                     FlashSize;                  /* 0x00 */
1420     U32                     Reserved1;                  /* 0x04 */
1421     U32                     Reserved2;                  /* 0x08 */
1422     U32                     Reserved3;                  /* 0x0C */
1423     MPI2_FLASH_REGION       Region[MPI2_FLASH_NUMBER_OF_REGIONS];/* 0x10 */
1424 } MPI2_FLASH_LAYOUT, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT,
1425   Mpi2FlashLayout_t, MPI2_POINTER pMpi2FlashLayout_t;
1426
1427 typedef struct _MPI2_FLASH_LAYOUT_DATA
1428 {
1429     U8                      ImageRevision;              /* 0x00 */
1430     U8                      Reserved1;                  /* 0x01 */
1431     U8                      SizeOfRegion;               /* 0x02 */
1432     U8                      Reserved2;                  /* 0x03 */
1433     U16                     NumberOfLayouts;            /* 0x04 */
1434     U16                     RegionsPerLayout;           /* 0x06 */
1435     U16                     MinimumSectorAlignment;     /* 0x08 */
1436     U16                     Reserved3;                  /* 0x0A */
1437     U32                     Reserved4;                  /* 0x0C */
1438     MPI2_FLASH_LAYOUT       Layout[MPI2_FLASH_NUMBER_OF_LAYOUTS];/* 0x10 */
1439 } MPI2_FLASH_LAYOUT_DATA, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT_DATA,
1440   Mpi2FlashLayoutData_t, MPI2_POINTER pMpi2FlashLayoutData_t;
1441
1442 /* defines for the RegionType field */
1443 #define MPI2_FLASH_REGION_UNUSED                (0x00)
1444 #define MPI2_FLASH_REGION_FIRMWARE              (0x01)
1445 #define MPI2_FLASH_REGION_BIOS                  (0x02)
1446 #define MPI2_FLASH_REGION_NVDATA                (0x03)
1447 #define MPI2_FLASH_REGION_FIRMWARE_BACKUP       (0x05)
1448 #define MPI2_FLASH_REGION_MFG_INFORMATION       (0x06)
1449 #define MPI2_FLASH_REGION_CONFIG_1              (0x07)
1450 #define MPI2_FLASH_REGION_CONFIG_2              (0x08)
1451 #define MPI2_FLASH_REGION_MEGARAID              (0x09)
1452 #define MPI2_FLASH_REGION_INIT                  (0x0A)
1453
1454 /* ImageRevision */
1455 #define MPI2_FLASH_LAYOUT_IMAGE_REVISION        (0x00)
1456
1457
1458
1459 /* Supported Devices Extended Image Data */
1460
1461 /*
1462  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1463  * one and check NumberOfDevices at runtime.
1464  */
1465 #ifndef MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES
1466 #define MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES    (1)
1467 #endif
1468
1469 typedef struct _MPI2_SUPPORTED_DEVICE
1470 {
1471     U16                     DeviceID;                   /* 0x00 */
1472     U16                     VendorID;                   /* 0x02 */
1473     U16                     DeviceIDMask;               /* 0x04 */
1474     U16                     Reserved1;                  /* 0x06 */
1475     U8                      LowPCIRev;                  /* 0x08 */
1476     U8                      HighPCIRev;                 /* 0x09 */
1477     U16                     Reserved2;                  /* 0x0A */
1478     U32                     Reserved3;                  /* 0x0C */
1479 } MPI2_SUPPORTED_DEVICE, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICE,
1480   Mpi2SupportedDevice_t, MPI2_POINTER pMpi2SupportedDevice_t;
1481
1482 typedef struct _MPI2_SUPPORTED_DEVICES_DATA
1483 {
1484     U8                      ImageRevision;              /* 0x00 */
1485     U8                      Reserved1;                  /* 0x01 */
1486     U8                      NumberOfDevices;            /* 0x02 */
1487     U8                      Reserved2;                  /* 0x03 */
1488     U32                     Reserved3;                  /* 0x04 */
1489     MPI2_SUPPORTED_DEVICE   SupportedDevice[MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES]; /* 0x08 */
1490 } MPI2_SUPPORTED_DEVICES_DATA, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICES_DATA,
1491   Mpi2SupportedDevicesData_t, MPI2_POINTER pMpi2SupportedDevicesData_t;
1492
1493 /* ImageRevision */
1494 #define MPI2_SUPPORTED_DEVICES_IMAGE_REVISION   (0x00)
1495
1496
1497 /* Init Extended Image Data */
1498
1499 typedef struct _MPI2_INIT_IMAGE_FOOTER
1500
1501 {
1502     U32                     BootFlags;                  /* 0x00 */
1503     U32                     ImageSize;                  /* 0x04 */
1504     U32                     Signature0;                 /* 0x08 */
1505     U32                     Signature1;                 /* 0x0C */
1506     U32                     Signature2;                 /* 0x10 */
1507     U32                     ResetVector;                /* 0x14 */
1508 } MPI2_INIT_IMAGE_FOOTER, MPI2_POINTER PTR_MPI2_INIT_IMAGE_FOOTER,
1509   Mpi2InitImageFooter_t, MPI2_POINTER pMpi2InitImageFooter_t;
1510
1511 /* defines for the BootFlags field */
1512 #define MPI2_INIT_IMAGE_BOOTFLAGS_OFFSET        (0x00)
1513
1514 /* defines for the ImageSize field */
1515 #define MPI2_INIT_IMAGE_IMAGESIZE_OFFSET        (0x04)
1516
1517 /* defines for the Signature0 field */
1518 #define MPI2_INIT_IMAGE_SIGNATURE0_OFFSET       (0x08)
1519 #define MPI2_INIT_IMAGE_SIGNATURE0              (0x5AA55AEA)
1520
1521 /* defines for the Signature1 field */
1522 #define MPI2_INIT_IMAGE_SIGNATURE1_OFFSET       (0x0C)
1523 #define MPI2_INIT_IMAGE_SIGNATURE1              (0xA55AEAA5)
1524
1525 /* defines for the Signature2 field */
1526 #define MPI2_INIT_IMAGE_SIGNATURE2_OFFSET       (0x10)
1527 #define MPI2_INIT_IMAGE_SIGNATURE2              (0x5AEAA55A)
1528
1529 /* Signature fields as individual bytes */
1530 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_0        (0xEA)
1531 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_1        (0x5A)
1532 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_2        (0xA5)
1533 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_3        (0x5A)
1534
1535 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_4        (0xA5)
1536 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_5        (0xEA)
1537 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_6        (0x5A)
1538 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_7        (0xA5)
1539
1540 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_8        (0x5A)
1541 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_9        (0xA5)
1542 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_A        (0xEA)
1543 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_B        (0x5A)
1544
1545 /* defines for the ResetVector field */
1546 #define MPI2_INIT_IMAGE_RESETVECTOR_OFFSET      (0x14)
1547
1548
1549 /****************************************************************************
1550 *  PowerManagementControl message
1551 ****************************************************************************/
1552
1553 /* PowerManagementControl Request message */
1554 typedef struct _MPI2_PWR_MGMT_CONTROL_REQUEST {
1555     U8                      Feature;                    /* 0x00 */
1556     U8                      Reserved1;                  /* 0x01 */
1557     U8                      ChainOffset;                /* 0x02 */
1558     U8                      Function;                   /* 0x03 */
1559     U16                     Reserved2;                  /* 0x04 */
1560     U8                      Reserved3;                  /* 0x06 */
1561     U8                      MsgFlags;                   /* 0x07 */
1562     U8                      VP_ID;                      /* 0x08 */
1563     U8                      VF_ID;                      /* 0x09 */
1564     U16                     Reserved4;                  /* 0x0A */
1565     U8                      Parameter1;                 /* 0x0C */
1566     U8                      Parameter2;                 /* 0x0D */
1567     U8                      Parameter3;                 /* 0x0E */
1568     U8                      Parameter4;                 /* 0x0F */
1569     U32                     Reserved5;                  /* 0x10 */
1570     U32                     Reserved6;                  /* 0x14 */
1571 } MPI2_PWR_MGMT_CONTROL_REQUEST, MPI2_POINTER PTR_MPI2_PWR_MGMT_CONTROL_REQUEST,
1572   Mpi2PwrMgmtControlRequest_t, MPI2_POINTER pMpi2PwrMgmtControlRequest_t;
1573
1574 /* defines for the Feature field */
1575 #define MPI2_PM_CONTROL_FEATURE_DA_PHY_POWER_COND       (0x01)
1576 #define MPI2_PM_CONTROL_FEATURE_PORT_WIDTH_MODULATION   (0x02)
1577 #define MPI2_PM_CONTROL_FEATURE_PCIE_LINK               (0x03)
1578 #define MPI2_PM_CONTROL_FEATURE_IOC_SPEED               (0x04)
1579 #define MPI2_PM_CONTROL_FEATURE_MIN_PRODUCT_SPECIFIC    (0x80)
1580 #define MPI2_PM_CONTROL_FEATURE_MAX_PRODUCT_SPECIFIC    (0xFF)
1581
1582 /* parameter usage for the MPI2_PM_CONTROL_FEATURE_DA_PHY_POWER_COND Feature */
1583 /* Parameter1 contains a PHY number */
1584 /* Parameter2 indicates power condition action using these defines */
1585 #define MPI2_PM_CONTROL_PARAM2_PARTIAL                  (0x01)
1586 #define MPI2_PM_CONTROL_PARAM2_SLUMBER                  (0x02)
1587 #define MPI2_PM_CONTROL_PARAM2_EXIT_PWR_MGMT            (0x03)
1588 /* Parameter3 and Parameter4 are reserved */
1589
1590 /* parameter usage for the MPI2_PM_CONTROL_FEATURE_PORT_WIDTH_MODULATION
1591  *  Feature */
1592 /* Parameter1 contains SAS port width modulation group number */
1593 /* Parameter2 indicates IOC action using these defines */
1594 #define MPI2_PM_CONTROL_PARAM2_REQUEST_OWNERSHIP        (0x01)
1595 #define MPI2_PM_CONTROL_PARAM2_CHANGE_MODULATION        (0x02)
1596 #define MPI2_PM_CONTROL_PARAM2_RELINQUISH_OWNERSHIP     (0x03)
1597 /* Parameter3 indicates desired modulation level using these defines */
1598 #define MPI2_PM_CONTROL_PARAM3_25_PERCENT               (0x00)
1599 #define MPI2_PM_CONTROL_PARAM3_50_PERCENT               (0x01)
1600 #define MPI2_PM_CONTROL_PARAM3_75_PERCENT               (0x02)
1601 #define MPI2_PM_CONTROL_PARAM3_100_PERCENT              (0x03)
1602 /* Parameter4 is reserved */
1603
1604 /* parameter usage for the MPI2_PM_CONTROL_FEATURE_PCIE_LINK Feature */
1605 /* Parameter1 indicates desired PCIe link speed using these defines */
1606 #define MPI2_PM_CONTROL_PARAM1_PCIE_2_5_GBPS            (0x00)
1607 #define MPI2_PM_CONTROL_PARAM1_PCIE_5_0_GBPS            (0x01)
1608 #define MPI2_PM_CONTROL_PARAM1_PCIE_8_0_GBPS            (0x02)
1609 /* Parameter2 indicates desired PCIe link width using these defines */
1610 #define MPI2_PM_CONTROL_PARAM2_WIDTH_X1                 (0x01)
1611 #define MPI2_PM_CONTROL_PARAM2_WIDTH_X2                 (0x02)
1612 #define MPI2_PM_CONTROL_PARAM2_WIDTH_X4                 (0x04)
1613 #define MPI2_PM_CONTROL_PARAM2_WIDTH_X8                 (0x08)
1614 /* Parameter3 and Parameter4 are reserved */
1615
1616 /* parameter usage for the MPI2_PM_CONTROL_FEATURE_IOC_SPEED Feature */
1617 /* Parameter1 indicates desired IOC hardware clock speed using these defines */
1618 #define MPI2_PM_CONTROL_PARAM1_FULL_IOC_SPEED           (0x01)
1619 #define MPI2_PM_CONTROL_PARAM1_HALF_IOC_SPEED           (0x02)
1620 #define MPI2_PM_CONTROL_PARAM1_QUARTER_IOC_SPEED        (0x04)
1621 #define MPI2_PM_CONTROL_PARAM1_EIGHTH_IOC_SPEED         (0x08)
1622 /* Parameter2, Parameter3, and Parameter4 are reserved */
1623
1624
1625 /* PowerManagementControl Reply message */
1626 typedef struct _MPI2_PWR_MGMT_CONTROL_REPLY {
1627     U8                      Feature;                    /* 0x00 */
1628     U8                      Reserved1;                  /* 0x01 */
1629     U8                      MsgLength;                  /* 0x02 */
1630     U8                      Function;                   /* 0x03 */
1631     U16                     Reserved2;                  /* 0x04 */
1632     U8                      Reserved3;                  /* 0x06 */
1633     U8                      MsgFlags;                   /* 0x07 */
1634     U8                      VP_ID;                      /* 0x08 */
1635     U8                      VF_ID;                      /* 0x09 */
1636     U16                     Reserved4;                  /* 0x0A */
1637     U16                     Reserved5;                  /* 0x0C */
1638     U16                     IOCStatus;                  /* 0x0E */
1639     U32                     IOCLogInfo;                 /* 0x10 */
1640 } MPI2_PWR_MGMT_CONTROL_REPLY, MPI2_POINTER PTR_MPI2_PWR_MGMT_CONTROL_REPLY,
1641   Mpi2PwrMgmtControlReply_t, MPI2_POINTER pMpi2PwrMgmtControlReply_t;
1642
1643
1644 #endif
1645