2 * TI CPUFreq/OPP hw-supported driver
4 * Copyright (C) 2016-2017 Texas Instruments, Inc.
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <linux/cpu.h>
19 #include <linux/mfd/syscon.h>
20 #include <linux/init.h>
22 #include <linux/of_platform.h>
23 #include <linux/pm_opp.h>
24 #include <linux/regmap.h>
25 #include <linux/slab.h>
27 #define REVISION_MASK 0xF
28 #define REVISION_SHIFT 28
30 #define AM33XX_800M_ARM_MPU_MAX_FREQ 0x1E2F
31 #define AM43XX_600M_ARM_MPU_MAX_FREQ 0xFFA
33 #define DRA7_EFUSE_HAS_OD_MPU_OPP 11
34 #define DRA7_EFUSE_HAS_HIGH_MPU_OPP 15
35 #define DRA7_EFUSE_HAS_ALL_MPU_OPP 23
37 #define DRA7_EFUSE_NOM_MPU_OPP BIT(0)
38 #define DRA7_EFUSE_OD_MPU_OPP BIT(1)
39 #define DRA7_EFUSE_HIGH_MPU_OPP BIT(2)
41 #define VERSION_COUNT 2
43 struct ti_cpufreq_data;
45 struct ti_cpufreq_soc_data {
46 unsigned long (*efuse_xlate)(struct ti_cpufreq_data *opp_data,
48 unsigned long efuse_fallback;
49 unsigned long efuse_offset;
50 unsigned long efuse_mask;
51 unsigned long efuse_shift;
52 unsigned long rev_offset;
55 struct ti_cpufreq_data {
56 struct device *cpu_dev;
57 struct device_node *opp_node;
58 struct regmap *syscon;
59 const struct ti_cpufreq_soc_data *soc_data;
62 static unsigned long amx3_efuse_xlate(struct ti_cpufreq_data *opp_data,
66 efuse = opp_data->soc_data->efuse_fallback;
67 /* AM335x and AM437x use "OPP disable" bits, so invert */
71 static unsigned long dra7_efuse_xlate(struct ti_cpufreq_data *opp_data,
74 unsigned long calculated_efuse = DRA7_EFUSE_NOM_MPU_OPP;
77 * The efuse on dra7 and am57 parts contains a specific
78 * value indicating the highest available OPP.
82 case DRA7_EFUSE_HAS_ALL_MPU_OPP:
83 case DRA7_EFUSE_HAS_HIGH_MPU_OPP:
84 calculated_efuse |= DRA7_EFUSE_HIGH_MPU_OPP;
85 case DRA7_EFUSE_HAS_OD_MPU_OPP:
86 calculated_efuse |= DRA7_EFUSE_OD_MPU_OPP;
89 return calculated_efuse;
92 static struct ti_cpufreq_soc_data am3x_soc_data = {
93 .efuse_xlate = amx3_efuse_xlate,
94 .efuse_fallback = AM33XX_800M_ARM_MPU_MAX_FREQ,
95 .efuse_offset = 0x07fc,
100 static struct ti_cpufreq_soc_data am4x_soc_data = {
101 .efuse_xlate = amx3_efuse_xlate,
102 .efuse_fallback = AM43XX_600M_ARM_MPU_MAX_FREQ,
103 .efuse_offset = 0x0610,
108 static struct ti_cpufreq_soc_data dra7_soc_data = {
109 .efuse_xlate = dra7_efuse_xlate,
110 .efuse_offset = 0x020c,
111 .efuse_mask = 0xf80000,
117 * ti_cpufreq_get_efuse() - Parse and return efuse value present on SoC
118 * @opp_data: pointer to ti_cpufreq_data context
119 * @efuse_value: Set to the value parsed from efuse
121 * Returns error code if efuse not read properly.
123 static int ti_cpufreq_get_efuse(struct ti_cpufreq_data *opp_data,
126 struct device *dev = opp_data->cpu_dev;
130 ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset,
134 "Failed to read the efuse value from syscon: %d\n",
139 efuse = (efuse & opp_data->soc_data->efuse_mask);
140 efuse >>= opp_data->soc_data->efuse_shift;
142 *efuse_value = opp_data->soc_data->efuse_xlate(opp_data, efuse);
148 * ti_cpufreq_get_rev() - Parse and return rev value present on SoC
149 * @opp_data: pointer to ti_cpufreq_data context
150 * @revision_value: Set to the value parsed from revision register
152 * Returns error code if revision not read properly.
154 static int ti_cpufreq_get_rev(struct ti_cpufreq_data *opp_data,
157 struct device *dev = opp_data->cpu_dev;
161 ret = regmap_read(opp_data->syscon, opp_data->soc_data->rev_offset,
165 "Failed to read the revision number from syscon: %d\n",
170 *revision_value = BIT((revision >> REVISION_SHIFT) & REVISION_MASK);
175 static int ti_cpufreq_setup_syscon_register(struct ti_cpufreq_data *opp_data)
177 struct device *dev = opp_data->cpu_dev;
178 struct device_node *np = opp_data->opp_node;
180 opp_data->syscon = syscon_regmap_lookup_by_phandle(np,
182 if (IS_ERR(opp_data->syscon)) {
184 "\"syscon\" is missing, cannot use OPPv2 table.\n");
185 return PTR_ERR(opp_data->syscon);
191 static const struct of_device_id ti_cpufreq_of_match[] = {
192 { .compatible = "ti,am33xx", .data = &am3x_soc_data, },
193 { .compatible = "ti,am4372", .data = &am4x_soc_data, },
194 { .compatible = "ti,dra7", .data = &dra7_soc_data },
198 static int ti_cpufreq_init(void)
200 u32 version[VERSION_COUNT];
201 struct device_node *np;
202 const struct of_device_id *match;
203 struct ti_cpufreq_data *opp_data;
206 np = of_find_node_by_path("/");
207 match = of_match_node(ti_cpufreq_of_match, np);
211 opp_data = kzalloc(sizeof(*opp_data), GFP_KERNEL);
215 opp_data->soc_data = match->data;
217 opp_data->cpu_dev = get_cpu_device(0);
218 if (!opp_data->cpu_dev) {
219 pr_err("%s: Failed to get device for CPU0\n", __func__);
223 opp_data->opp_node = dev_pm_opp_of_get_opp_desc_node(opp_data->cpu_dev);
224 if (!opp_data->opp_node) {
225 dev_info(opp_data->cpu_dev,
226 "OPP-v2 not supported, cpufreq-dt will attempt to use legacy tables.\n");
227 goto register_cpufreq_dt;
230 ret = ti_cpufreq_setup_syscon_register(opp_data);
235 * OPPs determine whether or not they are supported based on
240 ret = ti_cpufreq_get_rev(opp_data, &version[0]);
244 ret = ti_cpufreq_get_efuse(opp_data, &version[1]);
248 of_node_put(opp_data->opp_node);
250 ret = PTR_ERR_OR_ZERO(dev_pm_opp_set_supported_hw(opp_data->cpu_dev,
251 version, VERSION_COUNT));
253 dev_err(opp_data->cpu_dev,
254 "Failed to set supported hardware\n");
259 platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
264 of_node_put(opp_data->opp_node);
268 device_initcall(ti_cpufreq_init);