drivers/gpu/drm/vmwgfx/vmwgfx_surface.c

   1 // SPDX-License-Identifier: GPL-2.0 OR MIT
   2 /**************************************************************************
   3  *
   4  * Copyright 2009-2015 VMware, Inc., Palo Alto, CA., USA
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #include <drm/ttm/ttm_placement.h>
  29
  30 #include "vmwgfx_drv.h"
  31 #include "vmwgfx_resource_priv.h"
  32 #include "vmwgfx_so.h"
  33 #include "vmwgfx_binding.h"
  34 #include "device_include/svga3d_surfacedefs.h"
  35
  36 #define SVGA3D_FLAGS_64(upper32, lower32) (((uint64_t)upper32 << 32) | lower32)
  37 #define SVGA3D_FLAGS_UPPER_32(svga3d_flags) (svga3d_flags >> 32)
  38 #define SVGA3D_FLAGS_LOWER_32(svga3d_flags) \
  39         (svga3d_flags & ((uint64_t)U32_MAX))
  40
  41 /**
  42  * struct vmw_user_surface - User-space visible surface resource
  43  *
  44  * @prime:          The TTM prime object.
  45  * @base:           The TTM base object handling user-space visibility.
  46  * @srf:            The surface metadata.
  47  * @size:           TTM accounting size for the surface.
  48  * @master:         Master of the creating client. Used for security check.
  49  * @backup_base:    The TTM base object of the backup buffer.
  50  */
  51 struct vmw_user_surface {
  52         struct ttm_prime_object prime;
  53         struct vmw_surface srf;
  54         uint32_t size;
  55         struct drm_master *master;
  56         struct ttm_base_object *backup_base;
  57 };
  58
  59 /**
  60  * struct vmw_surface_offset - Backing store mip level offset info
  61  *
  62  * @face:           Surface face.
  63  * @mip:            Mip level.
  64  * @bo_offset:      Offset into backing store of this mip level.
  65  *
  66  */
  67 struct vmw_surface_offset {
  68         uint32_t face;
  69         uint32_t mip;
  70         uint32_t bo_offset;
  71 };
  72
  73 /**
  74  * struct vmw_surface_dirty - Surface dirty-tracker
  75  * @cache: Cached layout information of the surface.
  76  * @size: Accounting size for the struct vmw_surface_dirty.
  77  * @num_subres: Number of subresources.
  78  * @boxes: Array of SVGA3dBoxes indicating dirty regions. One per subresource.
  79  */
  80 struct vmw_surface_dirty {
  81         struct svga3dsurface_cache cache;
  82         size_t size;
  83         u32 num_subres;
  84         SVGA3dBox boxes[];
  85 };
  86
  87 static void vmw_user_surface_free(struct vmw_resource *res);
  88 static struct vmw_resource *
  89 vmw_user_surface_base_to_res(struct ttm_base_object *base);
  90 static int vmw_legacy_srf_bind(struct vmw_resource *res,
  91                                struct ttm_validate_buffer *val_buf);
  92 static int vmw_legacy_srf_unbind(struct vmw_resource *res,
  93                                  bool readback,
  94                                  struct ttm_validate_buffer *val_buf);
  95 static int vmw_legacy_srf_create(struct vmw_resource *res);
  96 static int vmw_legacy_srf_destroy(struct vmw_resource *res);
  97 static int vmw_gb_surface_create(struct vmw_resource *res);
  98 static int vmw_gb_surface_bind(struct vmw_resource *res,
  99                                struct ttm_validate_buffer *val_buf);
 100 static int vmw_gb_surface_unbind(struct vmw_resource *res,
 101                                  bool readback,
 102                                  struct ttm_validate_buffer *val_buf);
 103 static int vmw_gb_surface_destroy(struct vmw_resource *res);
 104 static int
 105 vmw_gb_surface_define_internal(struct drm_device *dev,
 106                                struct drm_vmw_gb_surface_create_ext_req *req,
 107                                struct drm_vmw_gb_surface_create_rep *rep,
 108                                struct drm_file *file_priv);
 109 static int
 110 vmw_gb_surface_reference_internal(struct drm_device *dev,
 111                                   struct drm_vmw_surface_arg *req,
 112                                   struct drm_vmw_gb_surface_ref_ext_rep *rep,
 113                                   struct drm_file *file_priv);
 114
 115 static void vmw_surface_dirty_free(struct vmw_resource *res);
 116 static int vmw_surface_dirty_alloc(struct vmw_resource *res);
 117 static int vmw_surface_dirty_sync(struct vmw_resource *res);
 118 static void vmw_surface_dirty_range_add(struct vmw_resource *res, size_t start,
 119                                         size_t end);
 120 static int vmw_surface_clean(struct vmw_resource *res);
 121
 122 static const struct vmw_user_resource_conv user_surface_conv = {
 123         .object_type = VMW_RES_SURFACE,
 124         .base_obj_to_res = vmw_user_surface_base_to_res,
 125         .res_free = vmw_user_surface_free
 126 };
 127
 128 const struct vmw_user_resource_conv *user_surface_converter =
 129         &user_surface_conv;
 130
 131
 132 static uint64_t vmw_user_surface_size;
 133
 134 static const struct vmw_res_func vmw_legacy_surface_func = {
 135         .res_type = vmw_res_surface,
 136         .needs_backup = false,
 137         .may_evict = true,
 138         .prio = 1,
 139         .dirty_prio = 1,
 140         .type_name = "legacy surfaces",
 141         .backup_placement = &vmw_srf_placement,
 142         .create = &vmw_legacy_srf_create,
 143         .destroy = &vmw_legacy_srf_destroy,
 144         .bind = &vmw_legacy_srf_bind,
 145         .unbind = &vmw_legacy_srf_unbind
 146 };
 147
 148 static const struct vmw_res_func vmw_gb_surface_func = {
 149         .res_type = vmw_res_surface,
 150         .needs_backup = true,
 151         .may_evict = true,
 152         .prio = 1,
 153         .dirty_prio = 2,
 154         .type_name = "guest backed surfaces",
 155         .backup_placement = &vmw_mob_placement,
 156         .create = vmw_gb_surface_create,
 157         .destroy = vmw_gb_surface_destroy,
 158         .bind = vmw_gb_surface_bind,
 159         .unbind = vmw_gb_surface_unbind,
 160         .dirty_alloc = vmw_surface_dirty_alloc,
 161         .dirty_free = vmw_surface_dirty_free,
 162         .dirty_sync = vmw_surface_dirty_sync,
 163         .dirty_range_add = vmw_surface_dirty_range_add,
 164         .clean = vmw_surface_clean,
 165 };
 166
 167 /*
 168  * struct vmw_surface_dma - SVGA3D DMA command
 169  */
 170 struct vmw_surface_dma {
 171         SVGA3dCmdHeader header;
 172         SVGA3dCmdSurfaceDMA body;
 173         SVGA3dCopyBox cb;
 174         SVGA3dCmdSurfaceDMASuffix suffix;
 175 };
 176
 177 /*
 178  * struct vmw_surface_define - SVGA3D Surface Define command
 179  */
 180 struct vmw_surface_define {
 181         SVGA3dCmdHeader header;
 182         SVGA3dCmdDefineSurface body;
 183 };
 184
 185 /*
 186  * struct vmw_surface_destroy - SVGA3D Surface Destroy command
 187  */
 188 struct vmw_surface_destroy {
 189         SVGA3dCmdHeader header;
 190         SVGA3dCmdDestroySurface body;
 191 };
 192
 193
 194 /**
 195  * vmw_surface_dma_size - Compute fifo size for a dma command.
 196  *
 197  * @srf: Pointer to a struct vmw_surface
 198  *
 199  * Computes the required size for a surface dma command for backup or
 200  * restoration of the surface represented by @srf.
 201  */
 202 static inline uint32_t vmw_surface_dma_size(const struct vmw_surface *srf)
 203 {
 204         return srf->metadata.num_sizes * sizeof(struct vmw_surface_dma);
 205 }
 206
 207
 208 /**
 209  * vmw_surface_define_size - Compute fifo size for a surface define command.
 210  *
 211  * @srf: Pointer to a struct vmw_surface
 212  *
 213  * Computes the required size for a surface define command for the definition
 214  * of the surface represented by @srf.
 215  */
 216 static inline uint32_t vmw_surface_define_size(const struct vmw_surface *srf)
 217 {
 218         return sizeof(struct vmw_surface_define) + srf->metadata.num_sizes *
 219                 sizeof(SVGA3dSize);
 220 }
 221
 222
 223 /**
 224  * vmw_surface_destroy_size - Compute fifo size for a surface destroy command.
 225  *
 226  * Computes the required size for a surface destroy command for the destruction
 227  * of a hw surface.
 228  */
 229 static inline uint32_t vmw_surface_destroy_size(void)
 230 {
 231         return sizeof(struct vmw_surface_destroy);
 232 }
 233
 234 /**
 235  * vmw_surface_destroy_encode - Encode a surface_destroy command.
 236  *
 237  * @id: The surface id
 238  * @cmd_space: Pointer to memory area in which the commands should be encoded.
 239  */
 240 static void vmw_surface_destroy_encode(uint32_t id,
 241                                        void *cmd_space)
 242 {
 243         struct vmw_surface_destroy *cmd = (struct vmw_surface_destroy *)
 244                 cmd_space;
 245
 246         cmd->header.id = SVGA_3D_CMD_SURFACE_DESTROY;
 247         cmd->header.size = sizeof(cmd->body);
 248         cmd->body.sid = id;
 249 }
 250
 251 /**
 252  * vmw_surface_define_encode - Encode a surface_define command.
 253  *
 254  * @srf: Pointer to a struct vmw_surface object.
 255  * @cmd_space: Pointer to memory area in which the commands should be encoded.
 256  */
 257 static void vmw_surface_define_encode(const struct vmw_surface *srf,
 258                                       void *cmd_space)
 259 {
 260         struct vmw_surface_define *cmd = (struct vmw_surface_define *)
 261                 cmd_space;
 262         struct drm_vmw_size *src_size;
 263         SVGA3dSize *cmd_size;
 264         uint32_t cmd_len;
 265         int i;
 266
 267         cmd_len = sizeof(cmd->body) + srf->metadata.num_sizes *
 268                 sizeof(SVGA3dSize);
 269
 270         cmd->header.id = SVGA_3D_CMD_SURFACE_DEFINE;
 271         cmd->header.size = cmd_len;
 272         cmd->body.sid = srf->res.id;
 273         /*
 274          * Downcast of surfaceFlags, was upcasted when received from user-space,
 275          * since driver internally stores as 64 bit.
 276          * For legacy surface define only 32 bit flag is supported.
 277          */
 278         cmd->body.surfaceFlags = (SVGA3dSurface1Flags)srf->metadata.flags;
 279         cmd->body.format = srf->metadata.format;
 280         for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i)
 281                 cmd->body.face[i].numMipLevels = srf->metadata.mip_levels[i];
 282
 283         cmd += 1;
 284         cmd_size = (SVGA3dSize *) cmd;
 285         src_size = srf->metadata.sizes;
 286
 287         for (i = 0; i < srf->metadata.num_sizes; ++i, cmd_size++, src_size++) {
 288                 cmd_size->width = src_size->width;
 289                 cmd_size->height = src_size->height;
 290                 cmd_size->depth = src_size->depth;
 291         }
 292 }
 293
 294 /**
 295  * vmw_surface_dma_encode - Encode a surface_dma command.
 296  *
 297  * @srf: Pointer to a struct vmw_surface object.
 298  * @cmd_space: Pointer to memory area in which the commands should be encoded.
 299  * @ptr: Pointer to an SVGAGuestPtr indicating where the surface contents
 300  * should be placed or read from.
 301  * @to_surface: Boolean whether to DMA to the surface or from the surface.
 302  */
 303 static void vmw_surface_dma_encode(struct vmw_surface *srf,
 304                                    void *cmd_space,
 305                                    const SVGAGuestPtr *ptr,
 306                                    bool to_surface)
 307 {
 308         uint32_t i;
 309         struct vmw_surface_dma *cmd = (struct vmw_surface_dma *)cmd_space;
 310         const struct svga3d_surface_desc *desc =
 311                 svga3dsurface_get_desc(srf->metadata.format);
 312
 313         for (i = 0; i < srf->metadata.num_sizes; ++i) {
 314                 SVGA3dCmdHeader *header = &cmd->header;
 315                 SVGA3dCmdSurfaceDMA *body = &cmd->body;
 316                 SVGA3dCopyBox *cb = &cmd->cb;
 317                 SVGA3dCmdSurfaceDMASuffix *suffix = &cmd->suffix;
 318                 const struct vmw_surface_offset *cur_offset = &srf->offsets[i];
 319                 const struct drm_vmw_size *cur_size = &srf->metadata.sizes[i];
 320
 321                 header->id = SVGA_3D_CMD_SURFACE_DMA;
 322                 header->size = sizeof(*body) + sizeof(*cb) + sizeof(*suffix);
 323
 324                 body->guest.ptr = *ptr;
 325                 body->guest.ptr.offset += cur_offset->bo_offset;
 326                 body->guest.pitch = svga3dsurface_calculate_pitch(desc,
 327                                                                   cur_size);
 328                 body->host.sid = srf->res.id;
 329                 body->host.face = cur_offset->face;
 330                 body->host.mipmap = cur_offset->mip;
 331                 body->transfer = ((to_surface) ?  SVGA3D_WRITE_HOST_VRAM :
 332                                   SVGA3D_READ_HOST_VRAM);
 333                 cb->x = 0;
 334                 cb->y = 0;
 335                 cb->z = 0;
 336                 cb->srcx = 0;
 337                 cb->srcy = 0;
 338                 cb->srcz = 0;
 339                 cb->w = cur_size->width;
 340                 cb->h = cur_size->height;
 341                 cb->d = cur_size->depth;
 342
 343                 suffix->suffixSize = sizeof(*suffix);
 344                 suffix->maximumOffset =
 345                         svga3dsurface_get_image_buffer_size(desc, cur_size,
 346                                                             body->guest.pitch);
 347                 suffix->flags.discard = 0;
 348                 suffix->flags.unsynchronized = 0;
 349                 suffix->flags.reserved = 0;
 350                 ++cmd;
 351         }
 352 };
 353
 354
 355 /**
 356  * vmw_hw_surface_destroy - destroy a Device surface
 357  *
 358  * @res:        Pointer to a struct vmw_resource embedded in a struct
 359  *              vmw_surface.
 360  *
 361  * Destroys a the device surface associated with a struct vmw_surface if
 362  * any, and adjusts accounting and resource count accordingly.
 363  */
 364 static void vmw_hw_surface_destroy(struct vmw_resource *res)
 365 {
 366
 367         struct vmw_private *dev_priv = res->dev_priv;
 368         void *cmd;
 369
 370         if (res->func->destroy == vmw_gb_surface_destroy) {
 371                 (void) vmw_gb_surface_destroy(res);
 372                 return;
 373         }
 374
 375         if (res->id != -1) {
 376
 377                 cmd = VMW_CMD_RESERVE(dev_priv, vmw_surface_destroy_size());
 378                 if (unlikely(!cmd))
 379                         return;
 380
 381                 vmw_surface_destroy_encode(res->id, cmd);
 382                 vmw_cmd_commit(dev_priv, vmw_surface_destroy_size());
 383
 384                 /*
 385                  * used_memory_size_atomic, or separate lock
 386                  * to avoid taking dev_priv::cmdbuf_mutex in
 387                  * the destroy path.
 388                  */
 389
 390                 mutex_lock(&dev_priv->cmdbuf_mutex);
 391                 dev_priv->used_memory_size -= res->backup_size;
 392                 mutex_unlock(&dev_priv->cmdbuf_mutex);
 393         }
 394 }
 395
 396 /**
 397  * vmw_legacy_srf_create - Create a device surface as part of the
 398  * resource validation process.
 399  *
 400  * @res: Pointer to a struct vmw_surface.
 401  *
 402  * If the surface doesn't have a hw id.
 403  *
 404  * Returns -EBUSY if there wasn't sufficient device resources to
 405  * complete the validation. Retry after freeing up resources.
 406  *
 407  * May return other errors if the kernel is out of guest resources.
 408  */
 409 static int vmw_legacy_srf_create(struct vmw_resource *res)
 410 {
 411         struct vmw_private *dev_priv = res->dev_priv;
 412         struct vmw_surface *srf;
 413         uint32_t submit_size;
 414         uint8_t *cmd;
 415         int ret;
 416
 417         if (likely(res->id != -1))
 418                 return 0;
 419
 420         srf = vmw_res_to_srf(res);
 421         if (unlikely(dev_priv->used_memory_size + res->backup_size >=
 422                      dev_priv->memory_size))
 423                 return -EBUSY;
 424
 425         /*
 426          * Alloc id for the resource.
 427          */
 428
 429         ret = vmw_resource_alloc_id(res);
 430         if (unlikely(ret != 0)) {
 431                 DRM_ERROR("Failed to allocate a surface id.\n");
 432                 goto out_no_id;
 433         }
 434
 435         if (unlikely(res->id >= SVGA3D_MAX_SURFACE_IDS)) {
 436                 ret = -EBUSY;
 437                 goto out_no_fifo;
 438         }
 439
 440         /*
 441          * Encode surface define- commands.
 442          */
 443
 444         submit_size = vmw_surface_define_size(srf);
 445         cmd = VMW_CMD_RESERVE(dev_priv, submit_size);
 446         if (unlikely(!cmd)) {
 447                 ret = -ENOMEM;
 448                 goto out_no_fifo;
 449         }
 450
 451         vmw_surface_define_encode(srf, cmd);
 452         vmw_cmd_commit(dev_priv, submit_size);
 453         vmw_fifo_resource_inc(dev_priv);
 454
 455         /*
 456          * Surface memory usage accounting.
 457          */
 458
 459         dev_priv->used_memory_size += res->backup_size;
 460         return 0;
 461
 462 out_no_fifo:
 463         vmw_resource_release_id(res);
 464 out_no_id:
 465         return ret;
 466 }
 467
 468 /**
 469  * vmw_legacy_srf_dma - Copy backup data to or from a legacy surface.
 470  *
 471  * @res:            Pointer to a struct vmw_res embedded in a struct
 472  *                  vmw_surface.
 473  * @val_buf:        Pointer to a struct ttm_validate_buffer containing
 474  *                  information about the backup buffer.
 475  * @bind:           Boolean wether to DMA to the surface.
 476  *
 477  * Transfer backup data to or from a legacy surface as part of the
 478  * validation process.
 479  * May return other errors if the kernel is out of guest resources.
 480  * The backup buffer will be fenced or idle upon successful completion,
 481  * and if the surface needs persistent backup storage, the backup buffer
 482  * will also be returned reserved iff @bind is true.
 483  */
 484 static int vmw_legacy_srf_dma(struct vmw_resource *res,
 485                               struct ttm_validate_buffer *val_buf,
 486                               bool bind)
 487 {
 488         SVGAGuestPtr ptr;
 489         struct vmw_fence_obj *fence;
 490         uint32_t submit_size;
 491         struct vmw_surface *srf = vmw_res_to_srf(res);
 492         uint8_t *cmd;
 493         struct vmw_private *dev_priv = res->dev_priv;
 494
 495         BUG_ON(!val_buf->bo);
 496         submit_size = vmw_surface_dma_size(srf);
 497         cmd = VMW_CMD_RESERVE(dev_priv, submit_size);
 498         if (unlikely(!cmd))
 499                 return -ENOMEM;
 500
 501         vmw_bo_get_guest_ptr(val_buf->bo, &ptr);
 502         vmw_surface_dma_encode(srf, cmd, &ptr, bind);
 503
 504         vmw_cmd_commit(dev_priv, submit_size);
 505
 506         /*
 507          * Create a fence object and fence the backup buffer.
 508          */
 509
 510         (void) vmw_execbuf_fence_commands(NULL, dev_priv,
 511                                           &fence, NULL);
 512
 513         vmw_bo_fence_single(val_buf->bo, fence);
 514
 515         if (likely(fence != NULL))
 516                 vmw_fence_obj_unreference(&fence);
 517
 518         return 0;
 519 }
 520
 521 /**
 522  * vmw_legacy_srf_bind - Perform a legacy surface bind as part of the
 523  *                       surface validation process.
 524  *
 525  * @res:            Pointer to a struct vmw_res embedded in a struct
 526  *                  vmw_surface.
 527  * @val_buf:        Pointer to a struct ttm_validate_buffer containing
 528  *                  information about the backup buffer.
 529  *
 530  * This function will copy backup data to the surface if the
 531  * backup buffer is dirty.
 532  */
 533 static int vmw_legacy_srf_bind(struct vmw_resource *res,
 534                                struct ttm_validate_buffer *val_buf)
 535 {
 536         if (!res->backup_dirty)
 537                 return 0;
 538
 539         return vmw_legacy_srf_dma(res, val_buf, true);
 540 }
 541
 542
 543 /**
 544  * vmw_legacy_srf_unbind - Perform a legacy surface unbind as part of the
 545  *                         surface eviction process.
 546  *
 547  * @res:            Pointer to a struct vmw_res embedded in a struct
 548  *                  vmw_surface.
 549  * @readback:       Readback - only true if dirty
 550  * @val_buf:        Pointer to a struct ttm_validate_buffer containing
 551  *                  information about the backup buffer.
 552  *
 553  * This function will copy backup data from the surface.
 554  */
 555 static int vmw_legacy_srf_unbind(struct vmw_resource *res,
 556                                  bool readback,
 557                                  struct ttm_validate_buffer *val_buf)
 558 {
 559         if (unlikely(readback))
 560                 return vmw_legacy_srf_dma(res, val_buf, false);
 561         return 0;
 562 }
 563
 564 /**
 565  * vmw_legacy_srf_destroy - Destroy a device surface as part of a
 566  *                          resource eviction process.
 567  *
 568  * @res:            Pointer to a struct vmw_res embedded in a struct
 569  *                  vmw_surface.
 570  */
 571 static int vmw_legacy_srf_destroy(struct vmw_resource *res)
 572 {
 573         struct vmw_private *dev_priv = res->dev_priv;
 574         uint32_t submit_size;
 575         uint8_t *cmd;
 576
 577         BUG_ON(res->id == -1);
 578
 579         /*
 580          * Encode the dma- and surface destroy commands.
 581          */
 582
 583         submit_size = vmw_surface_destroy_size();
 584         cmd = VMW_CMD_RESERVE(dev_priv, submit_size);
 585         if (unlikely(!cmd))
 586                 return -ENOMEM;
 587
 588         vmw_surface_destroy_encode(res->id, cmd);
 589         vmw_cmd_commit(dev_priv, submit_size);
 590
 591         /*
 592          * Surface memory usage accounting.
 593          */
 594
 595         dev_priv->used_memory_size -= res->backup_size;
 596
 597         /*
 598          * Release the surface ID.
 599          */
 600
 601         vmw_resource_release_id(res);
 602         vmw_fifo_resource_dec(dev_priv);
 603
 604         return 0;
 605 }
 606
 607
 608 /**
 609  * vmw_surface_init - initialize a struct vmw_surface
 610  *
 611  * @dev_priv:       Pointer to a device private struct.
 612  * @srf:            Pointer to the struct vmw_surface to initialize.
 613  * @res_free:       Pointer to a resource destructor used to free
 614  *                  the object.
 615  */
 616 static int vmw_surface_init(struct vmw_private *dev_priv,
 617                             struct vmw_surface *srf,
 618                             void (*res_free) (struct vmw_resource *res))
 619 {
 620         int ret;
 621         struct vmw_resource *res = &srf->res;
 622
 623         BUG_ON(!res_free);
 624         ret = vmw_resource_init(dev_priv, res, true, res_free,
 625                                 (dev_priv->has_mob) ? &vmw_gb_surface_func :
 626                                 &vmw_legacy_surface_func);
 627
 628         if (unlikely(ret != 0)) {
 629                 res_free(res);
 630                 return ret;
 631         }
 632
 633         /*
 634          * The surface won't be visible to hardware until a
 635          * surface validate.
 636          */
 637
 638         INIT_LIST_HEAD(&srf->view_list);
 639         res->hw_destroy = vmw_hw_surface_destroy;
 640         return ret;
 641 }
 642
 643 /**
 644  * vmw_user_surface_base_to_res - TTM base object to resource converter for
 645  *                                user visible surfaces
 646  *
 647  * @base:           Pointer to a TTM base object
 648  *
 649  * Returns the struct vmw_resource embedded in a struct vmw_surface
 650  * for the user-visible object identified by the TTM base object @base.
 651  */
 652 static struct vmw_resource *
 653 vmw_user_surface_base_to_res(struct ttm_base_object *base)
 654 {
 655         return &(container_of(base, struct vmw_user_surface,
 656                               prime.base)->srf.res);
 657 }
 658
 659 /**
 660  * vmw_user_surface_free - User visible surface resource destructor
 661  *
 662  * @res:            A struct vmw_resource embedded in a struct vmw_surface.
 663  */
 664 static void vmw_user_surface_free(struct vmw_resource *res)
 665 {
 666         struct vmw_surface *srf = vmw_res_to_srf(res);
 667         struct vmw_user_surface *user_srf =
 668             container_of(srf, struct vmw_user_surface, srf);
 669         struct vmw_private *dev_priv = srf->res.dev_priv;
 670         uint32_t size = user_srf->size;
 671
 672         WARN_ON_ONCE(res->dirty);
 673         if (user_srf->master)
 674                 drm_master_put(&user_srf->master);
 675         kfree(srf->offsets);
 676         kfree(srf->metadata.sizes);
 677         kfree(srf->snooper.image);
 678         ttm_prime_object_kfree(user_srf, prime);
 679         ttm_mem_global_free(vmw_mem_glob(dev_priv), size);
 680 }
 681
 682 /**
 683  * vmw_user_surface_free - User visible surface TTM base object destructor
 684  *
 685  * @p_base:         Pointer to a pointer to a TTM base object
 686  *                  embedded in a struct vmw_user_surface.
 687  *
 688  * Drops the base object's reference on its resource, and the
 689  * pointer pointed to by *p_base is set to NULL.
 690  */
 691 static void vmw_user_surface_base_release(struct ttm_base_object **p_base)
 692 {
 693         struct ttm_base_object *base = *p_base;
 694         struct vmw_user_surface *user_srf =
 695             container_of(base, struct vmw_user_surface, prime.base);
 696         struct vmw_resource *res = &user_srf->srf.res;
 697
 698         *p_base = NULL;
 699         if (user_srf->backup_base)
 700                 ttm_base_object_unref(&user_srf->backup_base);
 701         vmw_resource_unreference(&res);
 702 }
 703
 704 /**
 705  * vmw_user_surface_destroy_ioctl - Ioctl function implementing
 706  *                                  the user surface destroy functionality.
 707  *
 708  * @dev:            Pointer to a struct drm_device.
 709  * @data:           Pointer to data copied from / to user-space.
 710  * @file_priv:      Pointer to a drm file private structure.
 711  */
 712 int vmw_surface_destroy_ioctl(struct drm_device *dev, void *data,
 713                               struct drm_file *file_priv)
 714 {
 715         struct drm_vmw_surface_arg *arg = (struct drm_vmw_surface_arg *)data;
 716         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
 717
 718         return ttm_ref_object_base_unref(tfile, arg->sid, TTM_REF_USAGE);
 719 }
 720
 721 /**
 722  * vmw_user_surface_define_ioctl - Ioctl function implementing
 723  *                                  the user surface define functionality.
 724  *
 725  * @dev:            Pointer to a struct drm_device.
 726  * @data:           Pointer to data copied from / to user-space.
 727  * @file_priv:      Pointer to a drm file private structure.
 728  */
 729 int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
 730                              struct drm_file *file_priv)
 731 {
 732         struct vmw_private *dev_priv = vmw_priv(dev);
 733         struct vmw_user_surface *user_srf;
 734         struct vmw_surface *srf;
 735         struct vmw_surface_metadata *metadata;
 736         struct vmw_resource *res;
 737         struct vmw_resource *tmp;
 738         union drm_vmw_surface_create_arg *arg =
 739             (union drm_vmw_surface_create_arg *)data;
 740         struct drm_vmw_surface_create_req *req = &arg->req;
 741         struct drm_vmw_surface_arg *rep = &arg->rep;
 742         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
 743         struct ttm_operation_ctx ctx = {
 744                 .interruptible = true,
 745                 .no_wait_gpu = false
 746         };
 747         int ret;
 748         int i, j;
 749         uint32_t cur_bo_offset;
 750         struct drm_vmw_size *cur_size;
 751         struct vmw_surface_offset *cur_offset;
 752         uint32_t num_sizes;
 753         uint32_t size;
 754         const struct svga3d_surface_desc *desc;
 755
 756         if (unlikely(vmw_user_surface_size == 0))
 757                 vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) +
 758                         VMW_IDA_ACC_SIZE + TTM_OBJ_EXTRA_SIZE;
 759
 760         num_sizes = 0;
 761         for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
 762                 if (req->mip_levels[i] > DRM_VMW_MAX_MIP_LEVELS)
 763                         return -EINVAL;
 764                 num_sizes += req->mip_levels[i];
 765         }
 766
 767         if (num_sizes > DRM_VMW_MAX_SURFACE_FACES * DRM_VMW_MAX_MIP_LEVELS ||
 768             num_sizes == 0)
 769                 return -EINVAL;
 770
 771         size = vmw_user_surface_size +
 772                 ttm_round_pot(num_sizes * sizeof(struct drm_vmw_size)) +
 773                 ttm_round_pot(num_sizes * sizeof(struct vmw_surface_offset));
 774
 775         desc = svga3dsurface_get_desc(req->format);
 776         if (unlikely(desc->block_desc == SVGA3DBLOCKDESC_NONE)) {
 777                 VMW_DEBUG_USER("Invalid format %d for surface creation.\n",
 778                                req->format);
 779                 return -EINVAL;
 780         }
 781
 782         ret = ttm_read_lock(&dev_priv->reservation_sem, true);
 783         if (unlikely(ret != 0))
 784                 return ret;
 785
 786         ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
 787                                    size, &ctx);
 788         if (unlikely(ret != 0)) {
 789                 if (ret != -ERESTARTSYS)
 790                         DRM_ERROR("Out of graphics memory for surface.\n");
 791                 goto out_unlock;
 792         }
 793
 794         user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
 795         if (unlikely(!user_srf)) {
 796                 ret = -ENOMEM;
 797                 goto out_no_user_srf;
 798         }
 799
 800         srf = &user_srf->srf;
 801         metadata = &srf->metadata;
 802         res = &srf->res;
 803
 804         /* Driver internally stores as 64-bit flags */
 805         metadata->flags = (SVGA3dSurfaceAllFlags)req->flags;
 806         metadata->format = req->format;
 807         metadata->scanout = req->scanout;
 808
 809         memcpy(metadata->mip_levels, req->mip_levels,
 810                sizeof(metadata->mip_levels));
 811         metadata->num_sizes = num_sizes;
 812         user_srf->size = size;
 813         metadata->sizes =
 814                 memdup_user((struct drm_vmw_size __user *)(unsigned long)
 815                             req->size_addr,
 816                             sizeof(*metadata->sizes) * metadata->num_sizes);
 817         if (IS_ERR(metadata->sizes)) {
 818                 ret = PTR_ERR(metadata->sizes);
 819                 goto out_no_sizes;
 820         }
 821         srf->offsets = kmalloc_array(metadata->num_sizes, sizeof(*srf->offsets),
 822                                      GFP_KERNEL);
 823         if (unlikely(!srf->offsets)) {
 824                 ret = -ENOMEM;
 825                 goto out_no_offsets;
 826         }
 827
 828         metadata->base_size = *srf->metadata.sizes;
 829         metadata->autogen_filter = SVGA3D_TEX_FILTER_NONE;
 830         metadata->multisample_count = 0;
 831         metadata->multisample_pattern = SVGA3D_MS_PATTERN_NONE;
 832         metadata->quality_level = SVGA3D_MS_QUALITY_NONE;
 833
 834         cur_bo_offset = 0;
 835         cur_offset = srf->offsets;
 836         cur_size = metadata->sizes;
 837
 838         for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
 839                 for (j = 0; j < metadata->mip_levels[i]; ++j) {
 840                         uint32_t stride = svga3dsurface_calculate_pitch
 841                                 (desc, cur_size);
 842
 843                         cur_offset->face = i;
 844                         cur_offset->mip = j;
 845                         cur_offset->bo_offset = cur_bo_offset;
 846                         cur_bo_offset += svga3dsurface_get_image_buffer_size
 847                                 (desc, cur_size, stride);
 848                         ++cur_offset;
 849                         ++cur_size;
 850                 }
 851         }
 852         res->backup_size = cur_bo_offset;
 853         if (metadata->scanout &&
 854             metadata->num_sizes == 1 &&
 855             metadata->sizes[0].width == 64 &&
 856             metadata->sizes[0].height == 64 &&
 857             metadata->format == SVGA3D_A8R8G8B8) {
 858
 859                 srf->snooper.image = kzalloc(64 * 64 * 4, GFP_KERNEL);
 860                 if (!srf->snooper.image) {
 861                         DRM_ERROR("Failed to allocate cursor_image\n");
 862                         ret = -ENOMEM;
 863                         goto out_no_copy;
 864                 }
 865         } else {
 866                 srf->snooper.image = NULL;
 867         }
 868
 869         user_srf->prime.base.shareable = false;
 870         user_srf->prime.base.tfile = NULL;
 871         if (drm_is_primary_client(file_priv))
 872                 user_srf->master = drm_master_get(file_priv->master);
 873
 874         /**
 875          * From this point, the generic resource management functions
 876          * destroy the object on failure.
 877          */
 878
 879         ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
 880         if (unlikely(ret != 0))
 881                 goto out_unlock;
 882
 883         /*
 884          * A gb-aware client referencing a shared surface will
 885          * expect a backup buffer to be present.
 886          */
 887         if (dev_priv->has_mob && req->shareable) {
 888                 uint32_t backup_handle;
 889
 890                 ret = vmw_user_bo_alloc(dev_priv, tfile,
 891                                         res->backup_size,
 892                                         true,
 893                                         &backup_handle,
 894                                         &res->backup,
 895                                         &user_srf->backup_base);
 896                 if (unlikely(ret != 0)) {
 897                         vmw_resource_unreference(&res);
 898                         goto out_unlock;
 899                 }
 900         }
 901
 902         tmp = vmw_resource_reference(&srf->res);
 903         ret = ttm_prime_object_init(tfile, res->backup_size, &user_srf->prime,
 904                                     req->shareable, VMW_RES_SURFACE,
 905                                     &vmw_user_surface_base_release, NULL);
 906
 907         if (unlikely(ret != 0)) {
 908                 vmw_resource_unreference(&tmp);
 909                 vmw_resource_unreference(&res);
 910                 goto out_unlock;
 911         }
 912
 913         rep->sid = user_srf->prime.base.handle;
 914         vmw_resource_unreference(&res);
 915
 916         ttm_read_unlock(&dev_priv->reservation_sem);
 917         return 0;
 918 out_no_copy:
 919         kfree(srf->offsets);
 920 out_no_offsets:
 921         kfree(metadata->sizes);
 922 out_no_sizes:
 923         ttm_prime_object_kfree(user_srf, prime);
 924 out_no_user_srf:
 925         ttm_mem_global_free(vmw_mem_glob(dev_priv), size);
 926 out_unlock:
 927         ttm_read_unlock(&dev_priv->reservation_sem);
 928         return ret;
 929 }
 930
 931
 932 static int
 933 vmw_surface_handle_reference(struct vmw_private *dev_priv,
 934                              struct drm_file *file_priv,
 935                              uint32_t u_handle,
 936                              enum drm_vmw_handle_type handle_type,
 937                              struct ttm_base_object **base_p)
 938 {
 939         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
 940         struct vmw_user_surface *user_srf;
 941         uint32_t handle;
 942         struct ttm_base_object *base;
 943         int ret;
 944
 945         if (handle_type == DRM_VMW_HANDLE_PRIME) {
 946                 ret = ttm_prime_fd_to_handle(tfile, u_handle, &handle);
 947                 if (unlikely(ret != 0))
 948                         return ret;
 949         } else {
 950                 handle = u_handle;
 951         }
 952
 953         ret = -EINVAL;
 954         base = ttm_base_object_lookup_for_ref(dev_priv->tdev, handle);
 955         if (unlikely(!base)) {
 956                 VMW_DEBUG_USER("Could not find surface to reference.\n");
 957                 goto out_no_lookup;
 958         }
 959
 960         if (unlikely(ttm_base_object_type(base) != VMW_RES_SURFACE)) {
 961                 VMW_DEBUG_USER("Referenced object is not a surface.\n");
 962                 goto out_bad_resource;
 963         }
 964
 965         if (handle_type != DRM_VMW_HANDLE_PRIME) {
 966                 bool require_exist = false;
 967
 968                 user_srf = container_of(base, struct vmw_user_surface,
 969                                         prime.base);
 970
 971                 /* Error out if we are unauthenticated primary */
 972                 if (drm_is_primary_client(file_priv) &&
 973                     !file_priv->authenticated) {
 974                         ret = -EACCES;
 975                         goto out_bad_resource;
 976                 }
 977
 978                 /*
 979                  * Make sure the surface creator has the same
 980                  * authenticating master, or is already registered with us.
 981                  */
 982                 if (drm_is_primary_client(file_priv) &&
 983                     user_srf->master != file_priv->master)
 984                         require_exist = true;
 985
 986                 if (unlikely(drm_is_render_client(file_priv)))
 987                         require_exist = true;
 988
 989                 ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL,
 990                                          require_exist);
 991                 if (unlikely(ret != 0)) {
 992                         DRM_ERROR("Could not add a reference to a surface.\n");
 993                         goto out_bad_resource;
 994                 }
 995         }
 996
 997         *base_p = base;
 998         return 0;
 999
1000 out_bad_resource:
1001         ttm_base_object_unref(&base);
1002 out_no_lookup:
1003         if (handle_type == DRM_VMW_HANDLE_PRIME)
1004                 (void) ttm_ref_object_base_unref(tfile, handle, TTM_REF_USAGE);
1005
1006         return ret;
1007 }
1008
1009 /**
1010  * vmw_user_surface_define_ioctl - Ioctl function implementing
1011  *                                  the user surface reference functionality.
1012  *
1013  * @dev:            Pointer to a struct drm_device.
1014  * @data:           Pointer to data copied from / to user-space.
1015  * @file_priv:      Pointer to a drm file private structure.
1016  */
1017 int vmw_surface_reference_ioctl(struct drm_device *dev, void *data,
1018                                 struct drm_file *file_priv)
1019 {
1020         struct vmw_private *dev_priv = vmw_priv(dev);
1021         union drm_vmw_surface_reference_arg *arg =
1022             (union drm_vmw_surface_reference_arg *)data;
1023         struct drm_vmw_surface_arg *req = &arg->req;
1024         struct drm_vmw_surface_create_req *rep = &arg->rep;
1025         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1026         struct vmw_surface *srf;
1027         struct vmw_user_surface *user_srf;
1028         struct drm_vmw_size __user *user_sizes;
1029         struct ttm_base_object *base;
1030         int ret;
1031
1032         ret = vmw_surface_handle_reference(dev_priv, file_priv, req->sid,
1033                                            req->handle_type, &base);
1034         if (unlikely(ret != 0))
1035                 return ret;
1036
1037         user_srf = container_of(base, struct vmw_user_surface, prime.base);
1038         srf = &user_srf->srf;
1039
1040         /* Downcast of flags when sending back to user space */
1041         rep->flags = (uint32_t)srf->metadata.flags;
1042         rep->format = srf->metadata.format;
1043         memcpy(rep->mip_levels, srf->metadata.mip_levels,
1044                sizeof(srf->metadata.mip_levels));
1045         user_sizes = (struct drm_vmw_size __user *)(unsigned long)
1046             rep->size_addr;
1047
1048         if (user_sizes)
1049                 ret = copy_to_user(user_sizes, &srf->metadata.base_size,
1050                                    sizeof(srf->metadata.base_size));
1051         if (unlikely(ret != 0)) {
1052                 VMW_DEBUG_USER("copy_to_user failed %p %u\n", user_sizes,
1053                                srf->metadata.num_sizes);
1054                 ttm_ref_object_base_unref(tfile, base->handle, TTM_REF_USAGE);
1055                 ret = -EFAULT;
1056         }
1057
1058         ttm_base_object_unref(&base);
1059
1060         return ret;
1061 }
1062
1063 /**
1064  * vmw_surface_define_encode - Encode a surface_define command.
1065  *
1066  * @res:        Pointer to a struct vmw_resource embedded in a struct
1067  *              vmw_surface.
1068  */
1069 static int vmw_gb_surface_create(struct vmw_resource *res)
1070 {
1071         struct vmw_private *dev_priv = res->dev_priv;
1072         struct vmw_surface *srf = vmw_res_to_srf(res);
1073         struct vmw_surface_metadata *metadata = &srf->metadata;
1074         uint32_t cmd_len, cmd_id, submit_len;
1075         int ret;
1076         struct {
1077                 SVGA3dCmdHeader header;
1078                 SVGA3dCmdDefineGBSurface body;
1079         } *cmd;
1080         struct {
1081                 SVGA3dCmdHeader header;
1082                 SVGA3dCmdDefineGBSurface_v2 body;
1083         } *cmd2;
1084         struct {
1085                 SVGA3dCmdHeader header;
1086                 SVGA3dCmdDefineGBSurface_v3 body;
1087         } *cmd3;
1088         struct {
1089                 SVGA3dCmdHeader header;
1090                 SVGA3dCmdDefineGBSurface_v4 body;
1091         } *cmd4;
1092
1093         if (likely(res->id != -1))
1094                 return 0;
1095
1096         vmw_fifo_resource_inc(dev_priv);
1097         ret = vmw_resource_alloc_id(res);
1098         if (unlikely(ret != 0)) {
1099                 DRM_ERROR("Failed to allocate a surface id.\n");
1100                 goto out_no_id;
1101         }
1102
1103         if (unlikely(res->id >= VMWGFX_NUM_GB_SURFACE)) {
1104                 ret = -EBUSY;
1105                 goto out_no_fifo;
1106         }
1107
1108         if (has_sm5_context(dev_priv) && metadata->array_size > 0) {
1109                 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V4;
1110                 cmd_len = sizeof(cmd4->body);
1111                 submit_len = sizeof(*cmd4);
1112         } else if (has_sm4_1_context(dev_priv) && metadata->array_size > 0) {
1113                 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V3;
1114                 cmd_len = sizeof(cmd3->body);
1115                 submit_len = sizeof(*cmd3);
1116         } else if (metadata->array_size > 0) {
1117                 /* VMW_SM_4 support verified at creation time. */
1118                 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V2;
1119                 cmd_len = sizeof(cmd2->body);
1120                 submit_len = sizeof(*cmd2);
1121         } else {
1122                 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE;
1123                 cmd_len = sizeof(cmd->body);
1124                 submit_len = sizeof(*cmd);
1125         }
1126
1127         cmd = VMW_CMD_RESERVE(dev_priv, submit_len);
1128         cmd2 = (typeof(cmd2))cmd;
1129         cmd3 = (typeof(cmd3))cmd;
1130         cmd4 = (typeof(cmd4))cmd;
1131         if (unlikely(!cmd)) {
1132                 ret = -ENOMEM;
1133                 goto out_no_fifo;
1134         }
1135
1136         if (has_sm5_context(dev_priv) && metadata->array_size > 0) {
1137                 cmd4->header.id = cmd_id;
1138                 cmd4->header.size = cmd_len;
1139                 cmd4->body.sid = srf->res.id;
1140                 cmd4->body.surfaceFlags = metadata->flags;
1141                 cmd4->body.format = metadata->format;
1142                 cmd4->body.numMipLevels = metadata->mip_levels[0];
1143                 cmd4->body.multisampleCount = metadata->multisample_count;
1144                 cmd4->body.multisamplePattern = metadata->multisample_pattern;
1145                 cmd4->body.qualityLevel = metadata->quality_level;
1146                 cmd4->body.autogenFilter = metadata->autogen_filter;
1147                 cmd4->body.size.width = metadata->base_size.width;
1148                 cmd4->body.size.height = metadata->base_size.height;
1149                 cmd4->body.size.depth = metadata->base_size.depth;
1150                 cmd4->body.arraySize = metadata->array_size;
1151                 cmd4->body.bufferByteStride = metadata->buffer_byte_stride;
1152         } else if (has_sm4_1_context(dev_priv) && metadata->array_size > 0) {
1153                 cmd3->header.id = cmd_id;
1154                 cmd3->header.size = cmd_len;
1155                 cmd3->body.sid = srf->res.id;
1156                 cmd3->body.surfaceFlags = metadata->flags;
1157                 cmd3->body.format = metadata->format;
1158                 cmd3->body.numMipLevels = metadata->mip_levels[0];
1159                 cmd3->body.multisampleCount = metadata->multisample_count;
1160                 cmd3->body.multisamplePattern = metadata->multisample_pattern;
1161                 cmd3->body.qualityLevel = metadata->quality_level;
1162                 cmd3->body.autogenFilter = metadata->autogen_filter;
1163                 cmd3->body.size.width = metadata->base_size.width;
1164                 cmd3->body.size.height = metadata->base_size.height;
1165                 cmd3->body.size.depth = metadata->base_size.depth;
1166                 cmd3->body.arraySize = metadata->array_size;
1167         } else if (metadata->array_size > 0) {
1168                 cmd2->header.id = cmd_id;
1169                 cmd2->header.size = cmd_len;
1170                 cmd2->body.sid = srf->res.id;
1171                 cmd2->body.surfaceFlags = metadata->flags;
1172                 cmd2->body.format = metadata->format;
1173                 cmd2->body.numMipLevels = metadata->mip_levels[0];
1174                 cmd2->body.multisampleCount = metadata->multisample_count;
1175                 cmd2->body.autogenFilter = metadata->autogen_filter;
1176                 cmd2->body.size.width = metadata->base_size.width;
1177                 cmd2->body.size.height = metadata->base_size.height;
1178                 cmd2->body.size.depth = metadata->base_size.depth;
1179                 cmd2->body.arraySize = metadata->array_size;
1180         } else {
1181                 cmd->header.id = cmd_id;
1182                 cmd->header.size = cmd_len;
1183                 cmd->body.sid = srf->res.id;
1184                 cmd->body.surfaceFlags = metadata->flags;
1185                 cmd->body.format = metadata->format;
1186                 cmd->body.numMipLevels = metadata->mip_levels[0];
1187                 cmd->body.multisampleCount = metadata->multisample_count;
1188                 cmd->body.autogenFilter = metadata->autogen_filter;
1189                 cmd->body.size.width = metadata->base_size.width;
1190                 cmd->body.size.height = metadata->base_size.height;
1191                 cmd->body.size.depth = metadata->base_size.depth;
1192         }
1193
1194         vmw_cmd_commit(dev_priv, submit_len);
1195
1196         return 0;
1197
1198 out_no_fifo:
1199         vmw_resource_release_id(res);
1200 out_no_id:
1201         vmw_fifo_resource_dec(dev_priv);
1202         return ret;
1203 }
1204
1205
1206 static int vmw_gb_surface_bind(struct vmw_resource *res,
1207                                struct ttm_validate_buffer *val_buf)
1208 {
1209         struct vmw_private *dev_priv = res->dev_priv;
1210         struct {
1211                 SVGA3dCmdHeader header;
1212                 SVGA3dCmdBindGBSurface body;
1213         } *cmd1;
1214         struct {
1215                 SVGA3dCmdHeader header;
1216                 SVGA3dCmdUpdateGBSurface body;
1217         } *cmd2;
1218         uint32_t submit_size;
1219         struct ttm_buffer_object *bo = val_buf->bo;
1220
1221         BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
1222
1223         submit_size = sizeof(*cmd1) + (res->backup_dirty ? sizeof(*cmd2) : 0);
1224
1225         cmd1 = VMW_CMD_RESERVE(dev_priv, submit_size);
1226         if (unlikely(!cmd1))
1227                 return -ENOMEM;
1228
1229         cmd1->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
1230         cmd1->header.size = sizeof(cmd1->body);
1231         cmd1->body.sid = res->id;
1232         cmd1->body.mobid = bo->mem.start;
1233         if (res->backup_dirty) {
1234                 cmd2 = (void *) &cmd1[1];
1235                 cmd2->header.id = SVGA_3D_CMD_UPDATE_GB_SURFACE;
1236                 cmd2->header.size = sizeof(cmd2->body);
1237                 cmd2->body.sid = res->id;
1238         }
1239         vmw_cmd_commit(dev_priv, submit_size);
1240
1241         if (res->backup->dirty && res->backup_dirty) {
1242                 /* We've just made a full upload. Cear dirty regions. */
1243                 vmw_bo_dirty_clear_res(res);
1244         }
1245
1246         res->backup_dirty = false;
1247
1248         return 0;
1249 }
1250
1251 static int vmw_gb_surface_unbind(struct vmw_resource *res,
1252                                  bool readback,
1253                                  struct ttm_validate_buffer *val_buf)
1254 {
1255         struct vmw_private *dev_priv = res->dev_priv;
1256         struct ttm_buffer_object *bo = val_buf->bo;
1257         struct vmw_fence_obj *fence;
1258
1259         struct {
1260                 SVGA3dCmdHeader header;
1261                 SVGA3dCmdReadbackGBSurface body;
1262         } *cmd1;
1263         struct {
1264                 SVGA3dCmdHeader header;
1265                 SVGA3dCmdInvalidateGBSurface body;
1266         } *cmd2;
1267         struct {
1268                 SVGA3dCmdHeader header;
1269                 SVGA3dCmdBindGBSurface body;
1270         } *cmd3;
1271         uint32_t submit_size;
1272         uint8_t *cmd;
1273
1274
1275         BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
1276
1277         submit_size = sizeof(*cmd3) + (readback ? sizeof(*cmd1) : sizeof(*cmd2));
1278         cmd = VMW_CMD_RESERVE(dev_priv, submit_size);
1279         if (unlikely(!cmd))
1280                 return -ENOMEM;
1281
1282         if (readback) {
1283                 cmd1 = (void *) cmd;
1284                 cmd1->header.id = SVGA_3D_CMD_READBACK_GB_SURFACE;
1285                 cmd1->header.size = sizeof(cmd1->body);
1286                 cmd1->body.sid = res->id;
1287                 cmd3 = (void *) &cmd1[1];
1288         } else {
1289                 cmd2 = (void *) cmd;
1290                 cmd2->header.id = SVGA_3D_CMD_INVALIDATE_GB_SURFACE;
1291                 cmd2->header.size = sizeof(cmd2->body);
1292                 cmd2->body.sid = res->id;
1293                 cmd3 = (void *) &cmd2[1];
1294         }
1295
1296         cmd3->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
1297         cmd3->header.size = sizeof(cmd3->body);
1298         cmd3->body.sid = res->id;
1299         cmd3->body.mobid = SVGA3D_INVALID_ID;
1300
1301         vmw_cmd_commit(dev_priv, submit_size);
1302
1303         /*
1304          * Create a fence object and fence the backup buffer.
1305          */
1306
1307         (void) vmw_execbuf_fence_commands(NULL, dev_priv,
1308                                           &fence, NULL);
1309
1310         vmw_bo_fence_single(val_buf->bo, fence);
1311
1312         if (likely(fence != NULL))
1313                 vmw_fence_obj_unreference(&fence);
1314
1315         return 0;
1316 }
1317
1318 static int vmw_gb_surface_destroy(struct vmw_resource *res)
1319 {
1320         struct vmw_private *dev_priv = res->dev_priv;
1321         struct vmw_surface *srf = vmw_res_to_srf(res);
1322         struct {
1323                 SVGA3dCmdHeader header;
1324                 SVGA3dCmdDestroyGBSurface body;
1325         } *cmd;
1326
1327         if (likely(res->id == -1))
1328                 return 0;
1329
1330         mutex_lock(&dev_priv->binding_mutex);
1331         vmw_view_surface_list_destroy(dev_priv, &srf->view_list);
1332         vmw_binding_res_list_scrub(&res->binding_head);
1333
1334         cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
1335         if (unlikely(!cmd)) {
1336                 mutex_unlock(&dev_priv->binding_mutex);
1337                 return -ENOMEM;
1338         }
1339
1340         cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SURFACE;
1341         cmd->header.size = sizeof(cmd->body);
1342         cmd->body.sid = res->id;
1343         vmw_cmd_commit(dev_priv, sizeof(*cmd));
1344         mutex_unlock(&dev_priv->binding_mutex);
1345         vmw_resource_release_id(res);
1346         vmw_fifo_resource_dec(dev_priv);
1347
1348         return 0;
1349 }
1350
1351 /**
1352  * vmw_gb_surface_define_ioctl - Ioctl function implementing
1353  * the user surface define functionality.
1354  *
1355  * @dev: Pointer to a struct drm_device.
1356  * @data: Pointer to data copied from / to user-space.
1357  * @file_priv: Pointer to a drm file private structure.
1358  */
1359 int vmw_gb_surface_define_ioctl(struct drm_device *dev, void *data,
1360                                 struct drm_file *file_priv)
1361 {
1362         union drm_vmw_gb_surface_create_arg *arg =
1363             (union drm_vmw_gb_surface_create_arg *)data;
1364         struct drm_vmw_gb_surface_create_rep *rep = &arg->rep;
1365         struct drm_vmw_gb_surface_create_ext_req req_ext;
1366
1367         req_ext.base = arg->req;
1368         req_ext.version = drm_vmw_gb_surface_v1;
1369         req_ext.svga3d_flags_upper_32_bits = 0;
1370         req_ext.multisample_pattern = SVGA3D_MS_PATTERN_NONE;
1371         req_ext.quality_level = SVGA3D_MS_QUALITY_NONE;
1372         req_ext.buffer_byte_stride = 0;
1373         req_ext.must_be_zero = 0;
1374
1375         return vmw_gb_surface_define_internal(dev, &req_ext, rep, file_priv);
1376 }
1377
1378 /**
1379  * vmw_gb_surface_reference_ioctl - Ioctl function implementing
1380  * the user surface reference functionality.
1381  *
1382  * @dev: Pointer to a struct drm_device.
1383  * @data: Pointer to data copied from / to user-space.
1384  * @file_priv: Pointer to a drm file private structure.
1385  */
1386 int vmw_gb_surface_reference_ioctl(struct drm_device *dev, void *data,
1387                                    struct drm_file *file_priv)
1388 {
1389         union drm_vmw_gb_surface_reference_arg *arg =
1390             (union drm_vmw_gb_surface_reference_arg *)data;
1391         struct drm_vmw_surface_arg *req = &arg->req;
1392         struct drm_vmw_gb_surface_ref_rep *rep = &arg->rep;
1393         struct drm_vmw_gb_surface_ref_ext_rep rep_ext;
1394         int ret;
1395
1396         ret = vmw_gb_surface_reference_internal(dev, req, &rep_ext, file_priv);
1397
1398         if (unlikely(ret != 0))
1399                 return ret;
1400
1401         rep->creq = rep_ext.creq.base;
1402         rep->crep = rep_ext.crep;
1403
1404         return ret;
1405 }
1406
1407 /**
1408  * vmw_gb_surface_define_ext_ioctl - Ioctl function implementing
1409  * the user surface define functionality.
1410  *
1411  * @dev: Pointer to a struct drm_device.
1412  * @data: Pointer to data copied from / to user-space.
1413  * @file_priv: Pointer to a drm file private structure.
1414  */
1415 int vmw_gb_surface_define_ext_ioctl(struct drm_device *dev, void *data,
1416                                 struct drm_file *file_priv)
1417 {
1418         union drm_vmw_gb_surface_create_ext_arg *arg =
1419             (union drm_vmw_gb_surface_create_ext_arg *)data;
1420         struct drm_vmw_gb_surface_create_ext_req *req = &arg->req;
1421         struct drm_vmw_gb_surface_create_rep *rep = &arg->rep;
1422
1423         return vmw_gb_surface_define_internal(dev, req, rep, file_priv);
1424 }
1425
1426 /**
1427  * vmw_gb_surface_reference_ext_ioctl - Ioctl function implementing
1428  * the user surface reference functionality.
1429  *
1430  * @dev: Pointer to a struct drm_device.
1431  * @data: Pointer to data copied from / to user-space.
1432  * @file_priv: Pointer to a drm file private structure.
1433  */
1434 int vmw_gb_surface_reference_ext_ioctl(struct drm_device *dev, void *data,
1435                                    struct drm_file *file_priv)
1436 {
1437         union drm_vmw_gb_surface_reference_ext_arg *arg =
1438             (union drm_vmw_gb_surface_reference_ext_arg *)data;
1439         struct drm_vmw_surface_arg *req = &arg->req;
1440         struct drm_vmw_gb_surface_ref_ext_rep *rep = &arg->rep;
1441
1442         return vmw_gb_surface_reference_internal(dev, req, rep, file_priv);
1443 }
1444
1445 /**
1446  * vmw_gb_surface_define_internal - Ioctl function implementing
1447  * the user surface define functionality.
1448  *
1449  * @dev: Pointer to a struct drm_device.
1450  * @req: Request argument from user-space.
1451  * @rep: Response argument to user-space.
1452  * @file_priv: Pointer to a drm file private structure.
1453  */
1454 static int
1455 vmw_gb_surface_define_internal(struct drm_device *dev,
1456                                struct drm_vmw_gb_surface_create_ext_req *req,
1457                                struct drm_vmw_gb_surface_create_rep *rep,
1458                                struct drm_file *file_priv)
1459 {
1460         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1461         struct vmw_private *dev_priv = vmw_priv(dev);
1462         struct vmw_user_surface *user_srf;
1463         struct vmw_surface_metadata metadata = {0};
1464         struct vmw_surface *srf;
1465         struct vmw_resource *res;
1466         struct vmw_resource *tmp;
1467         int ret = 0;
1468         uint32_t size;
1469         uint32_t backup_handle = 0;
1470         SVGA3dSurfaceAllFlags svga3d_flags_64 =
1471                 SVGA3D_FLAGS_64(req->svga3d_flags_upper_32_bits,
1472                                 req->base.svga3d_flags);
1473
1474         /* array_size must be null for non-GL3 host. */
1475         if (req->base.array_size > 0 && !has_sm4_context(dev_priv)) {
1476                 VMW_DEBUG_USER("SM4 surface not supported.\n");
1477                 return -EINVAL;
1478         }
1479
1480         if (!has_sm4_1_context(dev_priv)) {
1481                 if (req->svga3d_flags_upper_32_bits != 0)
1482                         ret = -EINVAL;
1483
1484                 if (req->base.multisample_count != 0)
1485                         ret = -EINVAL;
1486
1487                 if (req->multisample_pattern != SVGA3D_MS_PATTERN_NONE)
1488                         ret = -EINVAL;
1489
1490                 if (req->quality_level != SVGA3D_MS_QUALITY_NONE)
1491                         ret = -EINVAL;
1492
1493                 if (ret) {
1494                         VMW_DEBUG_USER("SM4.1 surface not supported.\n");
1495                         return ret;
1496                 }
1497         }
1498
1499         if (req->buffer_byte_stride > 0 && !has_sm5_context(dev_priv)) {
1500                 VMW_DEBUG_USER("SM5 surface not supported.\n");
1501                 return -EINVAL;
1502         }
1503
1504         if ((svga3d_flags_64 & SVGA3D_SURFACE_MULTISAMPLE) &&
1505             req->base.multisample_count == 0) {
1506                 VMW_DEBUG_USER("Invalid sample count.\n");
1507                 return -EINVAL;
1508         }
1509
1510         if (req->base.mip_levels > DRM_VMW_MAX_MIP_LEVELS) {
1511                 VMW_DEBUG_USER("Invalid mip level.\n");
1512                 return -EINVAL;
1513         }
1514
1515         if (unlikely(vmw_user_surface_size == 0))
1516                 vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) +
1517                         VMW_IDA_ACC_SIZE + TTM_OBJ_EXTRA_SIZE;
1518
1519         size = vmw_user_surface_size;
1520
1521         metadata.flags = svga3d_flags_64;
1522         metadata.format = req->base.format;
1523         metadata.mip_levels[0] = req->base.mip_levels;
1524         metadata.multisample_count = req->base.multisample_count;
1525         metadata.multisample_pattern = req->multisample_pattern;
1526         metadata.quality_level = req->quality_level;
1527         metadata.array_size = req->base.array_size;
1528         metadata.buffer_byte_stride = req->buffer_byte_stride;
1529         metadata.num_sizes = 1;
1530         metadata.base_size = req->base.base_size;
1531         metadata.scanout = req->base.drm_surface_flags &
1532                 drm_vmw_surface_flag_scanout;
1533
1534         /* Define a surface based on the parameters. */
1535         ret = vmw_gb_surface_define(dev_priv, size, &metadata, &srf);
1536         if (ret != 0) {
1537                 VMW_DEBUG_USER("Failed to define surface.\n");
1538                 return ret;
1539         }
1540
1541         user_srf = container_of(srf, struct vmw_user_surface, srf);
1542         if (drm_is_primary_client(file_priv))
1543                 user_srf->master = drm_master_get(file_priv->master);
1544
1545         ret = ttm_read_lock(&dev_priv->reservation_sem, true);
1546         if (unlikely(ret != 0))
1547                 return ret;
1548
1549         res = &user_srf->srf.res;
1550
1551         if (req->base.buffer_handle != SVGA3D_INVALID_ID) {
1552                 ret = vmw_user_bo_lookup(tfile, req->base.buffer_handle,
1553                                          &res->backup,
1554                                          &user_srf->backup_base);
1555                 if (ret == 0) {
1556                         if (res->backup->base.base.size < res->backup_size) {
1557                                 VMW_DEBUG_USER("Surface backup buffer too small.\n");
1558                                 vmw_bo_unreference(&res->backup);
1559                                 ret = -EINVAL;
1560                                 goto out_unlock;
1561                         } else {
1562                                 backup_handle = req->base.buffer_handle;
1563                         }
1564                 }
1565         } else if (req->base.drm_surface_flags &
1566                    (drm_vmw_surface_flag_create_buffer |
1567                     drm_vmw_surface_flag_coherent))
1568                 ret = vmw_user_bo_alloc(dev_priv, tfile,
1569                                         res->backup_size,
1570                                         req->base.drm_surface_flags &
1571                                         drm_vmw_surface_flag_shareable,
1572                                         &backup_handle,
1573                                         &res->backup,
1574                                         &user_srf->backup_base);
1575
1576         if (unlikely(ret != 0)) {
1577                 vmw_resource_unreference(&res);
1578                 goto out_unlock;
1579         }
1580
1581         if (req->base.drm_surface_flags & drm_vmw_surface_flag_coherent) {
1582                 struct vmw_buffer_object *backup = res->backup;
1583
1584                 ttm_bo_reserve(&backup->base, false, false, NULL);
1585                 if (!res->func->dirty_alloc)
1586                         ret = -EINVAL;
1587                 if (!ret)
1588                         ret = vmw_bo_dirty_add(backup);
1589                 if (!ret) {
1590                         res->coherent = true;
1591                         ret = res->func->dirty_alloc(res);
1592                 }
1593                 ttm_bo_unreserve(&backup->base);
1594                 if (ret) {
1595                         vmw_resource_unreference(&res);
1596                         goto out_unlock;
1597                 }
1598
1599         }
1600
1601         tmp = vmw_resource_reference(res);
1602         ret = ttm_prime_object_init(tfile, res->backup_size, &user_srf->prime,
1603                                     req->base.drm_surface_flags &
1604                                     drm_vmw_surface_flag_shareable,
1605                                     VMW_RES_SURFACE,
1606                                     &vmw_user_surface_base_release, NULL);
1607
1608         if (unlikely(ret != 0)) {
1609                 vmw_resource_unreference(&tmp);
1610                 vmw_resource_unreference(&res);
1611                 goto out_unlock;
1612         }
1613
1614         rep->handle      = user_srf->prime.base.handle;
1615         rep->backup_size = res->backup_size;
1616         if (res->backup) {
1617                 rep->buffer_map_handle =
1618                         drm_vma_node_offset_addr(&res->backup->base.base.vma_node);
1619                 rep->buffer_size = res->backup->base.base.size;
1620                 rep->buffer_handle = backup_handle;
1621         } else {
1622                 rep->buffer_map_handle = 0;
1623                 rep->buffer_size = 0;
1624                 rep->buffer_handle = SVGA3D_INVALID_ID;
1625         }
1626
1627         vmw_resource_unreference(&res);
1628
1629 out_unlock:
1630         ttm_read_unlock(&dev_priv->reservation_sem);
1631         return ret;
1632 }
1633
1634 /**
1635  * vmw_gb_surface_reference_internal - Ioctl function implementing
1636  * the user surface reference functionality.
1637  *
1638  * @dev: Pointer to a struct drm_device.
1639  * @req: Pointer to user-space request surface arg.
1640  * @rep: Pointer to response to user-space.
1641  * @file_priv: Pointer to a drm file private structure.
1642  */
1643 static int
1644 vmw_gb_surface_reference_internal(struct drm_device *dev,
1645                                   struct drm_vmw_surface_arg *req,
1646                                   struct drm_vmw_gb_surface_ref_ext_rep *rep,
1647                                   struct drm_file *file_priv)
1648 {
1649         struct vmw_private *dev_priv = vmw_priv(dev);
1650         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1651         struct vmw_surface *srf;
1652         struct vmw_user_surface *user_srf;
1653         struct vmw_surface_metadata *metadata;
1654         struct ttm_base_object *base;
1655         uint32_t backup_handle;
1656         int ret;
1657
1658         ret = vmw_surface_handle_reference(dev_priv, file_priv, req->sid,
1659                                            req->handle_type, &base);
1660         if (unlikely(ret != 0))
1661                 return ret;
1662
1663         user_srf = container_of(base, struct vmw_user_surface, prime.base);
1664         srf = &user_srf->srf;
1665         if (!srf->res.backup) {
1666                 DRM_ERROR("Shared GB surface is missing a backup buffer.\n");
1667                 goto out_bad_resource;
1668         }
1669         metadata = &srf->metadata;
1670
1671         mutex_lock(&dev_priv->cmdbuf_mutex); /* Protect res->backup */
1672         ret = vmw_user_bo_reference(tfile, srf->res.backup, &backup_handle);
1673         mutex_unlock(&dev_priv->cmdbuf_mutex);
1674
1675         if (unlikely(ret != 0)) {
1676                 DRM_ERROR("Could not add a reference to a GB surface "
1677                           "backup buffer.\n");
1678                 (void) ttm_ref_object_base_unref(tfile, base->handle,
1679                                                  TTM_REF_USAGE);
1680                 goto out_bad_resource;
1681         }
1682
1683         rep->creq.base.svga3d_flags = SVGA3D_FLAGS_LOWER_32(metadata->flags);
1684         rep->creq.base.format = metadata->format;
1685         rep->creq.base.mip_levels = metadata->mip_levels[0];
1686         rep->creq.base.drm_surface_flags = 0;
1687         rep->creq.base.multisample_count = metadata->multisample_count;
1688         rep->creq.base.autogen_filter = metadata->autogen_filter;
1689         rep->creq.base.array_size = metadata->array_size;
1690         rep->creq.base.buffer_handle = backup_handle;
1691         rep->creq.base.base_size = metadata->base_size;
1692         rep->crep.handle = user_srf->prime.base.handle;
1693         rep->crep.backup_size = srf->res.backup_size;
1694         rep->crep.buffer_handle = backup_handle;
1695         rep->crep.buffer_map_handle =
1696                 drm_vma_node_offset_addr(&srf->res.backup->base.base.vma_node);
1697         rep->crep.buffer_size = srf->res.backup->base.base.size;
1698
1699         rep->creq.version = drm_vmw_gb_surface_v1;
1700         rep->creq.svga3d_flags_upper_32_bits =
1701                 SVGA3D_FLAGS_UPPER_32(metadata->flags);
1702         rep->creq.multisample_pattern = metadata->multisample_pattern;
1703         rep->creq.quality_level = metadata->quality_level;
1704         rep->creq.must_be_zero = 0;
1705
1706 out_bad_resource:
1707         ttm_base_object_unref(&base);
1708
1709         return ret;
1710 }
1711
1712 /**
1713  * vmw_subres_dirty_add - Add a dirty region to a subresource
1714  * @dirty: The surfaces's dirty tracker.
1715  * @loc_start: The location corresponding to the start of the region.
1716  * @loc_end: The location corresponding to the end of the region.
1717  *
1718  * As we are assuming that @loc_start and @loc_end represent a sequential
1719  * range of backing store memory, if the region spans multiple lines then
1720  * regardless of the x coordinate, the full lines are dirtied.
1721  * Correspondingly if the region spans multiple z slices, then full rather
1722  * than partial z slices are dirtied.
1723  */
1724 static void vmw_subres_dirty_add(struct vmw_surface_dirty *dirty,
1725                                  const struct svga3dsurface_loc *loc_start,
1726                                  const struct svga3dsurface_loc *loc_end)
1727 {
1728         const struct svga3dsurface_cache *cache = &dirty->cache;
1729         SVGA3dBox *box = &dirty->boxes[loc_start->sub_resource];
1730         u32 mip = loc_start->sub_resource % cache->num_mip_levels;
1731         const struct drm_vmw_size *size = &cache->mip[mip].size;
1732         u32 box_c2 = box->z + box->d;
1733
1734         if (WARN_ON(loc_start->sub_resource >= dirty->num_subres))
1735                 return;
1736
1737         if (box->d == 0 || box->z > loc_start->z)
1738                 box->z = loc_start->z;
1739         if (box_c2 < loc_end->z)
1740                 box->d = loc_end->z - box->z;
1741
1742         if (loc_start->z + 1 == loc_end->z) {
1743                 box_c2 = box->y + box->h;
1744                 if (box->h == 0 || box->y > loc_start->y)
1745                         box->y = loc_start->y;
1746                 if (box_c2 < loc_end->y)
1747                         box->h = loc_end->y - box->y;
1748
1749                 if (loc_start->y + 1 == loc_end->y) {
1750                         box_c2 = box->x + box->w;
1751                         if (box->w == 0 || box->x > loc_start->x)
1752                                 box->x = loc_start->x;
1753                         if (box_c2 < loc_end->x)
1754                                 box->w = loc_end->x - box->x;
1755                 } else {
1756                         box->x = 0;
1757                         box->w = size->width;
1758                 }
1759         } else {
1760                 box->y = 0;
1761                 box->h = size->height;
1762                 box->x = 0;
1763                 box->w = size->width;
1764         }
1765 }
1766
1767 /**
1768  * vmw_subres_dirty_full - Mark a full subresource as dirty
1769  * @dirty: The surface's dirty tracker.
1770  * @subres: The subresource
1771  */
1772 static void vmw_subres_dirty_full(struct vmw_surface_dirty *dirty, u32 subres)
1773 {
1774         const struct svga3dsurface_cache *cache = &dirty->cache;
1775         u32 mip = subres % cache->num_mip_levels;
1776         const struct drm_vmw_size *size = &cache->mip[mip].size;
1777         SVGA3dBox *box = &dirty->boxes[subres];
1778
1779         box->x = 0;
1780         box->y = 0;
1781         box->z = 0;
1782         box->w = size->width;
1783         box->h = size->height;
1784         box->d = size->depth;
1785 }
1786
1787 /*
1788  * vmw_surface_tex_dirty_add_range - The dirty_add_range callback for texture
1789  * surfaces.
1790  */
1791 static void vmw_surface_tex_dirty_range_add(struct vmw_resource *res,
1792                                             size_t start, size_t end)
1793 {
1794         struct vmw_surface_dirty *dirty =
1795                 (struct vmw_surface_dirty *) res->dirty;
1796         size_t backup_end = res->backup_offset + res->backup_size;
1797         struct svga3dsurface_loc loc1, loc2;
1798         const struct svga3dsurface_cache *cache;
1799
1800         start = max_t(size_t, start, res->backup_offset) - res->backup_offset;
1801         end = min(end, backup_end) - res->backup_offset;
1802         cache = &dirty->cache;
1803         svga3dsurface_get_loc(cache, &loc1, start);
1804         svga3dsurface_get_loc(cache, &loc2, end - 1);
1805         svga3dsurface_inc_loc(cache, &loc2);
1806
1807         if (loc1.sub_resource + 1 == loc2.sub_resource) {
1808                 /* Dirty range covers a single sub-resource */
1809                 vmw_subres_dirty_add(dirty, &loc1, &loc2);
1810         } else {
1811                 /* Dirty range covers multiple sub-resources */
1812                 struct svga3dsurface_loc loc_min, loc_max;
1813                 u32 sub_res;
1814
1815                 svga3dsurface_max_loc(cache, loc1.sub_resource, &loc_max);
1816                 vmw_subres_dirty_add(dirty, &loc1, &loc_max);
1817                 svga3dsurface_min_loc(cache, loc2.sub_resource - 1, &loc_min);
1818                 vmw_subres_dirty_add(dirty, &loc_min, &loc2);
1819                 for (sub_res = loc1.sub_resource + 1;
1820                      sub_res < loc2.sub_resource - 1; ++sub_res)
1821                         vmw_subres_dirty_full(dirty, sub_res);
1822         }
1823 }
1824
1825 /*
1826  * vmw_surface_tex_dirty_add_range - The dirty_add_range callback for buffer
1827  * surfaces.
1828  */
1829 static void vmw_surface_buf_dirty_range_add(struct vmw_resource *res,
1830                                             size_t start, size_t end)
1831 {
1832         struct vmw_surface_dirty *dirty =
1833                 (struct vmw_surface_dirty *) res->dirty;
1834         const struct svga3dsurface_cache *cache = &dirty->cache;
1835         size_t backup_end = res->backup_offset + cache->mip_chain_bytes;
1836         SVGA3dBox *box = &dirty->boxes[0];
1837         u32 box_c2;
1838
1839         box->h = box->d = 1;
1840         start = max_t(size_t, start, res->backup_offset) - res->backup_offset;
1841         end = min(end, backup_end) - res->backup_offset;
1842         box_c2 = box->x + box->w;
1843         if (box->w == 0 || box->x > start)
1844                 box->x = start;
1845         if (box_c2 < end)
1846                 box->w = end - box->x;
1847 }
1848
1849 /*
1850  * vmw_surface_tex_dirty_add_range - The dirty_add_range callback for surfaces
1851  */
1852 static void vmw_surface_dirty_range_add(struct vmw_resource *res, size_t start,
1853                                         size_t end)
1854 {
1855         struct vmw_surface *srf = vmw_res_to_srf(res);
1856
1857         if (WARN_ON(end <= res->backup_offset ||
1858                     start >= res->backup_offset + res->backup_size))
1859                 return;
1860
1861         if (srf->metadata.format == SVGA3D_BUFFER)
1862                 vmw_surface_buf_dirty_range_add(res, start, end);
1863         else
1864                 vmw_surface_tex_dirty_range_add(res, start, end);
1865 }
1866
1867 /*
1868  * vmw_surface_dirty_sync - The surface's dirty_sync callback.
1869  */
1870 static int vmw_surface_dirty_sync(struct vmw_resource *res)
1871 {
1872         struct vmw_private *dev_priv = res->dev_priv;
1873         bool has_dx = 0;
1874         u32 i, num_dirty;
1875         struct vmw_surface_dirty *dirty =
1876                 (struct vmw_surface_dirty *) res->dirty;
1877         size_t alloc_size;
1878         const struct svga3dsurface_cache *cache = &dirty->cache;
1879         struct {
1880                 SVGA3dCmdHeader header;
1881                 SVGA3dCmdDXUpdateSubResource body;
1882         } *cmd1;
1883         struct {
1884                 SVGA3dCmdHeader header;
1885                 SVGA3dCmdUpdateGBImage body;
1886         } *cmd2;
1887         void *cmd;
1888
1889         num_dirty = 0;
1890         for (i = 0; i < dirty->num_subres; ++i) {
1891                 const SVGA3dBox *box = &dirty->boxes[i];
1892
1893                 if (box->d)
1894                         num_dirty++;
1895         }
1896
1897         if (!num_dirty)
1898                 goto out;
1899
1900         alloc_size = num_dirty * ((has_dx) ? sizeof(*cmd1) : sizeof(*cmd2));
1901         cmd = VMW_CMD_RESERVE(dev_priv, alloc_size);
1902         if (!cmd)
1903                 return -ENOMEM;
1904
1905         cmd1 = cmd;
1906         cmd2 = cmd;
1907
1908         for (i = 0; i < dirty->num_subres; ++i) {
1909                 const SVGA3dBox *box = &dirty->boxes[i];
1910
1911                 if (!box->d)
1912                         continue;
1913
1914                 /*
1915                  * DX_UPDATE_SUBRESOURCE is aware of array surfaces.
1916                  * UPDATE_GB_IMAGE is not.
1917                  */
1918                 if (has_dx) {
1919                         cmd1->header.id = SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE;
1920                         cmd1->header.size = sizeof(cmd1->body);
1921                         cmd1->body.sid = res->id;
1922                         cmd1->body.subResource = i;
1923                         cmd1->body.box = *box;
1924                         cmd1++;
1925                 } else {
1926                         cmd2->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
1927                         cmd2->header.size = sizeof(cmd2->body);
1928                         cmd2->body.image.sid = res->id;
1929                         cmd2->body.image.face = i / cache->num_mip_levels;
1930                         cmd2->body.image.mipmap = i -
1931                                 (cache->num_mip_levels * cmd2->body.image.face);
1932                         cmd2->body.box = *box;
1933                         cmd2++;
1934                 }
1935
1936         }
1937         vmw_cmd_commit(dev_priv, alloc_size);
1938  out:
1939         memset(&dirty->boxes[0], 0, sizeof(dirty->boxes[0]) *
1940                dirty->num_subres);
1941
1942         return 0;
1943 }
1944
1945 /*
1946  * vmw_surface_dirty_alloc - The surface's dirty_alloc callback.
1947  */
1948 static int vmw_surface_dirty_alloc(struct vmw_resource *res)
1949 {
1950         struct vmw_surface *srf = vmw_res_to_srf(res);
1951         const struct vmw_surface_metadata *metadata = &srf->metadata;
1952         struct vmw_surface_dirty *dirty;
1953         u32 num_layers = 1;
1954         u32 num_mip;
1955         u32 num_subres;
1956         u32 num_samples;
1957         size_t dirty_size, acc_size;
1958         static struct ttm_operation_ctx ctx = {
1959                 .interruptible = false,
1960                 .no_wait_gpu = false
1961         };
1962         int ret;
1963
1964         if (metadata->array_size)
1965                 num_layers = metadata->array_size;
1966         else if (metadata->flags & SVGA3D_SURFACE_CUBEMAP)
1967                 num_layers *= SVGA3D_MAX_SURFACE_FACES;
1968
1969         num_mip = metadata->mip_levels[0];
1970         if (!num_mip)
1971                 num_mip = 1;
1972
1973         num_subres = num_layers * num_mip;
1974         dirty_size = struct_size(dirty, boxes, num_subres);
1975         acc_size = ttm_round_pot(dirty_size);
1976         ret = ttm_mem_global_alloc(vmw_mem_glob(res->dev_priv),
1977                                    acc_size, &ctx);
1978         if (ret) {
1979                 VMW_DEBUG_USER("Out of graphics memory for surface "
1980                                "dirty tracker.\n");
1981                 return ret;
1982         }
1983
1984         dirty = kvzalloc(dirty_size, GFP_KERNEL);
1985         if (!dirty) {
1986                 ret = -ENOMEM;
1987                 goto out_no_dirty;
1988         }
1989
1990         num_samples = max_t(u32, 1, metadata->multisample_count);
1991         ret = svga3dsurface_setup_cache(&metadata->base_size, metadata->format,
1992                                         num_mip, num_layers, num_samples,
1993                                         &dirty->cache);
1994         if (ret)
1995                 goto out_no_cache;
1996
1997         dirty->num_subres = num_subres;
1998         dirty->size = acc_size;
1999         res->dirty = (struct vmw_resource_dirty *) dirty;
2000
2001         return 0;
2002
2003 out_no_cache:
2004         kvfree(dirty);
2005 out_no_dirty:
2006         ttm_mem_global_free(vmw_mem_glob(res->dev_priv), acc_size);
2007         return ret;
2008 }
2009
2010 /*
2011  * vmw_surface_dirty_free - The surface's dirty_free callback
2012  */
2013 static void vmw_surface_dirty_free(struct vmw_resource *res)
2014 {
2015         struct vmw_surface_dirty *dirty =
2016                 (struct vmw_surface_dirty *) res->dirty;
2017         size_t acc_size = dirty->size;
2018
2019         kvfree(dirty);
2020         ttm_mem_global_free(vmw_mem_glob(res->dev_priv), acc_size);
2021         res->dirty = NULL;
2022 }
2023
2024 /*
2025  * vmw_surface_clean - The surface's clean callback
2026  */
2027 static int vmw_surface_clean(struct vmw_resource *res)
2028 {
2029         struct vmw_private *dev_priv = res->dev_priv;
2030         size_t alloc_size;
2031         struct {
2032                 SVGA3dCmdHeader header;
2033                 SVGA3dCmdReadbackGBSurface body;
2034         } *cmd;
2035
2036         alloc_size = sizeof(*cmd);
2037         cmd = VMW_CMD_RESERVE(dev_priv, alloc_size);
2038         if (!cmd)
2039                 return -ENOMEM;
2040
2041         cmd->header.id = SVGA_3D_CMD_READBACK_GB_SURFACE;
2042         cmd->header.size = sizeof(cmd->body);
2043         cmd->body.sid = res->id;
2044         vmw_cmd_commit(dev_priv, alloc_size);
2045
2046         return 0;
2047 }
2048
2049 /*
2050  * vmw_gb_surface_define - Define a private GB surface
2051  *
2052  * @dev_priv: Pointer to a device private.
2053  * @user_accounting_size:  Used to track user-space memory usage, set
2054  *                         to 0 for kernel mode only memory
2055  * @metadata: Metadata representing the surface to create.
2056  * @user_srf_out: allocated user_srf. Set to NULL on failure.
2057  *
2058  * GB surfaces allocated by this function will not have a user mode handle, and
2059  * thus will only be visible to vmwgfx.  For optimization reasons the
2060  * surface may later be given a user mode handle by another function to make
2061  * it available to user mode drivers.
2062  */
2063 int vmw_gb_surface_define(struct vmw_private *dev_priv,
2064                           uint32_t user_accounting_size,
2065                           const struct vmw_surface_metadata *req,
2066                           struct vmw_surface **srf_out)
2067 {
2068         struct vmw_surface_metadata *metadata;
2069         struct vmw_user_surface *user_srf;
2070         struct vmw_surface *srf;
2071         struct ttm_operation_ctx ctx = {
2072                 .interruptible = true,
2073                 .no_wait_gpu = false
2074         };
2075         u32 sample_count = 1;
2076         u32 num_layers = 1;
2077         int ret;
2078
2079         *srf_out = NULL;
2080
2081         if (req->scanout) {
2082                 if (!svga3dsurface_is_screen_target_format(req->format)) {
2083                         VMW_DEBUG_USER("Invalid Screen Target surface format.");
2084                         return -EINVAL;
2085                 }
2086
2087                 if (req->base_size.width > dev_priv->texture_max_width ||
2088                     req->base_size.height > dev_priv->texture_max_height) {
2089                         VMW_DEBUG_USER("%ux%u\n, exceed max surface size %ux%u",
2090                                        req->base_size.width,
2091                                        req->base_size.height,
2092                                        dev_priv->texture_max_width,
2093                                        dev_priv->texture_max_height);
2094                         return -EINVAL;
2095                 }
2096         } else {
2097                 const struct svga3d_surface_desc *desc =
2098                         svga3dsurface_get_desc(req->format);
2099
2100                 if (desc->block_desc == SVGA3DBLOCKDESC_NONE) {
2101                         VMW_DEBUG_USER("Invalid surface format.\n");
2102                         return -EINVAL;
2103                 }
2104         }
2105
2106         if (req->autogen_filter != SVGA3D_TEX_FILTER_NONE)
2107                 return -EINVAL;
2108
2109         if (req->num_sizes != 1)
2110                 return -EINVAL;
2111
2112         if (req->sizes != NULL)
2113                 return -EINVAL;
2114
2115         ret = ttm_read_lock(&dev_priv->reservation_sem, true);
2116         if (unlikely(ret != 0))
2117                 return ret;
2118
2119         ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
2120                                    user_accounting_size, &ctx);
2121         if (ret != 0) {
2122                 if (ret != -ERESTARTSYS)
2123                         DRM_ERROR("Out of graphics memory for surface.\n");
2124                 goto out_unlock;
2125         }
2126
2127         user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
2128         if (unlikely(!user_srf)) {
2129                 ret = -ENOMEM;
2130                 goto out_no_user_srf;
2131         }
2132
2133         *srf_out  = &user_srf->srf;
2134         user_srf->size = user_accounting_size;
2135         user_srf->prime.base.shareable = false;
2136         user_srf->prime.base.tfile = NULL;
2137
2138         srf = &user_srf->srf;
2139         srf->metadata = *req;
2140         srf->offsets = NULL;
2141
2142         metadata = &srf->metadata;
2143
2144         if (metadata->array_size)
2145                 num_layers = req->array_size;
2146         else if (metadata->flags & SVGA3D_SURFACE_CUBEMAP)
2147                 num_layers = SVGA3D_MAX_SURFACE_FACES;
2148
2149         if (metadata->flags & SVGA3D_SURFACE_MULTISAMPLE)
2150                 sample_count = metadata->multisample_count;
2151
2152         srf->res.backup_size =
2153                 svga3dsurface_get_serialized_size_extended(metadata->format,
2154                                                            metadata->base_size,
2155                                                            metadata->mip_levels[0],
2156                                                            num_layers,
2157                                                            sample_count);
2158
2159         if (metadata->flags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT)
2160                 srf->res.backup_size += sizeof(SVGA3dDXSOState);
2161
2162         /*
2163          * Don't set SVGA3D_SURFACE_SCREENTARGET flag for a scanout surface with
2164          * size greater than STDU max width/height. This is really a workaround
2165          * to support creation of big framebuffer requested by some user-space
2166          * for whole topology. That big framebuffer won't really be used for
2167          * binding with screen target as during prepare_fb a separate surface is
2168          * created so it's safe to ignore SVGA3D_SURFACE_SCREENTARGET flag.
2169          */
2170         if (dev_priv->active_display_unit == vmw_du_screen_target &&
2171             metadata->scanout &&
2172             metadata->base_size.width <= dev_priv->stdu_max_width &&
2173             metadata->base_size.height <= dev_priv->stdu_max_height)
2174                 metadata->flags |= SVGA3D_SURFACE_SCREENTARGET;
2175
2176         /*
2177          * From this point, the generic resource management functions
2178          * destroy the object on failure.
2179          */
2180         ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
2181
2182         ttm_read_unlock(&dev_priv->reservation_sem);
2183         return ret;
2184
2185 out_no_user_srf:
2186         ttm_mem_global_free(vmw_mem_glob(dev_priv), user_accounting_size);
2187
2188 out_unlock:
2189         ttm_read_unlock(&dev_priv->reservation_sem);
2190         return ret;
2191 }