2 * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and
3 * initial domain support. We also handle the DSDT _PRT callbacks for GSI's
4 * used in HVM and initial domain mode (PV does not parse ACPI, so it has no
5 * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and
6 * 0xcf8 PCI configuration read/write.
12 #include <linux/export.h>
13 #include <linux/init.h>
14 #include <linux/pci.h>
15 #include <linux/acpi.h>
18 #include <asm/io_apic.h>
19 #include <asm/pci_x86.h>
21 #include <asm/xen/hypervisor.h>
23 #include <xen/features.h>
24 #include <xen/events.h>
25 #include <asm/xen/pci.h>
26 #include <asm/xen/cpuid.h>
28 #include <asm/i8259.h>
30 static int xen_pcifront_enable_irq(struct pci_dev *dev)
37 rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
39 dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
43 /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
46 if (gsi < nr_legacy_irqs())
49 rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront");
51 dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n",
57 dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq);
62 static int xen_register_pirq(u32 gsi, int gsi_override, int triggering,
65 int rc, pirq = -1, irq = -1;
66 struct physdev_map_pirq map_irq;
70 irq = xen_irq_from_gsi(gsi);
77 map_irq.domid = DOMID_SELF;
78 map_irq.type = MAP_PIRQ_TYPE_GSI;
82 rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
84 printk(KERN_WARNING "xen map irq failed %d\n", rc);
88 if (triggering == ACPI_EDGE_SENSITIVE) {
93 name = "ioapic-level";
96 if (gsi_override >= 0)
99 irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name);
103 printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi);
108 static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
109 int trigger, int polarity)
111 if (!xen_hvm_domain())
114 return xen_register_pirq(gsi, -1 /* no GSI override */, trigger,
115 false /* no mapping of GSI to PIRQ */);
118 #ifdef CONFIG_XEN_DOM0
119 static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity)
122 struct physdev_setup_gsi setup_gsi;
124 if (!xen_pv_domain())
127 printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
128 gsi, triggering, polarity);
130 irq = xen_register_pirq(gsi, gsi_override, triggering, true);
133 setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
134 setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
136 rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
138 printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
140 printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
147 static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
148 int trigger, int polarity)
150 return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity);
155 #if defined(CONFIG_PCI_MSI)
156 #include <linux/msi.h>
157 #include <asm/msidef.h>
159 struct xen_pci_frontend_ops *xen_pci_frontend;
160 EXPORT_SYMBOL_GPL(xen_pci_frontend);
162 static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
165 struct msi_desc *msidesc;
168 if (type == PCI_CAP_ID_MSI && nvec > 1)
171 v = kcalloc(max(1, nvec), sizeof(int), GFP_KERNEL);
175 if (type == PCI_CAP_ID_MSIX)
176 ret = xen_pci_frontend_enable_msix(dev, v, nvec);
178 ret = xen_pci_frontend_enable_msi(dev, v);
182 for_each_pci_msi_entry(msidesc, dev) {
183 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i],
184 (type == PCI_CAP_ID_MSI) ? nvec : 1,
185 (type == PCI_CAP_ID_MSIX) ?
200 dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n");
202 dev_err(&dev->dev, "Xen PCI frontend error: %d!\n", ret);
208 #define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE | \
209 MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0))
211 static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
214 /* We set vector == 0 to tell the hypervisor we don't care about it,
215 * but we want a pirq setup instead.
216 * We use the dest_id field to pass the pirq that we want. */
217 msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq);
220 MSI_ADDR_DEST_MODE_PHYSICAL |
221 MSI_ADDR_REDIRECTION_CPU |
222 MSI_ADDR_DEST_ID(pirq);
224 msg->data = XEN_PIRQ_MSI_DATA;
227 static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
230 struct msi_desc *msidesc;
233 if (type == PCI_CAP_ID_MSI && nvec > 1)
236 for_each_pci_msi_entry(msidesc, dev) {
237 pirq = xen_allocate_pirq_msi(dev, msidesc);
242 xen_msi_compose_msg(dev, pirq, &msg);
243 __pci_write_msi_msg(msidesc, &msg);
244 dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq);
245 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq,
246 (type == PCI_CAP_ID_MSI) ? nvec : 1,
247 (type == PCI_CAP_ID_MSIX) ?
253 "xen: msi --> pirq=%d --> irq=%d\n", pirq, irq);
258 dev_err(&dev->dev, "Failed to create MSI%s! ret=%d!\n",
259 type == PCI_CAP_ID_MSI ? "" : "-X", irq);
263 #ifdef CONFIG_XEN_DOM0
264 static bool __read_mostly pci_seg_supported = true;
266 static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
269 struct msi_desc *msidesc;
271 for_each_pci_msi_entry(msidesc, dev) {
272 struct physdev_map_pirq map_irq;
275 domid = ret = xen_find_device_domain_owner(dev);
276 /* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
277 * hence check ret value for < 0. */
281 memset(&map_irq, 0, sizeof(map_irq));
282 map_irq.domid = domid;
283 map_irq.type = MAP_PIRQ_TYPE_MSI_SEG;
286 map_irq.bus = dev->bus->number |
287 (pci_domain_nr(dev->bus) << 16);
288 map_irq.devfn = dev->devfn;
290 if (type == PCI_CAP_ID_MSI && nvec > 1) {
291 map_irq.type = MAP_PIRQ_TYPE_MULTI_MSI;
292 map_irq.entry_nr = nvec;
293 } else if (type == PCI_CAP_ID_MSIX) {
296 u32 table_offset, bir;
299 pci_read_config_dword(dev, pos + PCI_MSIX_TABLE,
301 bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
302 flags = pci_resource_flags(dev, bir);
303 if (!flags || (flags & IORESOURCE_UNSET))
306 map_irq.table_base = pci_resource_start(dev, bir);
307 map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
311 if (pci_seg_supported)
312 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
314 if (type == PCI_CAP_ID_MSI && nvec > 1 && ret) {
316 * If MAP_PIRQ_TYPE_MULTI_MSI is not available
317 * there's nothing else we can do in this case.
318 * Just set ret > 0 so driver can retry with
324 if (ret == -EINVAL && !pci_domain_nr(dev->bus)) {
325 map_irq.type = MAP_PIRQ_TYPE_MSI;
328 map_irq.bus = dev->bus->number;
329 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
332 pci_seg_supported = false;
335 dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
340 ret = xen_bind_pirq_msi_to_irq(dev, msidesc, map_irq.pirq,
341 (type == PCI_CAP_ID_MSI) ? nvec : 1,
342 (type == PCI_CAP_ID_MSIX) ? "msi-x" : "msi",
352 static void xen_initdom_restore_msi_irqs(struct pci_dev *dev)
356 if (pci_seg_supported) {
357 struct physdev_pci_device restore_ext;
359 restore_ext.seg = pci_domain_nr(dev->bus);
360 restore_ext.bus = dev->bus->number;
361 restore_ext.devfn = dev->devfn;
362 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext,
365 pci_seg_supported = false;
366 WARN(ret && ret != -ENOSYS, "restore_msi_ext -> %d\n", ret);
368 if (!pci_seg_supported) {
369 struct physdev_restore_msi restore;
371 restore.bus = dev->bus->number;
372 restore.devfn = dev->devfn;
373 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi, &restore);
374 WARN(ret && ret != -ENOSYS, "restore_msi -> %d\n", ret);
379 static void xen_teardown_msi_irqs(struct pci_dev *dev)
381 struct msi_desc *msidesc;
383 msidesc = first_pci_msi_entry(dev);
384 if (msidesc->msi_attrib.is_msix)
385 xen_pci_frontend_disable_msix(dev);
387 xen_pci_frontend_disable_msi(dev);
389 /* Free the IRQ's and the msidesc using the generic code. */
390 default_teardown_msi_irqs(dev);
393 static void xen_teardown_msi_irq(unsigned int irq)
395 xen_destroy_irq(irq);
400 int __init pci_xen_init(void)
402 if (!xen_pv_domain() || xen_initial_domain())
405 printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");
407 pcibios_set_cache_line_size();
409 pcibios_enable_irq = xen_pcifront_enable_irq;
410 pcibios_disable_irq = NULL;
412 /* Keep ACPI out of the picture */
415 #ifdef CONFIG_PCI_MSI
416 x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
417 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
418 x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
419 pci_msi_ignore_mask = 1;
424 #ifdef CONFIG_PCI_MSI
425 void __init xen_msi_init(void)
429 * If hardware supports (x2)APIC virtualization (as indicated
430 * by hypervisor's leaf 4) then we don't need to use pirqs/
431 * event channels for MSI handling and instead use regular
434 uint32_t eax = cpuid_eax(xen_cpuid_base() + 4);
436 if (((eax & XEN_HVM_CPUID_X2APIC_VIRT) && x2apic_mode) ||
437 ((eax & XEN_HVM_CPUID_APIC_ACCESS_VIRT) && boot_cpu_has(X86_FEATURE_APIC)))
441 x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
442 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
446 int __init pci_xen_hvm_init(void)
448 if (!xen_have_vector_callback || !xen_feature(XENFEAT_hvm_pirqs))
453 * We don't want to change the actual ACPI delivery model,
454 * just how GSIs get registered.
456 __acpi_register_gsi = acpi_register_gsi_xen_hvm;
457 __acpi_unregister_gsi = NULL;
460 #ifdef CONFIG_PCI_MSI
462 * We need to wait until after x2apic is initialized
463 * before we can set MSI IRQ ops.
465 x86_platform.apic_post_init = xen_msi_init;
470 #ifdef CONFIG_XEN_DOM0
471 int __init pci_xen_initial_domain(void)
475 #ifdef CONFIG_PCI_MSI
476 x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
477 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
478 x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
479 pci_msi_ignore_mask = 1;
481 __acpi_register_gsi = acpi_register_gsi_xen;
482 __acpi_unregister_gsi = NULL;
484 * Pre-allocate the legacy IRQs. Use NR_LEGACY_IRQS here
485 * because we don't have a PIC and thus nr_legacy_irqs() is zero.
487 for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
488 int trigger, polarity;
490 if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
493 xen_register_pirq(irq, -1 /* no GSI override */,
494 trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
495 true /* Map GSI to PIRQ */);
497 if (0 == nr_ioapics) {
498 for (irq = 0; irq < nr_legacy_irqs(); irq++)
499 xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic");
504 struct xen_device_domain_owner {
507 struct list_head list;
510 static DEFINE_SPINLOCK(dev_domain_list_spinlock);
511 static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);
513 static struct xen_device_domain_owner *find_device(struct pci_dev *dev)
515 struct xen_device_domain_owner *owner;
517 list_for_each_entry(owner, &dev_domain_list, list) {
518 if (owner->dev == dev)
524 int xen_find_device_domain_owner(struct pci_dev *dev)
526 struct xen_device_domain_owner *owner;
527 int domain = -ENODEV;
529 spin_lock(&dev_domain_list_spinlock);
530 owner = find_device(dev);
532 domain = owner->domain;
533 spin_unlock(&dev_domain_list_spinlock);
536 EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);
538 int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
540 struct xen_device_domain_owner *owner;
542 owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
546 spin_lock(&dev_domain_list_spinlock);
547 if (find_device(dev)) {
548 spin_unlock(&dev_domain_list_spinlock);
552 owner->domain = domain;
554 list_add_tail(&owner->list, &dev_domain_list);
555 spin_unlock(&dev_domain_list_spinlock);
558 EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);
560 int xen_unregister_device_domain_owner(struct pci_dev *dev)
562 struct xen_device_domain_owner *owner;
564 spin_lock(&dev_domain_list_spinlock);
565 owner = find_device(dev);
567 spin_unlock(&dev_domain_list_spinlock);
570 list_del(&owner->list);
571 spin_unlock(&dev_domain_list_spinlock);
575 EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);