arch/arm/mach-omap2/omap_hwmod_43xx_data.c

   1 /*
   2  * Copyright (C) 2013 Texas Instruments Incorporated
   3  *
   4  * Hwmod present only in AM43x and those that differ other than register
   5  * offsets as compared to AM335x.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation version 2.
  10  *
  11  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  12  * kind, whether express or implied; without even the implied warranty
  13  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include "omap_hwmod.h"
  18 #include "omap_hwmod_33xx_43xx_common_data.h"
  19 #include "prcm43xx.h"
  20 #include "omap_hwmod_common_data.h"
  21
  22 /* IP blocks */
  23 static struct omap_hwmod am43xx_emif_hwmod = {
  24         .name           = "emif",
  25         .class          = &am33xx_emif_hwmod_class,
  26         .clkdm_name     = "emif_clkdm",
  27         .flags          = HWMOD_INIT_NO_IDLE,
  28         .main_clk       = "dpll_ddr_m2_ck",
  29         .prcm           = {
  30                 .omap4  = {
  31                         .clkctrl_offs   = AM43XX_CM_PER_EMIF_CLKCTRL_OFFSET,
  32                         .modulemode     = MODULEMODE_SWCTRL,
  33                 },
  34         },
  35 };
  36
  37 static struct omap_hwmod am43xx_l4_hs_hwmod = {
  38         .name           = "l4_hs",
  39         .class          = &am33xx_l4_hwmod_class,
  40         .clkdm_name     = "l3_clkdm",
  41         .flags          = HWMOD_INIT_NO_IDLE,
  42         .main_clk       = "l4hs_gclk",
  43         .prcm           = {
  44                 .omap4  = {
  45                         .clkctrl_offs   = AM43XX_CM_PER_L4HS_CLKCTRL_OFFSET,
  46                         .modulemode     = MODULEMODE_SWCTRL,
  47                 },
  48         },
  49 };
  50
  51 static struct omap_hwmod_rst_info am33xx_wkup_m3_resets[] = {
  52         { .name = "wkup_m3", .rst_shift = 3, .st_shift = 5 },
  53 };
  54
  55 static struct omap_hwmod am43xx_wkup_m3_hwmod = {
  56         .name           = "wkup_m3",
  57         .class          = &am33xx_wkup_m3_hwmod_class,
  58         .clkdm_name     = "l4_wkup_aon_clkdm",
  59         /* Keep hardreset asserted */
  60         .flags          = HWMOD_INIT_NO_RESET | HWMOD_NO_IDLEST,
  61         .main_clk       = "sys_clkin_ck",
  62         .prcm           = {
  63                 .omap4  = {
  64                         .clkctrl_offs   = AM43XX_CM_WKUP_WKUP_M3_CLKCTRL_OFFSET,
  65                         .rstctrl_offs   = AM43XX_RM_WKUP_RSTCTRL_OFFSET,
  66                         .rstst_offs     = AM43XX_RM_WKUP_RSTST_OFFSET,
  67                         .modulemode     = MODULEMODE_SWCTRL,
  68                 },
  69         },
  70         .rst_lines      = am33xx_wkup_m3_resets,
  71         .rst_lines_cnt  = ARRAY_SIZE(am33xx_wkup_m3_resets),
  72 };
  73
  74 static struct omap_hwmod am43xx_control_hwmod = {
  75         .name           = "control",
  76         .class          = &am33xx_control_hwmod_class,
  77         .clkdm_name     = "l4_wkup_clkdm",
  78         .flags          = HWMOD_INIT_NO_IDLE,
  79         .main_clk       = "sys_clkin_ck",
  80         .prcm           = {
  81                 .omap4  = {
  82                         .clkctrl_offs   = AM43XX_CM_WKUP_CONTROL_CLKCTRL_OFFSET,
  83                         .modulemode     = MODULEMODE_SWCTRL,
  84                 },
  85         },
  86 };
  87
  88 static struct omap_hwmod_class_sysconfig am43xx_synctimer_sysc = {
  89         .rev_offs       = 0x0,
  90         .sysc_offs      = 0x4,
  91         .sysc_flags     = SYSC_HAS_SIDLEMODE,
  92         .idlemodes      = (SIDLE_FORCE | SIDLE_NO),
  93         .sysc_fields    = &omap_hwmod_sysc_type1,
  94 };
  95
  96 static struct omap_hwmod_class am43xx_synctimer_hwmod_class = {
  97         .name   = "synctimer",
  98         .sysc   = &am43xx_synctimer_sysc,
  99 };
 100
 101 static struct omap_hwmod am43xx_synctimer_hwmod = {
 102         .name           = "counter_32k",
 103         .class          = &am43xx_synctimer_hwmod_class,
 104         .clkdm_name     = "l4_wkup_aon_clkdm",
 105         .flags          = HWMOD_SWSUP_SIDLE,
 106         .main_clk       = "synctimer_32kclk",
 107         .prcm = {
 108                 .omap4 = {
 109                         .clkctrl_offs = AM43XX_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET,
 110                         .modulemode   = MODULEMODE_SWCTRL,
 111                 },
 112         },
 113 };
 114
 115
 116 static struct omap_hwmod_class_sysconfig am43xx_usb_otg_ss_sysc = {
 117         .rev_offs       = 0x0000,
 118         .sysc_offs      = 0x0010,
 119         .sysc_flags     = (SYSC_HAS_DMADISABLE | SYSC_HAS_MIDLEMODE |
 120                                 SYSC_HAS_SIDLEMODE),
 121         .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
 122                                 SIDLE_SMART_WKUP | MSTANDBY_FORCE |
 123                                 MSTANDBY_NO | MSTANDBY_SMART |
 124                                 MSTANDBY_SMART_WKUP),
 125         .sysc_fields    = &omap_hwmod_sysc_type2,
 126 };
 127
 128 static struct omap_hwmod_class am43xx_usb_otg_ss_hwmod_class = {
 129         .name   = "usb_otg_ss",
 130         .sysc   = &am43xx_usb_otg_ss_sysc,
 131 };
 132
 133 static struct omap_hwmod am43xx_usb_otg_ss0_hwmod = {
 134         .name           = "usb_otg_ss0",
 135         .class          = &am43xx_usb_otg_ss_hwmod_class,
 136         .clkdm_name     = "l3s_clkdm",
 137         .main_clk       = "l3s_gclk",
 138         .prcm = {
 139                 .omap4 = {
 140                         .clkctrl_offs   = AM43XX_CM_PER_USB_OTG_SS0_CLKCTRL_OFFSET,
 141                         .modulemode     = MODULEMODE_SWCTRL,
 142                 },
 143         },
 144 };
 145
 146 static struct omap_hwmod am43xx_usb_otg_ss1_hwmod = {
 147         .name           = "usb_otg_ss1",
 148         .class          = &am43xx_usb_otg_ss_hwmod_class,
 149         .clkdm_name     = "l3s_clkdm",
 150         .main_clk       = "l3s_gclk",
 151         .prcm = {
 152                 .omap4 = {
 153                         .clkctrl_offs   = AM43XX_CM_PER_USB_OTG_SS1_CLKCTRL_OFFSET,
 154                         .modulemode     = MODULEMODE_SWCTRL,
 155                 },
 156         },
 157 };
 158
 159 /* Interfaces */
 160 static struct omap_hwmod_ocp_if am43xx_l3_main__emif = {
 161         .master         = &am33xx_l3_main_hwmod,
 162         .slave          = &am43xx_emif_hwmod,
 163         .clk            = "dpll_core_m4_ck",
 164         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 165 };
 166
 167 static struct omap_hwmod_ocp_if am43xx_l3_main__l4_hs = {
 168         .master         = &am33xx_l3_main_hwmod,
 169         .slave          = &am43xx_l4_hs_hwmod,
 170         .clk            = "l3s_gclk",
 171         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 172 };
 173
 174 static struct omap_hwmod_ocp_if am43xx_wkup_m3__l4_wkup = {
 175         .master         = &am43xx_wkup_m3_hwmod,
 176         .slave          = &am33xx_l4_wkup_hwmod,
 177         .clk            = "sys_clkin_ck",
 178         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 179 };
 180
 181 static struct omap_hwmod_ocp_if am43xx_l4_wkup__wkup_m3 = {
 182         .master         = &am33xx_l4_wkup_hwmod,
 183         .slave          = &am43xx_wkup_m3_hwmod,
 184         .clk            = "sys_clkin_ck",
 185         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 186 };
 187
 188 static struct omap_hwmod_ocp_if am43xx_l4_wkup__smartreflex0 = {
 189         .master         = &am33xx_l4_wkup_hwmod,
 190         .slave          = &am33xx_smartreflex0_hwmod,
 191         .clk            = "sys_clkin_ck",
 192         .user           = OCP_USER_MPU,
 193 };
 194
 195 static struct omap_hwmod_ocp_if am43xx_l4_wkup__smartreflex1 = {
 196         .master         = &am33xx_l4_wkup_hwmod,
 197         .slave          = &am33xx_smartreflex1_hwmod,
 198         .clk            = "sys_clkin_ck",
 199         .user           = OCP_USER_MPU,
 200 };
 201
 202 static struct omap_hwmod_ocp_if am43xx_l4_wkup__control = {
 203         .master         = &am33xx_l4_wkup_hwmod,
 204         .slave          = &am43xx_control_hwmod,
 205         .clk            = "sys_clkin_ck",
 206         .user           = OCP_USER_MPU,
 207 };
 208
 209 static struct omap_hwmod_ocp_if am43xx_l4_wkup__timer1 = {
 210         .master         = &am33xx_l4_wkup_hwmod,
 211         .slave          = &am33xx_timer1_hwmod,
 212         .clk            = "sys_clkin_ck",
 213         .user           = OCP_USER_MPU,
 214 };
 215
 216 static struct omap_hwmod_ocp_if am33xx_l4_wkup__synctimer = {
 217         .master         = &am33xx_l4_wkup_hwmod,
 218         .slave          = &am43xx_synctimer_hwmod,
 219         .clk            = "sys_clkin_ck",
 220         .user           = OCP_USER_MPU,
 221 };
 222
 223 static struct omap_hwmod_ocp_if am43xx_l3_s__usbotgss0 = {
 224         .master         = &am33xx_l3_s_hwmod,
 225         .slave          = &am43xx_usb_otg_ss0_hwmod,
 226         .clk            = "l3s_gclk",
 227         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 228 };
 229
 230 static struct omap_hwmod_ocp_if am43xx_l3_s__usbotgss1 = {
 231         .master         = &am33xx_l3_s_hwmod,
 232         .slave          = &am43xx_usb_otg_ss1_hwmod,
 233         .clk            = "l3s_gclk",
 234         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 235 };
 236
 237 static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
 238         &am33xx_l4_wkup__synctimer,
 239         &am33xx_mpu__l3_main,
 240         &am33xx_mpu__prcm,
 241         &am33xx_l3_s__l4_ls,
 242         &am33xx_l3_s__l4_wkup,
 243         &am43xx_l3_main__l4_hs,
 244         &am33xx_l3_main__l3_s,
 245         &am33xx_l3_main__l3_instr,
 246         &am33xx_l3_main__gfx,
 247         &am33xx_l3_s__l3_main,
 248         &am43xx_l3_main__emif,
 249         &am43xx_wkup_m3__l4_wkup,
 250         &am33xx_gfx__l3_main,
 251         &am43xx_l4_wkup__wkup_m3,
 252         &am43xx_l4_wkup__control,
 253         &am43xx_l4_wkup__smartreflex0,
 254         &am43xx_l4_wkup__smartreflex1,
 255         &am43xx_l4_wkup__timer1,
 256         &am33xx_l4_ls__timer2,
 257         &am33xx_l3_s__gpmc,
 258         &am33xx_l3_main__ocmc,
 259         &am43xx_l3_s__usbotgss0,
 260         &am43xx_l3_s__usbotgss1,
 261         NULL,
 262 };
 263
 264 static struct omap_hwmod_ocp_if *am43xx_rtc_hwmod_ocp_ifs[] __initdata = {
 265         &am33xx_l4_wkup__rtc,
 266         NULL,
 267 };
 268
 269 int __init am43xx_hwmod_init(void)
 270 {
 271         int ret;
 272
 273         omap_hwmod_am43xx_reg();
 274         omap_hwmod_init();
 275         ret = omap_hwmod_register_links(am43xx_hwmod_ocp_ifs);
 276
 277         if (!ret && of_machine_is_compatible("ti,am4372"))
 278                 ret = omap_hwmod_register_links(am43xx_rtc_hwmod_ocp_ifs);
 279
 280         return ret;
 281 }