arch/arm/mach-imx/mach-imx6ul.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2015 Freescale Semiconductor, Inc.
   4  */
   5 #include <linux/irqchip.h>
   6 #include <linux/mfd/syscon.h>
   7 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
   8 #include <linux/micrel_phy.h>
   9 #include <linux/of_platform.h>
  10 #include <linux/phy.h>
  11 #include <linux/regmap.h>
  12 #include <asm/mach/arch.h>
  13 #include <asm/mach/map.h>
  14
  15 #include "common.h"
  16 #include "cpuidle.h"
  17
  18 static void __init imx6ul_enet_clk_init(void)
  19 {
  20         struct regmap *gpr;
  21
  22         gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr");
  23         if (!IS_ERR(gpr))
  24                 regmap_update_bits(gpr, IOMUXC_GPR1, IMX6UL_GPR1_ENET_CLK_DIR,
  25                                    IMX6UL_GPR1_ENET_CLK_OUTPUT);
  26         else
  27                 pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n");
  28 }
  29
  30 static int ksz8081_phy_fixup(struct phy_device *dev)
  31 {
  32         if (dev && dev->interface == PHY_INTERFACE_MODE_MII) {
  33                 phy_write(dev, 0x1f, 0x8110);
  34                 phy_write(dev, 0x16, 0x201);
  35         } else if (dev && dev->interface == PHY_INTERFACE_MODE_RMII) {
  36                 phy_write(dev, 0x1f, 0x8190);
  37                 phy_write(dev, 0x16, 0x202);
  38         }
  39
  40         return 0;
  41 }
  42
  43 static void __init imx6ul_enet_phy_init(void)
  44 {
  45         if (IS_BUILTIN(CONFIG_PHYLIB))
  46                 phy_register_fixup_for_uid(PHY_ID_KSZ8081, MICREL_PHY_ID_MASK,
  47                                            ksz8081_phy_fixup);
  48 }
  49
  50 static inline void imx6ul_enet_init(void)
  51 {
  52         imx6ul_enet_clk_init();
  53         imx6ul_enet_phy_init();
  54 }
  55
  56 static void __init imx6ul_init_machine(void)
  57 {
  58         struct device *parent;
  59
  60         parent = imx_soc_device_init();
  61         if (parent == NULL)
  62                 pr_warn("failed to initialize soc device\n");
  63
  64         of_platform_default_populate(NULL, NULL, parent);
  65         imx6ul_enet_init();
  66         imx_anatop_init();
  67         imx6ul_pm_init();
  68 }
  69
  70 static void __init imx6ul_init_irq(void)
  71 {
  72         imx_init_revision_from_anatop();
  73         imx_src_init();
  74         irqchip_init();
  75         imx6_pm_ccm_init("fsl,imx6ul-ccm");
  76 }
  77
  78 static void __init imx6ul_init_late(void)
  79 {
  80         imx6sx_cpuidle_init();
  81
  82         if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
  83                 platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
  84 }
  85
  86 static const char * const imx6ul_dt_compat[] __initconst = {
  87         "fsl,imx6ul",
  88         "fsl,imx6ull",
  89         NULL,
  90 };
  91
  92 DT_MACHINE_START(IMX6UL, "Freescale i.MX6 Ultralite (Device Tree)")
  93         .init_irq       = imx6ul_init_irq,
  94         .init_machine   = imx6ul_init_machine,
  95         .init_late      = imx6ul_init_late,
  96         .dt_compat      = imx6ul_dt_compat,
  97 MACHINE_END