1 // SPDX-License-Identifier: GPL-2.0-only
3 // Copyright (c) 2022 MediaTek Inc.
6 #include <linux/clk-provider.h>
7 #include <linux/platform_device.h>
8 #include <dt-bindings/clock/mt8186-clk.h>
13 static const struct mtk_gate_regs mfg_cg_regs = {
19 #define GATE_MFG(_id, _name, _parent, _shift) \
20 GATE_MTK_FLAGS(_id, _name, _parent, &mfg_cg_regs, _shift, \
21 &mtk_clk_gate_ops_setclr, CLK_SET_RATE_PARENT)
23 static const struct mtk_gate mfg_clks[] = {
24 GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "top_mfg", 0),
27 static const struct mtk_clk_desc mfg_desc = {
29 .num_clks = ARRAY_SIZE(mfg_clks),
32 static const struct of_device_id of_match_clk_mt8186_mfg[] = {
34 .compatible = "mediatek,mt8186-mfgsys",
41 static struct platform_driver clk_mt8186_mfg_drv = {
42 .probe = mtk_clk_simple_probe,
43 .remove = mtk_clk_simple_remove,
45 .name = "clk-mt8186-mfg",
46 .of_match_table = of_match_clk_mt8186_mfg,
49 builtin_platform_driver(clk_mt8186_mfg_drv);