2 * Sonics Silicon Backplane
10 * Copyright (C) 2006 Broadcom Corporation.
12 * Licensed under the GNU/GPL. See COPYING for details.
15 #include <linux/ssb/ssb.h>
16 #include <linux/ssb/ssb_regs.h>
17 #include <linux/pci.h>
20 #include <pcmcia/cs_types.h>
21 #include <pcmcia/cs.h>
22 #include <pcmcia/cistpl.h>
23 #include <pcmcia/ds.h>
25 #include "ssb_private.h"
28 const char *ssb_core_name(u16 coreid)
31 case SSB_DEV_CHIPCOMMON:
41 case SSB_DEV_ETHERNET:
42 return "Fast Ethernet";
45 case SSB_DEV_USB11_HOSTDEV:
46 return "USB 1.1 Hostdev";
49 case SSB_DEV_ILINE100:
55 case SSB_DEV_INTERNAL_MEM:
56 return "Internal Memory";
57 case SSB_DEV_MEMC_SDRAM:
63 case SSB_DEV_MIPS_3302:
65 case SSB_DEV_USB11_HOST:
66 return "USB 1.1 Host";
67 case SSB_DEV_USB11_DEV:
68 return "USB 1.1 Device";
69 case SSB_DEV_USB20_HOST:
70 return "USB 2.0 Host";
71 case SSB_DEV_USB20_DEV:
72 return "USB 2.0 Device";
73 case SSB_DEV_SDIO_HOST:
75 case SSB_DEV_ROBOSWITCH:
77 case SSB_DEV_PARA_ATA:
79 case SSB_DEV_SATA_XORDMA:
80 return "SATA XOR-DMA";
81 case SSB_DEV_ETHERNET_GBIT:
82 return "GBit Ethernet";
85 case SSB_DEV_MIMO_PHY:
87 case SSB_DEV_SRAM_CTRLR:
88 return "SRAM Controller";
89 case SSB_DEV_MINI_MACPHY:
91 case SSB_DEV_ARM_1176:
93 case SSB_DEV_ARM_7TDMI:
99 static u16 pcidev_to_chipid(struct pci_dev *pci_dev)
101 u16 chipid_fallback = 0;
103 switch (pci_dev->device) {
105 chipid_fallback = 0x4301;
107 case 0x4305 ... 0x4307:
108 chipid_fallback = 0x4307;
111 chipid_fallback = 0x4402;
113 case 0x4610 ... 0x4615:
114 chipid_fallback = 0x4610;
116 case 0x4710 ... 0x4715:
117 chipid_fallback = 0x4710;
119 case 0x4320 ... 0x4325:
120 chipid_fallback = 0x4309;
122 case PCI_DEVICE_ID_BCM4401:
123 case PCI_DEVICE_ID_BCM4401B0:
124 case PCI_DEVICE_ID_BCM4401B1:
125 chipid_fallback = 0x4401;
128 ssb_printk(KERN_ERR PFX
129 "PCI-ID not in fallback list\n");
132 return chipid_fallback;
135 static u8 chipid_to_nrcores(u16 chipid)
155 ssb_printk(KERN_ERR PFX
156 "CHIPID not in nrcores fallback list\n");
162 static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx,
167 switch (bus->bustype) {
168 case SSB_BUSTYPE_SSB:
169 offset += current_coreidx * SSB_CORE_SIZE;
171 case SSB_BUSTYPE_PCI:
173 case SSB_BUSTYPE_PCMCIA:
174 if (offset >= 0x800) {
175 ssb_pcmcia_switch_segment(bus, 1);
178 ssb_pcmcia_switch_segment(bus, 0);
179 lo = readw(bus->mmio + offset);
180 hi = readw(bus->mmio + offset + 2);
181 return lo | (hi << 16);
182 case SSB_BUSTYPE_SDIO:
183 offset += current_coreidx * SSB_CORE_SIZE;
184 return ssb_sdio_scan_read32(bus, offset);
186 return readl(bus->mmio + offset);
189 static int scan_switchcore(struct ssb_bus *bus, u8 coreidx)
191 switch (bus->bustype) {
192 case SSB_BUSTYPE_SSB:
194 case SSB_BUSTYPE_PCI:
195 return ssb_pci_switch_coreidx(bus, coreidx);
196 case SSB_BUSTYPE_PCMCIA:
197 return ssb_pcmcia_switch_coreidx(bus, coreidx);
198 case SSB_BUSTYPE_SDIO:
199 return ssb_sdio_scan_switch_coreidx(bus, coreidx);
204 void ssb_iounmap(struct ssb_bus *bus)
206 switch (bus->bustype) {
207 case SSB_BUSTYPE_SSB:
208 case SSB_BUSTYPE_PCMCIA:
211 case SSB_BUSTYPE_PCI:
212 #ifdef CONFIG_SSB_PCIHOST
213 pci_iounmap(bus->host_pci, bus->mmio);
215 SSB_BUG_ON(1); /* Can't reach this code. */
218 case SSB_BUSTYPE_SDIO:
222 bus->mapped_device = NULL;
225 static void __iomem *ssb_ioremap(struct ssb_bus *bus,
226 unsigned long baseaddr)
228 void __iomem *mmio = NULL;
230 switch (bus->bustype) {
231 case SSB_BUSTYPE_SSB:
232 /* Only map the first core for now. */
234 case SSB_BUSTYPE_PCMCIA:
235 mmio = ioremap(baseaddr, SSB_CORE_SIZE);
237 case SSB_BUSTYPE_PCI:
238 #ifdef CONFIG_SSB_PCIHOST
239 mmio = pci_iomap(bus->host_pci, 0, ~0UL);
241 SSB_BUG_ON(1); /* Can't reach this code. */
244 case SSB_BUSTYPE_SDIO:
245 /* Nothing to ioremap in the SDIO case, just fake it */
246 mmio = (void __iomem *)baseaddr;
253 static int we_support_multiple_80211_cores(struct ssb_bus *bus)
255 /* More than one 802.11 core is only supported by special chips.
256 * There are chips with two 802.11 cores, but with dangling
257 * pins on the second core. Be careful and reject them here.
260 #ifdef CONFIG_SSB_PCIHOST
261 if (bus->bustype == SSB_BUSTYPE_PCI) {
262 if (bus->host_pci->vendor == PCI_VENDOR_ID_BROADCOM &&
263 bus->host_pci->device == 0x4324)
266 #endif /* CONFIG_SSB_PCIHOST */
270 int ssb_bus_scan(struct ssb_bus *bus,
271 unsigned long baseaddr)
275 u32 idhi, cc, rev, tmp;
277 struct ssb_device *dev;
278 int nr_80211_cores = 0;
280 mmio = ssb_ioremap(bus, baseaddr);
285 err = scan_switchcore(bus, 0); /* Switch to first core */
289 idhi = scan_read32(bus, 0, SSB_IDHIGH);
290 cc = (idhi & SSB_IDHIGH_CC) >> SSB_IDHIGH_CC_SHIFT;
291 rev = (idhi & SSB_IDHIGH_RCLO);
292 rev |= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT;
295 if (cc == SSB_DEV_CHIPCOMMON) {
296 tmp = scan_read32(bus, 0, SSB_CHIPCO_CHIPID);
298 bus->chip_id = (tmp & SSB_CHIPCO_IDMASK);
299 bus->chip_rev = (tmp & SSB_CHIPCO_REVMASK) >>
301 bus->chip_package = (tmp & SSB_CHIPCO_PACKMASK) >>
302 SSB_CHIPCO_PACKSHIFT;
304 bus->nr_devices = (tmp & SSB_CHIPCO_NRCORESMASK) >>
305 SSB_CHIPCO_NRCORESSHIFT;
307 tmp = scan_read32(bus, 0, SSB_CHIPCO_CAP);
308 bus->chipco.capabilities = tmp;
310 if (bus->bustype == SSB_BUSTYPE_PCI) {
311 bus->chip_id = pcidev_to_chipid(bus->host_pci);
312 pci_read_config_word(bus->host_pci, PCI_REVISION_ID,
314 bus->chip_package = 0;
316 bus->chip_id = 0x4710;
318 bus->chip_package = 0;
321 if (!bus->nr_devices)
322 bus->nr_devices = chipid_to_nrcores(bus->chip_id);
323 if (bus->nr_devices > ARRAY_SIZE(bus->devices)) {
324 ssb_printk(KERN_ERR PFX
325 "More than %d ssb cores found (%d)\n",
326 SSB_MAX_NR_CORES, bus->nr_devices);
329 if (bus->bustype == SSB_BUSTYPE_SSB) {
330 /* Now that we know the number of cores,
331 * remap the whole IO space for all cores.
335 mmio = ioremap(baseaddr, SSB_CORE_SIZE * bus->nr_devices);
341 /* Fetch basic information about each core/device */
342 for (i = 0, dev_i = 0; i < bus->nr_devices; i++) {
343 err = scan_switchcore(bus, i);
346 dev = &(bus->devices[dev_i]);
348 idhi = scan_read32(bus, i, SSB_IDHIGH);
349 dev->id.coreid = (idhi & SSB_IDHIGH_CC) >> SSB_IDHIGH_CC_SHIFT;
350 dev->id.revision = (idhi & SSB_IDHIGH_RCLO);
351 dev->id.revision |= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT;
352 dev->id.vendor = (idhi & SSB_IDHIGH_VC) >> SSB_IDHIGH_VC_SHIFT;
357 ssb_dprintk(KERN_INFO PFX
359 "(cc 0x%03X, rev 0x%02X, vendor 0x%04X)\n",
360 i, ssb_core_name(dev->id.coreid),
361 dev->id.coreid, dev->id.revision, dev->id.vendor);
363 switch (dev->id.coreid) {
366 if (nr_80211_cores > 1) {
367 if (!we_support_multiple_80211_cores(bus)) {
368 ssb_dprintk(KERN_INFO PFX "Ignoring additional "
375 #ifdef CONFIG_SSB_DRIVER_EXTIF
376 if (bus->extif.dev) {
377 ssb_printk(KERN_WARNING PFX
378 "WARNING: Multiple EXTIFs found\n");
381 bus->extif.dev = dev;
382 #endif /* CONFIG_SSB_DRIVER_EXTIF */
384 case SSB_DEV_CHIPCOMMON:
385 if (bus->chipco.dev) {
386 ssb_printk(KERN_WARNING PFX
387 "WARNING: Multiple ChipCommon found\n");
390 bus->chipco.dev = dev;
393 case SSB_DEV_MIPS_3302:
394 #ifdef CONFIG_SSB_DRIVER_MIPS
395 if (bus->mipscore.dev) {
396 ssb_printk(KERN_WARNING PFX
397 "WARNING: Multiple MIPS cores found\n");
400 bus->mipscore.dev = dev;
401 #endif /* CONFIG_SSB_DRIVER_MIPS */
405 #ifdef CONFIG_SSB_DRIVER_PCICORE
406 if (bus->bustype == SSB_BUSTYPE_PCI) {
407 /* Ignore PCI cores on PCI-E cards.
408 * Ignore PCI-E cores on PCI cards. */
409 if (dev->id.coreid == SSB_DEV_PCI) {
410 if (bus->host_pci->is_pcie)
413 if (!bus->host_pci->is_pcie)
417 if (bus->pcicore.dev) {
418 ssb_printk(KERN_WARNING PFX
419 "WARNING: Multiple PCI(E) cores found\n");
422 bus->pcicore.dev = dev;
423 #endif /* CONFIG_SSB_DRIVER_PCICORE */
431 bus->nr_devices = dev_i;