1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2009 VMware, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
23 * Authors: Michel Dänzer
26 #include <drm/amdgpu_drm.h>
28 #include "amdgpu_uvd.h"
29 #include "amdgpu_vce.h"
31 /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
32 static void amdgpu_do_test_moves(struct amdgpu_device *adev)
34 struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
35 struct amdgpu_bo *vram_obj = NULL;
36 struct amdgpu_bo **gtt_obj = NULL;
37 struct amdgpu_bo_param bp;
38 uint64_t gart_addr, vram_addr;
45 * (Total GTT - IB pool - writeback page - ring buffers) / test size
47 n = adev->gmc.gart_size - AMDGPU_IB_POOL_SIZE*64*1024;
48 for (i = 0; i < AMDGPU_MAX_RINGS; ++i)
50 n -= adev->rings[i]->ring_size;
52 n -= AMDGPU_GPU_PAGE_SIZE;
53 if (adev->irq.ih.ring_obj)
54 n -= adev->irq.ih.ring_size;
57 gtt_obj = kcalloc(n, sizeof(*gtt_obj), GFP_KERNEL);
59 DRM_ERROR("Failed to allocate %d pointers\n", n);
63 memset(&bp, 0, sizeof(bp));
65 bp.byte_align = PAGE_SIZE;
66 bp.domain = AMDGPU_GEM_DOMAIN_VRAM;
68 bp.type = ttm_bo_type_kernel;
71 r = amdgpu_bo_create(adev, &bp, &vram_obj);
73 DRM_ERROR("Failed to create VRAM object\n");
76 r = amdgpu_bo_reserve(vram_obj, false);
79 r = amdgpu_bo_pin(vram_obj, AMDGPU_GEM_DOMAIN_VRAM, &vram_addr);
81 DRM_ERROR("Failed to pin VRAM object\n");
84 for (i = 0; i < n; i++) {
85 void *gtt_map, *vram_map;
86 void **gart_start, **gart_end;
87 void **vram_start, **vram_end;
88 struct dma_fence *fence = NULL;
90 bp.domain = AMDGPU_GEM_DOMAIN_GTT;
91 r = amdgpu_bo_create(adev, &bp, gtt_obj + i);
93 DRM_ERROR("Failed to create GTT object %d\n", i);
97 r = amdgpu_bo_reserve(gtt_obj[i], false);
99 goto out_lclean_unref;
100 r = amdgpu_bo_pin(gtt_obj[i], AMDGPU_GEM_DOMAIN_GTT, &gart_addr);
102 DRM_ERROR("Failed to pin GTT object %d\n", i);
103 goto out_lclean_unres;
106 r = amdgpu_bo_kmap(gtt_obj[i], >t_map);
108 DRM_ERROR("Failed to map GTT object %d\n", i);
109 goto out_lclean_unpin;
112 for (gart_start = gtt_map, gart_end = gtt_map + size;
113 gart_start < gart_end;
115 *gart_start = gart_start;
117 amdgpu_bo_kunmap(gtt_obj[i]);
119 r = amdgpu_copy_buffer(ring, gart_addr, vram_addr,
120 size, NULL, &fence, false, false);
123 DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
124 goto out_lclean_unpin;
127 r = dma_fence_wait(fence, false);
129 DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
130 goto out_lclean_unpin;
133 dma_fence_put(fence);
135 r = amdgpu_bo_kmap(vram_obj, &vram_map);
137 DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
138 goto out_lclean_unpin;
141 for (gart_start = gtt_map, gart_end = gtt_map + size,
142 vram_start = vram_map, vram_end = vram_map + size;
143 vram_start < vram_end;
144 gart_start++, vram_start++) {
145 if (*vram_start != gart_start) {
146 DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
147 "expected 0x%p (GTT/VRAM offset "
148 "0x%16llx/0x%16llx)\n",
149 i, *vram_start, gart_start,
151 (gart_addr - adev->gmc.gart_start +
152 (void*)gart_start - gtt_map),
154 (vram_addr - adev->gmc.vram_start +
155 (void*)gart_start - gtt_map));
156 amdgpu_bo_kunmap(vram_obj);
157 goto out_lclean_unpin;
159 *vram_start = vram_start;
162 amdgpu_bo_kunmap(vram_obj);
164 r = amdgpu_copy_buffer(ring, vram_addr, gart_addr,
165 size, NULL, &fence, false, false);
168 DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
169 goto out_lclean_unpin;
172 r = dma_fence_wait(fence, false);
174 DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
175 goto out_lclean_unpin;
178 dma_fence_put(fence);
180 r = amdgpu_bo_kmap(gtt_obj[i], >t_map);
182 DRM_ERROR("Failed to map GTT object after copy %d\n", i);
183 goto out_lclean_unpin;
186 for (gart_start = gtt_map, gart_end = gtt_map + size,
187 vram_start = vram_map, vram_end = vram_map + size;
188 gart_start < gart_end;
189 gart_start++, vram_start++) {
190 if (*gart_start != vram_start) {
191 DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
192 "expected 0x%p (VRAM/GTT offset "
193 "0x%16llx/0x%16llx)\n",
194 i, *gart_start, vram_start,
196 (vram_addr - adev->gmc.vram_start +
197 (void*)vram_start - vram_map),
199 (gart_addr - adev->gmc.gart_start +
200 (void*)vram_start - vram_map));
201 amdgpu_bo_kunmap(gtt_obj[i]);
202 goto out_lclean_unpin;
206 amdgpu_bo_kunmap(gtt_obj[i]);
208 DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
209 gart_addr - adev->gmc.gart_start);
213 amdgpu_bo_unpin(gtt_obj[i]);
215 amdgpu_bo_unreserve(gtt_obj[i]);
217 amdgpu_bo_unref(>t_obj[i]);
219 for (--i; i >= 0; --i) {
220 amdgpu_bo_unpin(gtt_obj[i]);
221 amdgpu_bo_unreserve(gtt_obj[i]);
222 amdgpu_bo_unref(>t_obj[i]);
225 dma_fence_put(fence);
229 amdgpu_bo_unpin(vram_obj);
231 amdgpu_bo_unreserve(vram_obj);
233 amdgpu_bo_unref(&vram_obj);
237 pr_warn("Error while testing BO move\n");
241 void amdgpu_test_moves(struct amdgpu_device *adev)
243 if (adev->mman.buffer_funcs)
244 amdgpu_do_test_moves(adev);