1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2009 Nuvoton technology.
7 #include <linux/module.h>
8 #include <linux/spinlock.h>
9 #include <linux/interrupt.h>
10 #include <linux/delay.h>
11 #include <linux/errno.h>
12 #include <linux/err.h>
13 #include <linux/clk.h>
14 #include <linux/device.h>
15 #include <linux/platform_device.h>
16 #include <linux/gpio.h>
18 #include <linux/slab.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/spi_bitbang.h>
23 #include <linux/platform_data/spi-nuc900.h>
25 /* usi registers offset */
32 /* usi register bit */
33 #define ENINT (0x01 << 17)
34 #define ENFLG (0x01 << 16)
35 #define SLEEP (0x0f << 12)
36 #define TXNUM (0x03 << 8)
37 #define TXBITLEN (0x1f << 3)
38 #define TXNEG (0x01 << 2)
39 #define RXNEG (0x01 << 1)
40 #define LSB (0x01 << 10)
41 #define SELECTLEV (0x01 << 2)
42 #define SELECTPOL (0x01 << 31)
43 #define SELECTSLAVE 0x01
47 struct spi_bitbang bitbang;
48 struct completion done;
53 const unsigned char *tx;
56 struct spi_master *master;
57 struct nuc900_spi_info *pdata;
61 static inline struct nuc900_spi *to_hw(struct spi_device *sdev)
63 return spi_master_get_devdata(sdev->master);
66 static void nuc900_slave_select(struct spi_device *spi, unsigned int ssr)
68 struct nuc900_spi *hw = to_hw(spi);
70 unsigned int cs = spi->mode & SPI_CS_HIGH ? 1 : 0;
71 unsigned int cpol = spi->mode & SPI_CPOL ? 1 : 0;
74 spin_lock_irqsave(&hw->lock, flags);
76 val = __raw_readl(hw->regs + USI_SSR);
88 __raw_writel(val, hw->regs + USI_SSR);
90 val = __raw_readl(hw->regs + USI_CNT);
97 __raw_writel(val, hw->regs + USI_CNT);
99 spin_unlock_irqrestore(&hw->lock, flags);
102 static void nuc900_spi_chipsel(struct spi_device *spi, int value)
105 case BITBANG_CS_INACTIVE:
106 nuc900_slave_select(spi, 0);
109 case BITBANG_CS_ACTIVE:
110 nuc900_slave_select(spi, 1);
115 static void nuc900_spi_setup_txnum(struct nuc900_spi *hw, unsigned int txnum)
120 spin_lock_irqsave(&hw->lock, flags);
122 val = __raw_readl(hw->regs + USI_CNT) & ~TXNUM;
125 val |= txnum << 0x08;
127 __raw_writel(val, hw->regs + USI_CNT);
129 spin_unlock_irqrestore(&hw->lock, flags);
133 static void nuc900_spi_setup_txbitlen(struct nuc900_spi *hw,
134 unsigned int txbitlen)
139 spin_lock_irqsave(&hw->lock, flags);
141 val = __raw_readl(hw->regs + USI_CNT) & ~TXBITLEN;
143 val |= (txbitlen << 0x03);
145 __raw_writel(val, hw->regs + USI_CNT);
147 spin_unlock_irqrestore(&hw->lock, flags);
150 static void nuc900_spi_gobusy(struct nuc900_spi *hw)
155 spin_lock_irqsave(&hw->lock, flags);
157 val = __raw_readl(hw->regs + USI_CNT);
161 __raw_writel(val, hw->regs + USI_CNT);
163 spin_unlock_irqrestore(&hw->lock, flags);
166 static inline unsigned int hw_txbyte(struct nuc900_spi *hw, int count)
168 return hw->tx ? hw->tx[count] : 0;
171 static int nuc900_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
173 struct nuc900_spi *hw = to_hw(spi);
180 __raw_writel(hw_txbyte(hw, 0x0), hw->regs + USI_TX0);
182 nuc900_spi_gobusy(hw);
184 wait_for_completion(&hw->done);
189 static irqreturn_t nuc900_spi_irq(int irq, void *dev)
191 struct nuc900_spi *hw = dev;
193 unsigned int count = hw->count;
195 status = __raw_readl(hw->regs + USI_CNT);
196 __raw_writel(status, hw->regs + USI_CNT);
198 if (status & ENFLG) {
202 hw->rx[count] = __raw_readl(hw->regs + USI_RX0);
205 if (count < hw->len) {
206 __raw_writel(hw_txbyte(hw, count), hw->regs + USI_TX0);
207 nuc900_spi_gobusy(hw);
219 static void nuc900_tx_edge(struct nuc900_spi *hw, unsigned int edge)
224 spin_lock_irqsave(&hw->lock, flags);
226 val = __raw_readl(hw->regs + USI_CNT);
232 __raw_writel(val, hw->regs + USI_CNT);
234 spin_unlock_irqrestore(&hw->lock, flags);
237 static void nuc900_rx_edge(struct nuc900_spi *hw, unsigned int edge)
242 spin_lock_irqsave(&hw->lock, flags);
244 val = __raw_readl(hw->regs + USI_CNT);
250 __raw_writel(val, hw->regs + USI_CNT);
252 spin_unlock_irqrestore(&hw->lock, flags);
255 static void nuc900_send_first(struct nuc900_spi *hw, unsigned int lsb)
260 spin_lock_irqsave(&hw->lock, flags);
262 val = __raw_readl(hw->regs + USI_CNT);
268 __raw_writel(val, hw->regs + USI_CNT);
270 spin_unlock_irqrestore(&hw->lock, flags);
273 static void nuc900_set_sleep(struct nuc900_spi *hw, unsigned int sleep)
278 spin_lock_irqsave(&hw->lock, flags);
280 val = __raw_readl(hw->regs + USI_CNT) & ~SLEEP;
283 val |= (sleep << 12);
285 __raw_writel(val, hw->regs + USI_CNT);
287 spin_unlock_irqrestore(&hw->lock, flags);
290 static void nuc900_enable_int(struct nuc900_spi *hw)
295 spin_lock_irqsave(&hw->lock, flags);
297 val = __raw_readl(hw->regs + USI_CNT);
301 __raw_writel(val, hw->regs + USI_CNT);
303 spin_unlock_irqrestore(&hw->lock, flags);
306 static void nuc900_set_divider(struct nuc900_spi *hw)
308 __raw_writel(hw->pdata->divider, hw->regs + USI_DIV);
311 static void nuc900_init_spi(struct nuc900_spi *hw)
314 spin_lock_init(&hw->lock);
316 nuc900_tx_edge(hw, hw->pdata->txneg);
317 nuc900_rx_edge(hw, hw->pdata->rxneg);
318 nuc900_send_first(hw, hw->pdata->lsb);
319 nuc900_set_sleep(hw, hw->pdata->sleep);
320 nuc900_spi_setup_txbitlen(hw, hw->pdata->txbitlen);
321 nuc900_spi_setup_txnum(hw, hw->pdata->txnum);
322 nuc900_set_divider(hw);
323 nuc900_enable_int(hw);
326 static int nuc900_spi_probe(struct platform_device *pdev)
328 struct nuc900_spi *hw;
329 struct spi_master *master;
330 struct resource *res;
333 master = spi_alloc_master(&pdev->dev, sizeof(struct nuc900_spi));
334 if (master == NULL) {
335 dev_err(&pdev->dev, "No memory for spi_master\n");
339 hw = spi_master_get_devdata(master);
341 hw->pdata = dev_get_platdata(&pdev->dev);
343 if (hw->pdata == NULL) {
344 dev_err(&pdev->dev, "No platform data supplied\n");
349 platform_set_drvdata(pdev, hw);
350 init_completion(&hw->done);
352 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
354 master->mode_bits |= SPI_LSB_FIRST;
355 master->num_chipselect = hw->pdata->num_cs;
356 master->bus_num = hw->pdata->bus_num;
357 hw->bitbang.master = hw->master;
358 hw->bitbang.chipselect = nuc900_spi_chipsel;
359 hw->bitbang.txrx_bufs = nuc900_spi_txrx;
361 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
362 hw->regs = devm_ioremap_resource(&pdev->dev, res);
363 if (IS_ERR(hw->regs)) {
364 err = PTR_ERR(hw->regs);
368 hw->irq = platform_get_irq(pdev, 0);
370 dev_err(&pdev->dev, "No IRQ specified\n");
375 err = devm_request_irq(&pdev->dev, hw->irq, nuc900_spi_irq, 0,
378 dev_err(&pdev->dev, "Cannot claim IRQ\n");
382 hw->clk = devm_clk_get(&pdev->dev, "spi");
383 if (IS_ERR(hw->clk)) {
384 dev_err(&pdev->dev, "No clock for device\n");
385 err = PTR_ERR(hw->clk);
389 mfp_set_groupg(&pdev->dev, NULL);
392 err = spi_bitbang_start(&hw->bitbang);
394 dev_err(&pdev->dev, "Failed to register SPI master\n");
401 clk_disable(hw->clk);
403 spi_master_put(hw->master);
407 static int nuc900_spi_remove(struct platform_device *dev)
409 struct nuc900_spi *hw = platform_get_drvdata(dev);
411 spi_bitbang_stop(&hw->bitbang);
412 clk_disable(hw->clk);
413 spi_master_put(hw->master);
417 static struct platform_driver nuc900_spi_driver = {
418 .probe = nuc900_spi_probe,
419 .remove = nuc900_spi_remove,
421 .name = "nuc900-spi",
424 module_platform_driver(nuc900_spi_driver);
427 MODULE_DESCRIPTION("nuc900 spi driver!");
428 MODULE_LICENSE("GPL");
429 MODULE_ALIAS("platform:nuc900-spi");