drivers/mtd/nand/raw/oxnas_nand.c

   1 /*
   2  * Oxford Semiconductor OXNAS NAND driver
   3
   4  * Copyright (C) 2016 Neil Armstrong <[email protected]>
   5  * Heavily based on plat_nand.c :
   6  * Author: Vitaly Wool <[email protected]>
   7  * Copyright (C) 2013 Ma Haijun <[email protected]>
   8  * Copyright (C) 2012 John Crispin <[email protected]>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  *
  14  */
  15
  16 #include <linux/err.h>
  17 #include <linux/io.h>
  18 #include <linux/module.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/slab.h>
  21 #include <linux/clk.h>
  22 #include <linux/reset.h>
  23 #include <linux/mtd/mtd.h>
  24 #include <linux/mtd/rawnand.h>
  25 #include <linux/mtd/partitions.h>
  26 #include <linux/of.h>
  27
  28 /* Nand commands */
  29 #define OXNAS_NAND_CMD_ALE              BIT(18)
  30 #define OXNAS_NAND_CMD_CLE              BIT(19)
  31
  32 #define OXNAS_NAND_MAX_CHIPS    1
  33
  34 struct oxnas_nand_ctrl {
  35         struct nand_controller base;
  36         void __iomem *io_base;
  37         struct clk *clk;
  38         struct nand_chip *chips[OXNAS_NAND_MAX_CHIPS];
  39 };
  40
  41 static uint8_t oxnas_nand_read_byte(struct nand_chip *chip)
  42 {
  43         struct oxnas_nand_ctrl *oxnas = nand_get_controller_data(chip);
  44
  45         return readb(oxnas->io_base);
  46 }
  47
  48 static void oxnas_nand_read_buf(struct nand_chip *chip, u8 *buf, int len)
  49 {
  50         struct oxnas_nand_ctrl *oxnas = nand_get_controller_data(chip);
  51
  52         ioread8_rep(oxnas->io_base, buf, len);
  53 }
  54
  55 static void oxnas_nand_write_buf(struct nand_chip *chip, const u8 *buf,
  56                                  int len)
  57 {
  58         struct oxnas_nand_ctrl *oxnas = nand_get_controller_data(chip);
  59
  60         iowrite8_rep(oxnas->io_base, buf, len);
  61 }
  62
  63 /* Single CS command control */
  64 static void oxnas_nand_cmd_ctrl(struct nand_chip *chip, int cmd,
  65                                 unsigned int ctrl)
  66 {
  67         struct oxnas_nand_ctrl *oxnas = nand_get_controller_data(chip);
  68
  69         if (ctrl & NAND_CLE)
  70                 writeb(cmd, oxnas->io_base + OXNAS_NAND_CMD_CLE);
  71         else if (ctrl & NAND_ALE)
  72                 writeb(cmd, oxnas->io_base + OXNAS_NAND_CMD_ALE);
  73 }
  74
  75 /*
  76  * Probe for the NAND device.
  77  */
  78 static int oxnas_nand_probe(struct platform_device *pdev)
  79 {
  80         struct device_node *np = pdev->dev.of_node;
  81         struct device_node *nand_np;
  82         struct oxnas_nand_ctrl *oxnas;
  83         struct nand_chip *chip;
  84         struct mtd_info *mtd;
  85         struct resource *res;
  86         int nchips = 0;
  87         int count = 0;
  88         int err = 0;
  89
  90         /* Allocate memory for the device structure (and zero it) */
  91         oxnas = devm_kzalloc(&pdev->dev, sizeof(*oxnas),
  92                              GFP_KERNEL);
  93         if (!oxnas)
  94                 return -ENOMEM;
  95
  96         nand_controller_init(&oxnas->base);
  97
  98         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  99         oxnas->io_base = devm_ioremap_resource(&pdev->dev, res);
 100         if (IS_ERR(oxnas->io_base))
 101                 return PTR_ERR(oxnas->io_base);
 102
 103         oxnas->clk = devm_clk_get(&pdev->dev, NULL);
 104         if (IS_ERR(oxnas->clk))
 105                 oxnas->clk = NULL;
 106
 107         /* Only a single chip node is supported */
 108         count = of_get_child_count(np);
 109         if (count > 1)
 110                 return -EINVAL;
 111
 112         err = clk_prepare_enable(oxnas->clk);
 113         if (err)
 114                 return err;
 115
 116         device_reset_optional(&pdev->dev);
 117
 118         for_each_child_of_node(np, nand_np) {
 119                 chip = devm_kzalloc(&pdev->dev, sizeof(struct nand_chip),
 120                                     GFP_KERNEL);
 121                 if (!chip) {
 122                         err = -ENOMEM;
 123                         goto err_clk_unprepare;
 124                 }
 125
 126                 chip->controller = &oxnas->base;
 127
 128                 nand_set_flash_node(chip, nand_np);
 129                 nand_set_controller_data(chip, oxnas);
 130
 131                 mtd = nand_to_mtd(chip);
 132                 mtd->dev.parent = &pdev->dev;
 133                 mtd->priv = chip;
 134
 135                 chip->legacy.cmd_ctrl = oxnas_nand_cmd_ctrl;
 136                 chip->legacy.read_buf = oxnas_nand_read_buf;
 137                 chip->legacy.read_byte = oxnas_nand_read_byte;
 138                 chip->legacy.write_buf = oxnas_nand_write_buf;
 139                 chip->legacy.chip_delay = 30;
 140
 141                 /* Scan to find existence of the device */
 142                 err = nand_scan(chip, 1);
 143                 if (err)
 144                         goto err_clk_unprepare;
 145
 146                 err = mtd_device_register(mtd, NULL, 0);
 147                 if (err) {
 148                         nand_release(chip);
 149                         goto err_clk_unprepare;
 150                 }
 151
 152                 oxnas->chips[nchips] = chip;
 153                 ++nchips;
 154         }
 155
 156         /* Exit if no chips found */
 157         if (!nchips) {
 158                 err = -ENODEV;
 159                 goto err_clk_unprepare;
 160         }
 161
 162         platform_set_drvdata(pdev, oxnas);
 163
 164         return 0;
 165
 166 err_clk_unprepare:
 167         clk_disable_unprepare(oxnas->clk);
 168         return err;
 169 }
 170
 171 static int oxnas_nand_remove(struct platform_device *pdev)
 172 {
 173         struct oxnas_nand_ctrl *oxnas = platform_get_drvdata(pdev);
 174
 175         if (oxnas->chips[0])
 176                 nand_release(oxnas->chips[0]);
 177
 178         clk_disable_unprepare(oxnas->clk);
 179
 180         return 0;
 181 }
 182
 183 static const struct of_device_id oxnas_nand_match[] = {
 184         { .compatible = "oxsemi,ox820-nand" },
 185         {},
 186 };
 187 MODULE_DEVICE_TABLE(of, oxnas_nand_match);
 188
 189 static struct platform_driver oxnas_nand_driver = {
 190         .probe  = oxnas_nand_probe,
 191         .remove = oxnas_nand_remove,
 192         .driver = {
 193                 .name           = "oxnas_nand",
 194                 .of_match_table = oxnas_nand_match,
 195         },
 196 };
 197
 198 module_platform_driver(oxnas_nand_driver);
 199
 200 MODULE_LICENSE("GPL");
 201 MODULE_AUTHOR("Neil Armstrong <[email protected]>");
 202 MODULE_DESCRIPTION("Oxnas NAND driver");
 203 MODULE_ALIAS("platform:oxnas_nand");