drivers/net/ethernet/mscc/ocelot_io.c

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 /*
   3  * Microsemi Ocelot Switch driver
   4  *
   5  * Copyright (c) 2017 Microsemi Corporation
   6  */
   7 #include <linux/io.h>
   8 #include <linux/kernel.h>
   9 #include <linux/platform_device.h>
  10
  11 #include "ocelot.h"
  12
  13 int __ocelot_bulk_read_ix(struct ocelot *ocelot, u32 reg, u32 offset, void *buf,
  14                           int count)
  15 {
  16         u16 target = reg >> TARGET_OFFSET;
  17
  18         WARN_ON(!target);
  19
  20         return regmap_bulk_read(ocelot->targets[target],
  21                                 ocelot->map[target][reg & REG_MASK] + offset,
  22                                 buf, count);
  23 }
  24 EXPORT_SYMBOL_GPL(__ocelot_bulk_read_ix);
  25
  26 u32 __ocelot_read_ix(struct ocelot *ocelot, u32 reg, u32 offset)
  27 {
  28         u16 target = reg >> TARGET_OFFSET;
  29         u32 val;
  30
  31         WARN_ON(!target);
  32
  33         regmap_read(ocelot->targets[target],
  34                     ocelot->map[target][reg & REG_MASK] + offset, &val);
  35         return val;
  36 }
  37 EXPORT_SYMBOL_GPL(__ocelot_read_ix);
  38
  39 void __ocelot_write_ix(struct ocelot *ocelot, u32 val, u32 reg, u32 offset)
  40 {
  41         u16 target = reg >> TARGET_OFFSET;
  42
  43         WARN_ON(!target);
  44
  45         regmap_write(ocelot->targets[target],
  46                      ocelot->map[target][reg & REG_MASK] + offset, val);
  47 }
  48 EXPORT_SYMBOL_GPL(__ocelot_write_ix);
  49
  50 void __ocelot_rmw_ix(struct ocelot *ocelot, u32 val, u32 mask, u32 reg,
  51                      u32 offset)
  52 {
  53         u16 target = reg >> TARGET_OFFSET;
  54
  55         WARN_ON(!target);
  56
  57         regmap_update_bits(ocelot->targets[target],
  58                            ocelot->map[target][reg & REG_MASK] + offset,
  59                            mask, val);
  60 }
  61 EXPORT_SYMBOL_GPL(__ocelot_rmw_ix);
  62
  63 u32 ocelot_port_readl(struct ocelot_port *port, u32 reg)
  64 {
  65         struct ocelot *ocelot = port->ocelot;
  66         u16 target = reg >> TARGET_OFFSET;
  67         u32 val;
  68
  69         WARN_ON(!target);
  70
  71         regmap_read(port->target, ocelot->map[target][reg & REG_MASK], &val);
  72         return val;
  73 }
  74 EXPORT_SYMBOL_GPL(ocelot_port_readl);
  75
  76 void ocelot_port_writel(struct ocelot_port *port, u32 val, u32 reg)
  77 {
  78         struct ocelot *ocelot = port->ocelot;
  79         u16 target = reg >> TARGET_OFFSET;
  80
  81         WARN_ON(!target);
  82
  83         regmap_write(port->target, ocelot->map[target][reg & REG_MASK], val);
  84 }
  85 EXPORT_SYMBOL_GPL(ocelot_port_writel);
  86
  87 void ocelot_port_rmwl(struct ocelot_port *port, u32 val, u32 mask, u32 reg)
  88 {
  89         u32 cur = ocelot_port_readl(port, reg);
  90
  91         ocelot_port_writel(port, (cur & (~mask)) | val, reg);
  92 }
  93 EXPORT_SYMBOL_GPL(ocelot_port_rmwl);
  94
  95 u32 __ocelot_target_read_ix(struct ocelot *ocelot, enum ocelot_target target,
  96                             u32 reg, u32 offset)
  97 {
  98         u32 val;
  99
 100         regmap_read(ocelot->targets[target],
 101                     ocelot->map[target][reg] + offset, &val);
 102         return val;
 103 }
 104
 105 void __ocelot_target_write_ix(struct ocelot *ocelot, enum ocelot_target target,
 106                               u32 val, u32 reg, u32 offset)
 107 {
 108         regmap_write(ocelot->targets[target],
 109                      ocelot->map[target][reg] + offset, val);
 110 }
 111
 112 int ocelot_regfields_init(struct ocelot *ocelot,
 113                           const struct reg_field *const regfields)
 114 {
 115         unsigned int i;
 116         u16 target;
 117
 118         for (i = 0; i < REGFIELD_MAX; i++) {
 119                 struct reg_field regfield = {};
 120                 u32 reg = regfields[i].reg;
 121
 122                 if (!reg)
 123                         continue;
 124
 125                 target = regfields[i].reg >> TARGET_OFFSET;
 126
 127                 regfield.reg = ocelot->map[target][reg & REG_MASK];
 128                 regfield.lsb = regfields[i].lsb;
 129                 regfield.msb = regfields[i].msb;
 130                 regfield.id_size = regfields[i].id_size;
 131                 regfield.id_offset = regfields[i].id_offset;
 132
 133                 ocelot->regfields[i] =
 134                 devm_regmap_field_alloc(ocelot->dev,
 135                                         ocelot->targets[target],
 136                                         regfield);
 137
 138                 if (IS_ERR(ocelot->regfields[i]))
 139                         return PTR_ERR(ocelot->regfields[i]);
 140         }
 141
 142         return 0;
 143 }
 144 EXPORT_SYMBOL_GPL(ocelot_regfields_init);
 145
 146 static struct regmap_config ocelot_regmap_config = {
 147         .reg_bits       = 32,
 148         .val_bits       = 32,
 149         .reg_stride     = 4,
 150 };
 151
 152 struct regmap *ocelot_regmap_init(struct ocelot *ocelot, struct resource *res)
 153 {
 154         void __iomem *regs;
 155
 156         regs = devm_ioremap_resource(ocelot->dev, res);
 157         if (IS_ERR(regs))
 158                 return ERR_CAST(regs);
 159
 160         ocelot_regmap_config.name = res->name;
 161
 162         return devm_regmap_init_mmio(ocelot->dev, regs, &ocelot_regmap_config);
 163 }
 164 EXPORT_SYMBOL_GPL(ocelot_regmap_init);