1 // SPDX-License-Identifier: GPL-2.0+
3 * adux1020.c - Support for Analog Devices ADUX1020 photometric sensor
5 * Copyright (C) 2019 Linaro Ltd.
8 * TODO: Triggered buffer support
11 #include <linux/bitfield.h>
12 #include <linux/delay.h>
13 #include <linux/err.h>
14 #include <linux/i2c.h>
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
17 #include <linux/irq.h>
18 #include <linux/module.h>
19 #include <linux/mutex.h>
20 #include <linux/regmap.h>
22 #include <linux/iio/iio.h>
23 #include <linux/iio/sysfs.h>
24 #include <linux/iio/events.h>
26 #define ADUX1020_REGMAP_NAME "adux1020_regmap"
27 #define ADUX1020_DRV_NAME "adux1020"
29 /* System registers */
30 #define ADUX1020_REG_CHIP_ID 0x08
31 #define ADUX1020_REG_SLAVE_ADDRESS 0x09
33 #define ADUX1020_REG_SW_RESET 0x0f
34 #define ADUX1020_REG_INT_ENABLE 0x1c
35 #define ADUX1020_REG_INT_POLARITY 0x1d
36 #define ADUX1020_REG_PROX_TH_ON1 0x2a
37 #define ADUX1020_REG_PROX_TH_OFF1 0x2b
38 #define ADUX1020_REG_PROX_TYPE 0x2f
39 #define ADUX1020_REG_TEST_MODES_3 0x32
40 #define ADUX1020_REG_FORCE_MODE 0x33
41 #define ADUX1020_REG_FREQUENCY 0x40
42 #define ADUX1020_REG_LED_CURRENT 0x41
43 #define ADUX1020_REG_OP_MODE 0x45
44 #define ADUX1020_REG_INT_MASK 0x48
45 #define ADUX1020_REG_INT_STATUS 0x49
46 #define ADUX1020_REG_DATA_BUFFER 0x60
49 #define ADUX1020_CHIP_ID_MASK GENMASK(11, 0)
50 #define ADUX1020_CHIP_ID 0x03fc
52 #define ADUX1020_SW_RESET BIT(1)
53 #define ADUX1020_FIFO_FLUSH BIT(15)
54 #define ADUX1020_OP_MODE_MASK GENMASK(3, 0)
55 #define ADUX1020_DATA_OUT_MODE_MASK GENMASK(7, 4)
56 #define ADUX1020_DATA_OUT_PROX_I FIELD_PREP(ADUX1020_DATA_OUT_MODE_MASK, 1)
58 #define ADUX1020_MODE_INT_MASK GENMASK(7, 0)
59 #define ADUX1020_INT_ENABLE 0x2094
60 #define ADUX1020_INT_DISABLE 0x2090
61 #define ADUX1020_PROX_INT_ENABLE 0x00f0
62 #define ADUX1020_PROX_ON1_INT BIT(0)
63 #define ADUX1020_PROX_OFF1_INT BIT(1)
64 #define ADUX1020_FIFO_INT_ENABLE 0x7f
65 #define ADUX1020_MODE_INT_DISABLE 0xff
66 #define ADUX1020_MODE_INT_STATUS_MASK GENMASK(7, 0)
67 #define ADUX1020_FIFO_STATUS_MASK GENMASK(15, 8)
68 #define ADUX1020_INT_CLEAR 0xff
69 #define ADUX1020_PROX_TYPE BIT(15)
71 #define ADUX1020_INT_PROX_ON1 BIT(0)
72 #define ADUX1020_INT_PROX_OFF1 BIT(1)
74 #define ADUX1020_FORCE_CLOCK_ON 0x0f4f
75 #define ADUX1020_FORCE_CLOCK_RESET 0x0040
76 #define ADUX1020_ACTIVE_4_STATE 0x0008
78 #define ADUX1020_PROX_FREQ_MASK GENMASK(7, 4)
79 #define ADUX1020_PROX_FREQ(x) FIELD_PREP(ADUX1020_PROX_FREQ_MASK, x)
81 #define ADUX1020_LED_CURRENT_MASK GENMASK(3, 0)
82 #define ADUX1020_LED_PIREF_EN BIT(12)
85 enum adux1020_op_modes {
86 ADUX1020_MODE_STANDBY,
88 ADUX1020_MODE_PROX_XY,
91 ADUX1020_MODE_FORCE = 0x0e,
92 ADUX1020_MODE_IDLE = 0x0f,
95 struct adux1020_data {
96 struct i2c_client *client;
97 struct iio_dev *indio_dev;
99 struct regmap *regmap;
102 struct adux1020_mode_data {
108 static const struct adux1020_mode_data adux1020_modes[] = {
109 [ADUX1020_MODE_PROX_I] = {
112 .int_en = ADUX1020_PROX_INT_ENABLE,
116 static const struct regmap_config adux1020_regmap_config = {
117 .name = ADUX1020_REGMAP_NAME,
120 .max_register = 0x6F,
121 .cache_type = REGCACHE_NONE,
124 static const struct reg_sequence adux1020_def_conf[] = {
181 static const int adux1020_rates[][2] = {
198 static const int adux1020_led_currents[][2] = {
217 static int adux1020_flush_fifo(struct adux1020_data *data)
221 /* Force Idle mode */
222 ret = regmap_write(data->regmap, ADUX1020_REG_FORCE_MODE,
223 ADUX1020_ACTIVE_4_STATE);
227 ret = regmap_update_bits(data->regmap, ADUX1020_REG_OP_MODE,
228 ADUX1020_OP_MODE_MASK, ADUX1020_MODE_FORCE);
232 ret = regmap_update_bits(data->regmap, ADUX1020_REG_OP_MODE,
233 ADUX1020_OP_MODE_MASK, ADUX1020_MODE_IDLE);
238 ret = regmap_write(data->regmap, ADUX1020_REG_TEST_MODES_3,
239 ADUX1020_FORCE_CLOCK_ON);
243 ret = regmap_write(data->regmap, ADUX1020_REG_INT_STATUS,
244 ADUX1020_FIFO_FLUSH);
248 return regmap_write(data->regmap, ADUX1020_REG_TEST_MODES_3,
249 ADUX1020_FORCE_CLOCK_RESET);
252 static int adux1020_read_fifo(struct adux1020_data *data, u16 *buf, u8 buf_len)
257 /* Enable 32MHz clock */
258 ret = regmap_write(data->regmap, ADUX1020_REG_TEST_MODES_3,
259 ADUX1020_FORCE_CLOCK_ON);
263 for (i = 0; i < buf_len; i++) {
264 ret = regmap_read(data->regmap, ADUX1020_REG_DATA_BUFFER,
272 /* Set 32MHz clock to be controlled by internal state machine */
273 return regmap_write(data->regmap, ADUX1020_REG_TEST_MODES_3,
274 ADUX1020_FORCE_CLOCK_RESET);
277 static int adux1020_set_mode(struct adux1020_data *data,
278 enum adux1020_op_modes mode)
282 /* Switch to standby mode before changing the mode */
283 ret = regmap_write(data->regmap, ADUX1020_REG_OP_MODE,
284 ADUX1020_MODE_STANDBY);
288 /* Set data out and switch to the desired mode */
290 case ADUX1020_MODE_PROX_I:
291 ret = regmap_update_bits(data->regmap, ADUX1020_REG_OP_MODE,
292 ADUX1020_DATA_OUT_MODE_MASK,
293 ADUX1020_DATA_OUT_PROX_I);
297 ret = regmap_update_bits(data->regmap, ADUX1020_REG_OP_MODE,
298 ADUX1020_OP_MODE_MASK,
299 ADUX1020_MODE_PROX_I);
310 static int adux1020_measure(struct adux1020_data *data,
311 enum adux1020_op_modes mode,
317 /* Disable INT pin as polling is going to be used */
318 ret = regmap_write(data->regmap, ADUX1020_REG_INT_ENABLE,
319 ADUX1020_INT_DISABLE);
323 /* Enable mode interrupt */
324 ret = regmap_update_bits(data->regmap, ADUX1020_REG_INT_MASK,
325 ADUX1020_MODE_INT_MASK,
326 adux1020_modes[mode].int_en);
331 ret = regmap_read(data->regmap, ADUX1020_REG_INT_STATUS,
336 status &= ADUX1020_FIFO_STATUS_MASK;
337 if (status >= adux1020_modes[mode].bytes)
345 ret = adux1020_read_fifo(data, val, adux1020_modes[mode].buf_len);
349 /* Clear mode interrupt */
350 ret = regmap_write(data->regmap, ADUX1020_REG_INT_STATUS,
351 (~adux1020_modes[mode].int_en));
355 /* Disable mode interrupts */
356 return regmap_update_bits(data->regmap, ADUX1020_REG_INT_MASK,
357 ADUX1020_MODE_INT_MASK,
358 ADUX1020_MODE_INT_DISABLE);
361 static int adux1020_read_raw(struct iio_dev *indio_dev,
362 struct iio_chan_spec const *chan,
363 int *val, int *val2, long mask)
365 struct adux1020_data *data = iio_priv(indio_dev);
370 mutex_lock(&data->lock);
373 case IIO_CHAN_INFO_RAW:
374 switch (chan->type) {
376 ret = adux1020_set_mode(data, ADUX1020_MODE_PROX_I);
380 ret = adux1020_measure(data, ADUX1020_MODE_PROX_I, buf);
391 case IIO_CHAN_INFO_PROCESSED:
392 switch (chan->type) {
394 ret = regmap_read(data->regmap,
395 ADUX1020_REG_LED_CURRENT, ®val);
399 regval = regval & ADUX1020_LED_CURRENT_MASK;
401 *val = adux1020_led_currents[regval][0];
402 *val2 = adux1020_led_currents[regval][1];
404 ret = IIO_VAL_INT_PLUS_MICRO;
410 case IIO_CHAN_INFO_SAMP_FREQ:
411 switch (chan->type) {
413 ret = regmap_read(data->regmap, ADUX1020_REG_FREQUENCY,
418 regval = FIELD_GET(ADUX1020_PROX_FREQ_MASK, regval);
420 *val = adux1020_rates[regval][0];
421 *val2 = adux1020_rates[regval][1];
423 ret = IIO_VAL_INT_PLUS_MICRO;
434 mutex_unlock(&data->lock);
439 static inline int adux1020_find_index(const int array[][2], int count, int val,
444 for (i = 0; i < count; i++)
445 if (val == array[i][0] && val2 == array[i][1])
451 static int adux1020_write_raw(struct iio_dev *indio_dev,
452 struct iio_chan_spec const *chan,
453 int val, int val2, long mask)
455 struct adux1020_data *data = iio_priv(indio_dev);
456 int i, ret = -EINVAL;
458 mutex_lock(&data->lock);
461 case IIO_CHAN_INFO_SAMP_FREQ:
462 if (chan->type == IIO_PROXIMITY) {
463 i = adux1020_find_index(adux1020_rates,
464 ARRAY_SIZE(adux1020_rates),
471 ret = regmap_update_bits(data->regmap,
472 ADUX1020_REG_FREQUENCY,
473 ADUX1020_PROX_FREQ_MASK,
474 ADUX1020_PROX_FREQ(i));
477 case IIO_CHAN_INFO_PROCESSED:
478 if (chan->type == IIO_CURRENT) {
479 i = adux1020_find_index(adux1020_led_currents,
480 ARRAY_SIZE(adux1020_led_currents),
487 ret = regmap_update_bits(data->regmap,
488 ADUX1020_REG_LED_CURRENT,
489 ADUX1020_LED_CURRENT_MASK, i);
497 mutex_unlock(&data->lock);
502 static int adux1020_write_event_config(struct iio_dev *indio_dev,
503 const struct iio_chan_spec *chan,
504 enum iio_event_type type,
505 enum iio_event_direction dir, int state)
507 struct adux1020_data *data = iio_priv(indio_dev);
510 mutex_lock(&data->lock);
512 ret = regmap_write(data->regmap, ADUX1020_REG_INT_ENABLE,
513 ADUX1020_INT_ENABLE);
517 ret = regmap_write(data->regmap, ADUX1020_REG_INT_POLARITY, 0);
521 switch (chan->type) {
523 if (dir == IIO_EV_DIR_RISING)
524 mask = ADUX1020_PROX_ON1_INT;
526 mask = ADUX1020_PROX_OFF1_INT;
533 ret = regmap_update_bits(data->regmap, ADUX1020_REG_INT_MASK,
539 * Trigger proximity interrupt when the intensity is above
542 ret = regmap_update_bits(data->regmap, ADUX1020_REG_PROX_TYPE,
548 /* Set proximity mode */
549 ret = adux1020_set_mode(data, ADUX1020_MODE_PROX_I);
557 mutex_unlock(&data->lock);
562 static int adux1020_read_event_config(struct iio_dev *indio_dev,
563 const struct iio_chan_spec *chan,
564 enum iio_event_type type,
565 enum iio_event_direction dir)
567 struct adux1020_data *data = iio_priv(indio_dev);
571 switch (chan->type) {
573 if (dir == IIO_EV_DIR_RISING)
574 mask = ADUX1020_PROX_ON1_INT;
576 mask = ADUX1020_PROX_OFF1_INT;
582 ret = regmap_read(data->regmap, ADUX1020_REG_INT_MASK, ®val);
586 return !(regval & mask);
589 static int adux1020_read_thresh(struct iio_dev *indio_dev,
590 const struct iio_chan_spec *chan,
591 enum iio_event_type type,
592 enum iio_event_direction dir,
593 enum iio_event_info info, int *val, int *val2)
595 struct adux1020_data *data = iio_priv(indio_dev);
600 switch (chan->type) {
602 if (dir == IIO_EV_DIR_RISING)
603 reg = ADUX1020_REG_PROX_TH_ON1;
605 reg = ADUX1020_REG_PROX_TH_OFF1;
611 ret = regmap_read(data->regmap, reg, ®val);
620 static int adux1020_write_thresh(struct iio_dev *indio_dev,
621 const struct iio_chan_spec *chan,
622 enum iio_event_type type,
623 enum iio_event_direction dir,
624 enum iio_event_info info, int val, int val2)
626 struct adux1020_data *data = iio_priv(indio_dev);
629 switch (chan->type) {
631 if (dir == IIO_EV_DIR_RISING)
632 reg = ADUX1020_REG_PROX_TH_ON1;
634 reg = ADUX1020_REG_PROX_TH_OFF1;
640 /* Full scale threshold value is 0-65535 */
641 if (val < 0 || val > 65535)
644 return regmap_write(data->regmap, reg, val);
647 static const struct iio_event_spec adux1020_proximity_event[] = {
649 .type = IIO_EV_TYPE_THRESH,
650 .dir = IIO_EV_DIR_RISING,
651 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
652 BIT(IIO_EV_INFO_ENABLE),
655 .type = IIO_EV_TYPE_THRESH,
656 .dir = IIO_EV_DIR_FALLING,
657 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
658 BIT(IIO_EV_INFO_ENABLE),
662 static const struct iio_chan_spec adux1020_channels[] = {
664 .type = IIO_PROXIMITY,
665 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
666 BIT(IIO_CHAN_INFO_SAMP_FREQ),
667 .event_spec = adux1020_proximity_event,
668 .num_event_specs = ARRAY_SIZE(adux1020_proximity_event),
672 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
673 .extend_name = "led",
678 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
679 "0.1 0.2 0.5 1 2 5 10 20 50 100 190 450 820 1400");
681 static struct attribute *adux1020_attributes[] = {
682 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
686 static const struct attribute_group adux1020_attribute_group = {
687 .attrs = adux1020_attributes,
690 static const struct iio_info adux1020_info = {
691 .attrs = &adux1020_attribute_group,
692 .read_raw = adux1020_read_raw,
693 .write_raw = adux1020_write_raw,
694 .read_event_config = adux1020_read_event_config,
695 .write_event_config = adux1020_write_event_config,
696 .read_event_value = adux1020_read_thresh,
697 .write_event_value = adux1020_write_thresh,
700 static irqreturn_t adux1020_interrupt_handler(int irq, void *private)
702 struct iio_dev *indio_dev = private;
703 struct adux1020_data *data = iio_priv(indio_dev);
706 ret = regmap_read(data->regmap, ADUX1020_REG_INT_STATUS, &status);
710 status &= ADUX1020_MODE_INT_STATUS_MASK;
712 if (status & ADUX1020_INT_PROX_ON1) {
713 iio_push_event(indio_dev,
714 IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0,
717 iio_get_time_ns(indio_dev));
720 if (status & ADUX1020_INT_PROX_OFF1) {
721 iio_push_event(indio_dev,
722 IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0,
725 iio_get_time_ns(indio_dev));
728 regmap_update_bits(data->regmap, ADUX1020_REG_INT_STATUS,
729 ADUX1020_MODE_INT_MASK, ADUX1020_INT_CLEAR);
734 static int adux1020_chip_init(struct adux1020_data *data)
736 struct i2c_client *client = data->client;
740 ret = regmap_read(data->regmap, ADUX1020_REG_CHIP_ID, &val);
744 if ((val & ADUX1020_CHIP_ID_MASK) != ADUX1020_CHIP_ID) {
745 dev_err(&client->dev, "invalid chip id 0x%04x\n", val);
749 dev_dbg(&client->dev, "Detected ADUX1020 with chip id: 0x%04x\n", val);
751 ret = regmap_update_bits(data->regmap, ADUX1020_REG_SW_RESET,
752 ADUX1020_SW_RESET, ADUX1020_SW_RESET);
756 /* Load default configuration */
757 ret = regmap_multi_reg_write(data->regmap, adux1020_def_conf,
758 ARRAY_SIZE(adux1020_def_conf));
762 ret = adux1020_flush_fifo(data);
766 /* Use LED_IREF for proximity mode */
767 ret = regmap_update_bits(data->regmap, ADUX1020_REG_LED_CURRENT,
768 ADUX1020_LED_PIREF_EN, 0);
772 /* Mask all interrupts */
773 return regmap_update_bits(data->regmap, ADUX1020_REG_INT_MASK,
774 ADUX1020_MODE_INT_MASK, ADUX1020_MODE_INT_DISABLE);
777 static int adux1020_probe(struct i2c_client *client)
779 struct adux1020_data *data;
780 struct iio_dev *indio_dev;
783 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
787 indio_dev->info = &adux1020_info;
788 indio_dev->name = ADUX1020_DRV_NAME;
789 indio_dev->channels = adux1020_channels;
790 indio_dev->num_channels = ARRAY_SIZE(adux1020_channels);
791 indio_dev->modes = INDIO_DIRECT_MODE;
793 data = iio_priv(indio_dev);
795 data->regmap = devm_regmap_init_i2c(client, &adux1020_regmap_config);
796 if (IS_ERR(data->regmap)) {
797 dev_err(&client->dev, "regmap initialization failed.\n");
798 return PTR_ERR(data->regmap);
801 data->client = client;
802 data->indio_dev = indio_dev;
803 mutex_init(&data->lock);
805 ret = adux1020_chip_init(data);
810 ret = devm_request_threaded_irq(&client->dev, client->irq,
811 NULL, adux1020_interrupt_handler,
812 IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
813 ADUX1020_DRV_NAME, indio_dev);
815 dev_err(&client->dev, "irq request error %d\n", -ret);
820 return devm_iio_device_register(&client->dev, indio_dev);
823 static const struct i2c_device_id adux1020_id[] = {
827 MODULE_DEVICE_TABLE(i2c, adux1020_id);
829 static const struct of_device_id adux1020_of_match[] = {
830 { .compatible = "adi,adux1020" },
833 MODULE_DEVICE_TABLE(of, adux1020_of_match);
835 static struct i2c_driver adux1020_driver = {
837 .name = ADUX1020_DRV_NAME,
838 .of_match_table = adux1020_of_match,
840 .probe_new = adux1020_probe,
841 .id_table = adux1020_id,
843 module_i2c_driver(adux1020_driver);
846 MODULE_DESCRIPTION("ADUX1020 photometric sensor");
847 MODULE_LICENSE("GPL");