drivers/gpu/drm/i915/intel_pch.c

   1 // SPDX-License-Identifier: MIT
   2 /*
   3  * Copyright 2019 Intel Corporation.
   4  */
   5
   6 #include "i915_drv.h"
   7 #include "intel_pch.h"
   8
   9 /* Map PCH device id to PCH type, or PCH_NONE if unknown. */
  10 static enum intel_pch
  11 intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id)
  12 {
  13         switch (id) {
  14         case INTEL_PCH_IBX_DEVICE_ID_TYPE:
  15                 drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n");
  16                 drm_WARN_ON(&dev_priv->drm, GRAPHICS_VER(dev_priv) != 5);
  17                 return PCH_IBX;
  18         case INTEL_PCH_CPT_DEVICE_ID_TYPE:
  19                 drm_dbg_kms(&dev_priv->drm, "Found CougarPoint PCH\n");
  20                 drm_WARN_ON(&dev_priv->drm,
  21                             GRAPHICS_VER(dev_priv) != 6 && !IS_IVYBRIDGE(dev_priv));
  22                 return PCH_CPT;
  23         case INTEL_PCH_PPT_DEVICE_ID_TYPE:
  24                 drm_dbg_kms(&dev_priv->drm, "Found PantherPoint PCH\n");
  25                 drm_WARN_ON(&dev_priv->drm,
  26                             GRAPHICS_VER(dev_priv) != 6 && !IS_IVYBRIDGE(dev_priv));
  27                 /* PantherPoint is CPT compatible */
  28                 return PCH_CPT;
  29         case INTEL_PCH_LPT_DEVICE_ID_TYPE:
  30                 drm_dbg_kms(&dev_priv->drm, "Found LynxPoint PCH\n");
  31                 drm_WARN_ON(&dev_priv->drm,
  32                             !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
  33                 drm_WARN_ON(&dev_priv->drm,
  34                             IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
  35                 return PCH_LPT;
  36         case INTEL_PCH_LPT_LP_DEVICE_ID_TYPE:
  37                 drm_dbg_kms(&dev_priv->drm, "Found LynxPoint LP PCH\n");
  38                 drm_WARN_ON(&dev_priv->drm,
  39                             !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
  40                 drm_WARN_ON(&dev_priv->drm,
  41                             !IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
  42                 return PCH_LPT;
  43         case INTEL_PCH_WPT_DEVICE_ID_TYPE:
  44                 drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint PCH\n");
  45                 drm_WARN_ON(&dev_priv->drm,
  46                             !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
  47                 drm_WARN_ON(&dev_priv->drm,
  48                             IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
  49                 /* WildcatPoint is LPT compatible */
  50                 return PCH_LPT;
  51         case INTEL_PCH_WPT_LP_DEVICE_ID_TYPE:
  52                 drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint LP PCH\n");
  53                 drm_WARN_ON(&dev_priv->drm,
  54                             !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
  55                 drm_WARN_ON(&dev_priv->drm,
  56                             !IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
  57                 /* WildcatPoint is LPT compatible */
  58                 return PCH_LPT;
  59         case INTEL_PCH_SPT_DEVICE_ID_TYPE:
  60                 drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint PCH\n");
  61                 drm_WARN_ON(&dev_priv->drm,
  62                             !IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv));
  63                 return PCH_SPT;
  64         case INTEL_PCH_SPT_LP_DEVICE_ID_TYPE:
  65                 drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint LP PCH\n");
  66                 drm_WARN_ON(&dev_priv->drm,
  67                             !IS_SKYLAKE(dev_priv) &&
  68                             !IS_KABYLAKE(dev_priv) &&
  69                             !IS_COFFEELAKE(dev_priv) &&
  70                             !IS_COMETLAKE(dev_priv));
  71                 return PCH_SPT;
  72         case INTEL_PCH_KBP_DEVICE_ID_TYPE:
  73                 drm_dbg_kms(&dev_priv->drm, "Found Kaby Lake PCH (KBP)\n");
  74                 drm_WARN_ON(&dev_priv->drm,
  75                             !IS_SKYLAKE(dev_priv) &&
  76                             !IS_KABYLAKE(dev_priv) &&
  77                             !IS_COFFEELAKE(dev_priv) &&
  78                             !IS_COMETLAKE(dev_priv));
  79                 /* KBP is SPT compatible */
  80                 return PCH_SPT;
  81         case INTEL_PCH_CNP_DEVICE_ID_TYPE:
  82                 drm_dbg_kms(&dev_priv->drm, "Found Cannon Lake PCH (CNP)\n");
  83                 drm_WARN_ON(&dev_priv->drm,
  84                             !IS_COFFEELAKE(dev_priv) &&
  85                             !IS_COMETLAKE(dev_priv));
  86                 return PCH_CNP;
  87         case INTEL_PCH_CNP_LP_DEVICE_ID_TYPE:
  88                 drm_dbg_kms(&dev_priv->drm,
  89                             "Found Cannon Lake LP PCH (CNP-LP)\n");
  90                 drm_WARN_ON(&dev_priv->drm,
  91                             !IS_COFFEELAKE(dev_priv) &&
  92                             !IS_COMETLAKE(dev_priv));
  93                 return PCH_CNP;
  94         case INTEL_PCH_CMP_DEVICE_ID_TYPE:
  95         case INTEL_PCH_CMP2_DEVICE_ID_TYPE:
  96                 drm_dbg_kms(&dev_priv->drm, "Found Comet Lake PCH (CMP)\n");
  97                 drm_WARN_ON(&dev_priv->drm,
  98                             !IS_COFFEELAKE(dev_priv) &&
  99                             !IS_COMETLAKE(dev_priv) &&
 100                             !IS_ROCKETLAKE(dev_priv));
 101                 /* CometPoint is CNP Compatible */
 102                 return PCH_CNP;
 103         case INTEL_PCH_CMP_V_DEVICE_ID_TYPE:
 104                 drm_dbg_kms(&dev_priv->drm, "Found Comet Lake V PCH (CMP-V)\n");
 105                 drm_WARN_ON(&dev_priv->drm,
 106                             !IS_COFFEELAKE(dev_priv) &&
 107                             !IS_COMETLAKE(dev_priv));
 108                 /* Comet Lake V PCH is based on KBP, which is SPT compatible */
 109                 return PCH_SPT;
 110         case INTEL_PCH_ICP_DEVICE_ID_TYPE:
 111                 drm_dbg_kms(&dev_priv->drm, "Found Ice Lake PCH\n");
 112                 drm_WARN_ON(&dev_priv->drm, !IS_ICELAKE(dev_priv));
 113                 return PCH_ICP;
 114         case INTEL_PCH_MCC_DEVICE_ID_TYPE:
 115                 drm_dbg_kms(&dev_priv->drm, "Found Mule Creek Canyon PCH\n");
 116                 drm_WARN_ON(&dev_priv->drm, !IS_JSL_EHL(dev_priv));
 117                 return PCH_MCC;
 118         case INTEL_PCH_TGP_DEVICE_ID_TYPE:
 119         case INTEL_PCH_TGP2_DEVICE_ID_TYPE:
 120                 drm_dbg_kms(&dev_priv->drm, "Found Tiger Lake LP PCH\n");
 121                 drm_WARN_ON(&dev_priv->drm, !IS_TIGERLAKE(dev_priv) &&
 122                             !IS_ROCKETLAKE(dev_priv) &&
 123                             !IS_GEN9_BC(dev_priv));
 124                 return PCH_TGP;
 125         case INTEL_PCH_JSP_DEVICE_ID_TYPE:
 126         case INTEL_PCH_JSP2_DEVICE_ID_TYPE:
 127                 drm_dbg_kms(&dev_priv->drm, "Found Jasper Lake PCH\n");
 128                 drm_WARN_ON(&dev_priv->drm, !IS_JSL_EHL(dev_priv));
 129                 return PCH_JSP;
 130         case INTEL_PCH_ADP_DEVICE_ID_TYPE:
 131         case INTEL_PCH_ADP2_DEVICE_ID_TYPE:
 132         case INTEL_PCH_ADP3_DEVICE_ID_TYPE:
 133                 drm_dbg_kms(&dev_priv->drm, "Found Alder Lake PCH\n");
 134                 drm_WARN_ON(&dev_priv->drm, !IS_ALDERLAKE_S(dev_priv) &&
 135                             !IS_ALDERLAKE_P(dev_priv));
 136                 return PCH_ADP;
 137         default:
 138                 return PCH_NONE;
 139         }
 140 }
 141
 142 static bool intel_is_virt_pch(unsigned short id,
 143                               unsigned short svendor, unsigned short sdevice)
 144 {
 145         return (id == INTEL_PCH_P2X_DEVICE_ID_TYPE ||
 146                 id == INTEL_PCH_P3X_DEVICE_ID_TYPE ||
 147                 (id == INTEL_PCH_QEMU_DEVICE_ID_TYPE &&
 148                  svendor == PCI_SUBVENDOR_ID_REDHAT_QUMRANET &&
 149                  sdevice == PCI_SUBDEVICE_ID_QEMU));
 150 }
 151
 152 static void
 153 intel_virt_detect_pch(const struct drm_i915_private *dev_priv,
 154                       unsigned short *pch_id, enum intel_pch *pch_type)
 155 {
 156         unsigned short id = 0;
 157
 158         /*
 159          * In a virtualized passthrough environment we can be in a
 160          * setup where the ISA bridge is not able to be passed through.
 161          * In this case, a south bridge can be emulated and we have to
 162          * make an educated guess as to which PCH is really there.
 163          */
 164
 165         if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv))
 166                 id = INTEL_PCH_ADP_DEVICE_ID_TYPE;
 167         else if (IS_TIGERLAKE(dev_priv) || IS_ROCKETLAKE(dev_priv))
 168                 id = INTEL_PCH_TGP_DEVICE_ID_TYPE;
 169         else if (IS_JSL_EHL(dev_priv))
 170                 id = INTEL_PCH_MCC_DEVICE_ID_TYPE;
 171         else if (IS_ICELAKE(dev_priv))
 172                 id = INTEL_PCH_ICP_DEVICE_ID_TYPE;
 173         else if (IS_COFFEELAKE(dev_priv) ||
 174                  IS_COMETLAKE(dev_priv))
 175                 id = INTEL_PCH_CNP_DEVICE_ID_TYPE;
 176         else if (IS_KABYLAKE(dev_priv) || IS_SKYLAKE(dev_priv))
 177                 id = INTEL_PCH_SPT_DEVICE_ID_TYPE;
 178         else if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
 179                 id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
 180         else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
 181                 id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
 182         else if (GRAPHICS_VER(dev_priv) == 6 || IS_IVYBRIDGE(dev_priv))
 183                 id = INTEL_PCH_CPT_DEVICE_ID_TYPE;
 184         else if (GRAPHICS_VER(dev_priv) == 5)
 185                 id = INTEL_PCH_IBX_DEVICE_ID_TYPE;
 186
 187         if (id)
 188                 drm_dbg_kms(&dev_priv->drm, "Assuming PCH ID %04x\n", id);
 189         else
 190                 drm_dbg_kms(&dev_priv->drm, "Assuming no PCH\n");
 191
 192         *pch_type = intel_pch_type(dev_priv, id);
 193
 194         /* Sanity check virtual PCH id */
 195         if (drm_WARN_ON(&dev_priv->drm,
 196                         id && *pch_type == PCH_NONE))
 197                 id = 0;
 198
 199         *pch_id = id;
 200 }
 201
 202 void intel_detect_pch(struct drm_i915_private *dev_priv)
 203 {
 204         struct pci_dev *pch = NULL;
 205         unsigned short id;
 206         enum intel_pch pch_type;
 207
 208         /* DG1 has south engine display on the same PCI device */
 209         if (IS_DG1(dev_priv)) {
 210                 dev_priv->pch_type = PCH_DG1;
 211                 return;
 212         } else if (IS_DG2(dev_priv)) {
 213                 dev_priv->pch_type = PCH_DG2;
 214                 return;
 215         }
 216
 217         /*
 218          * The reason to probe ISA bridge instead of Dev31:Fun0 is to
 219          * make graphics device passthrough work easy for VMM, that only
 220          * need to expose ISA bridge to let driver know the real hardware
 221          * underneath. This is a requirement from virtualization team.
 222          *
 223          * In some virtualized environments (e.g. XEN), there is irrelevant
 224          * ISA bridge in the system. To work reliably, we should scan trhough
 225          * all the ISA bridge devices and check for the first match, instead
 226          * of only checking the first one.
 227          */
 228         while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) {
 229                 if (pch->vendor != PCI_VENDOR_ID_INTEL)
 230                         continue;
 231
 232                 id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
 233
 234                 pch_type = intel_pch_type(dev_priv, id);
 235                 if (pch_type != PCH_NONE) {
 236                         dev_priv->pch_type = pch_type;
 237                         dev_priv->pch_id = id;
 238                         break;
 239                 } else if (intel_is_virt_pch(id, pch->subsystem_vendor,
 240                                              pch->subsystem_device)) {
 241                         intel_virt_detect_pch(dev_priv, &id, &pch_type);
 242                         dev_priv->pch_type = pch_type;
 243                         dev_priv->pch_id = id;
 244                         break;
 245                 }
 246         }
 247
 248         /*
 249          * Use PCH_NOP (PCH but no South Display) for PCH platforms without
 250          * display.
 251          */
 252         if (pch && !HAS_DISPLAY(dev_priv)) {
 253                 drm_dbg_kms(&dev_priv->drm,
 254                             "Display disabled, reverting to NOP PCH\n");
 255                 dev_priv->pch_type = PCH_NOP;
 256                 dev_priv->pch_id = 0;
 257         } else if (!pch) {
 258                 if (run_as_guest() && HAS_DISPLAY(dev_priv)) {
 259                         intel_virt_detect_pch(dev_priv, &id, &pch_type);
 260                         dev_priv->pch_type = pch_type;
 261                         dev_priv->pch_id = id;
 262                 } else {
 263                         drm_dbg_kms(&dev_priv->drm, "No PCH found.\n");
 264                 }
 265         }
 266
 267         pci_dev_put(pch);
 268 }