1 # SPDX-License-Identifier: GPL-2.0
4 select ARCH_32BIT_OFF_T
5 select ARCH_HAS_CPU_CACHE_ALIASING
6 select ARCH_ENABLE_MEMORY_HOTPLUG if SPARSEMEM && MMU
7 select ARCH_ENABLE_MEMORY_HOTREMOVE if SPARSEMEM && MMU
8 select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)
9 select ARCH_HAS_BINFMT_FLAT if !MMU
10 select ARCH_HAS_CPU_FINALIZE_INIT
11 select ARCH_HAS_CURRENT_STACK_POINTER
12 select ARCH_HAS_GIGANTIC_PAGE
13 select ARCH_HAS_GCOV_PROFILE_ALL
14 select ARCH_HAS_PTE_SPECIAL
15 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
16 select ARCH_HIBERNATION_POSSIBLE if MMU
17 select ARCH_MIGHT_HAVE_PC_PARPORT
18 select ARCH_WANT_IPC_PARSE_VERSION
19 select CPU_NO_EFFICIENT_FFS
20 select DMA_DECLARE_COHERENT
21 select GENERIC_ATOMIC64
22 select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
23 select GENERIC_IDLE_POLL_SETUP
24 select GENERIC_IRQ_SHOW
25 select GENERIC_LIB_ASHLDI3
26 select GENERIC_LIB_ASHRDI3
27 select GENERIC_LIB_LSHRDI3
28 select GENERIC_PCI_IOMAP if PCI
29 select GENERIC_SCHED_CLOCK
30 select GENERIC_SMP_IDLE_THREAD
31 select GUP_GET_PXX_LOW_HIGH if X2TLB
32 select HAS_IOPORT if HAS_IOPORT_MAP
33 select GENERIC_IOREMAP if MMU
34 select HAVE_ARCH_AUDITSYSCALL
36 select HAVE_ARCH_SECCOMP_FILTER
37 select HAVE_ARCH_TRACEHOOK
38 select HAVE_DEBUG_BUGVERBOSE
39 select HAVE_DEBUG_KMEMLEAK
40 select HAVE_DYNAMIC_FTRACE
41 select HAVE_FAST_GUP if MMU
42 select HAVE_FUNCTION_GRAPH_TRACER
43 select HAVE_FUNCTION_TRACER
44 select HAVE_FTRACE_MCOUNT_RECORD
45 select HAVE_HW_BREAKPOINT
46 select HAVE_IOREMAP_PROT if MMU && !X2TLB
47 select HAVE_KERNEL_BZIP2
48 select HAVE_KERNEL_GZIP
49 select HAVE_KERNEL_LZMA
50 select HAVE_KERNEL_LZO
53 select HAVE_KRETPROBES
54 select HAVE_MIXED_BREAKPOINTS_REGS
55 select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
57 select HAVE_PATA_PLATFORM
58 select HAVE_PERF_EVENTS
59 select HAVE_REGS_AND_STACK_ACCESS_API
61 select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS
62 select HAVE_STACKPROTECTOR
63 select HAVE_SYSCALL_TRACEPOINTS
64 select IRQ_FORCED_THREADING
65 select LOCK_MM_AND_FIND_VMA
66 select MODULES_USE_ELF_RELA
67 select NEED_SG_DMA_LENGTH
68 select NO_DMA if !MMU && !DMA_COHERENT
69 select NO_GENERIC_PCI_IOPORT_MAP if PCI
72 select PCI_DOMAINS if PCI
74 select PERF_USE_VMALLOC
77 select TRACE_IRQFLAGS_SUPPORT
79 The SuperH is a RISC processor targeted for use in embedded systems
80 and consumer electronics; it was also used in the Sega Dreamcast
81 gaming console. The SuperH port has a home page at
82 <http://www.linux-sh.org/>.
88 config GENERIC_HWEIGHT
91 config GENERIC_CALIBRATE_DELAY
94 config GENERIC_LOCKBREAK
96 depends on SMP && PREEMPTION
98 config ARCH_SUSPEND_POSSIBLE
101 config ARCH_HIBERNATION_POSSIBLE
104 config SYS_SUPPORTS_APM_EMULATION
106 select ARCH_SUSPEND_POSSIBLE
108 config SYS_SUPPORTS_SMP
111 config SYS_SUPPORTS_NUMA
114 config STACKTRACE_SUPPORT
117 config LOCKDEP_SUPPORT
120 config ARCH_HAS_ILOG2_U32
123 config ARCH_HAS_ILOG2_U64
128 depends on !SH_SHMIN && !SH_HP6XX && !SH_SOLUTION_ENGINE
139 config DMA_NONCOHERENT
140 def_bool !NO_DMA && !DMA_COHERENT
141 select ARCH_HAS_DMA_PREP_COHERENT
142 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
143 select DMA_DIRECT_REMAP
145 config PGTABLE_LEVELS
161 select UNCACHED_MAPPING
167 select OF_EARLY_FLATTREE
171 select CPU_HAS_INTEVT
174 select SYS_SUPPORTS_SH_TMU
178 select ARCH_SUPPORTS_HUGETLBFS if MMU
179 select CPU_HAS_INTEVT
181 select CPU_HAS_FPU if !CPU_SH4AL_DSP
183 select SYS_SUPPORTS_SH_TMU
200 select SYS_SUPPORTS_SMP
201 select SYS_SUPPORTS_NUMA
205 select ARCH_SUSPEND_POSSIBLE
209 depends on CPU_SH4 || CPU_SH4A
214 prompt "Processor sub-type selection"
220 # SH-2 Processor Support
222 config CPU_SUBTYPE_SH7619
223 bool "Support SH7619 processor"
225 select SYS_SUPPORTS_SH_CMT
227 config CPU_SUBTYPE_J2
228 bool "Support J2 processor"
230 select SYS_SUPPORTS_SMP
231 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
233 # SH-2A Processor Support
235 config CPU_SUBTYPE_SH7201
236 bool "Support SH7201 processor"
239 select SYS_SUPPORTS_SH_MTU2
241 config CPU_SUBTYPE_SH7203
242 bool "Support SH7203 processor"
245 select SYS_SUPPORTS_SH_CMT
246 select SYS_SUPPORTS_SH_MTU2
249 config CPU_SUBTYPE_SH7206
250 bool "Support SH7206 processor"
252 select SYS_SUPPORTS_SH_CMT
253 select SYS_SUPPORTS_SH_MTU2
255 config CPU_SUBTYPE_SH7263
256 bool "Support SH7263 processor"
259 select SYS_SUPPORTS_SH_CMT
260 select SYS_SUPPORTS_SH_MTU2
262 config CPU_SUBTYPE_SH7264
263 bool "Support SH7264 processor"
266 select SYS_SUPPORTS_SH_CMT
267 select SYS_SUPPORTS_SH_MTU2
270 config CPU_SUBTYPE_SH7269
271 bool "Support SH7269 processor"
274 select SYS_SUPPORTS_SH_CMT
275 select SYS_SUPPORTS_SH_MTU2
278 config CPU_SUBTYPE_MXG
279 bool "Support MX-G processor"
281 select SYS_SUPPORTS_SH_MTU2
283 Select MX-G if running on an R8A03022BG part.
285 # SH-3 Processor Support
287 config CPU_SUBTYPE_SH7705
288 bool "Support SH7705 processor"
291 config CPU_SUBTYPE_SH7706
292 bool "Support SH7706 processor"
295 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
297 config CPU_SUBTYPE_SH7707
298 bool "Support SH7707 processor"
301 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
303 config CPU_SUBTYPE_SH7708
304 bool "Support SH7708 processor"
307 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
308 if you have a 100 Mhz SH-3 HD6417708R CPU.
310 config CPU_SUBTYPE_SH7709
311 bool "Support SH7709 processor"
314 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
316 config CPU_SUBTYPE_SH7710
317 bool "Support SH7710 processor"
321 Select SH7710 if you have a SH3-DSP SH7710 CPU.
323 config CPU_SUBTYPE_SH7712
324 bool "Support SH7712 processor"
328 Select SH7712 if you have a SH3-DSP SH7712 CPU.
330 config CPU_SUBTYPE_SH7720
331 bool "Support SH7720 processor"
334 select SYS_SUPPORTS_SH_CMT
335 select USB_OHCI_SH if USB_OHCI_HCD
338 Select SH7720 if you have a SH3-DSP SH7720 CPU.
340 config CPU_SUBTYPE_SH7721
341 bool "Support SH7721 processor"
344 select SYS_SUPPORTS_SH_CMT
345 select USB_OHCI_SH if USB_OHCI_HCD
347 Select SH7721 if you have a SH3-DSP SH7721 CPU.
349 # SH-4 Processor Support
351 config CPU_SUBTYPE_SH7750
352 bool "Support SH7750 processor"
355 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
357 config CPU_SUBTYPE_SH7091
358 bool "Support SH7091 processor"
361 Select SH7091 if you have an SH-4 based Sega device (such as
362 the Dreamcast, Naomi, and Naomi 2).
364 config CPU_SUBTYPE_SH7750R
365 bool "Support SH7750R processor"
368 config CPU_SUBTYPE_SH7750S
369 bool "Support SH7750S processor"
372 config CPU_SUBTYPE_SH7751
373 bool "Support SH7751 processor"
376 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
377 or if you have a HD6417751R CPU.
379 config CPU_SUBTYPE_SH7751R
380 bool "Support SH7751R processor"
383 config CPU_SUBTYPE_SH7760
384 bool "Support SH7760 processor"
387 # SH-4A Processor Support
389 config CPU_SUBTYPE_SH7723
390 bool "Support SH7723 processor"
394 select ARCH_SPARSEMEM_ENABLE
395 select SYS_SUPPORTS_SH_CMT
398 Select SH7723 if you have an SH-MobileR2 CPU.
400 config CPU_SUBTYPE_SH7724
401 bool "Support SH7724 processor"
405 select ARCH_SPARSEMEM_ENABLE
406 select SYS_SUPPORTS_SH_CMT
409 Select SH7724 if you have an SH-MobileR2R CPU.
411 config CPU_SUBTYPE_SH7734
412 bool "Support SH7734 processor"
417 Select SH7734 if you have a SH4A SH7734 CPU.
419 config CPU_SUBTYPE_SH7757
420 bool "Support SH7757 processor"
425 Select SH7757 if you have a SH4A SH7757 CPU.
427 config CPU_SUBTYPE_SH7763
428 bool "Support SH7763 processor"
430 select USB_OHCI_SH if USB_OHCI_HCD
432 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
434 config CPU_SUBTYPE_SH7770
435 bool "Support SH7770 processor"
438 config CPU_SUBTYPE_SH7780
439 bool "Support SH7780 processor"
442 config CPU_SUBTYPE_SH7785
443 bool "Support SH7785 processor"
446 select ARCH_SPARSEMEM_ENABLE
447 select SYS_SUPPORTS_NUMA
450 config CPU_SUBTYPE_SH7786
451 bool "Support SH7786 processor"
454 select CPU_HAS_PTEAEX
455 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
456 select USB_OHCI_SH if USB_OHCI_HCD
457 select USB_EHCI_SH if USB_EHCI_HCD
460 config CPU_SUBTYPE_SHX3
461 bool "Support SH-X3 processor"
464 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
468 # SH4AL-DSP Processor Support
470 config CPU_SUBTYPE_SH7343
471 bool "Support SH7343 processor"
474 select SYS_SUPPORTS_SH_CMT
476 config CPU_SUBTYPE_SH7722
477 bool "Support SH7722 processor"
481 select ARCH_SPARSEMEM_ENABLE
482 select SYS_SUPPORTS_NUMA
483 select SYS_SUPPORTS_SH_CMT
486 config CPU_SUBTYPE_SH7366
487 bool "Support SH7366 processor"
491 select ARCH_SPARSEMEM_ENABLE
492 select SYS_SUPPORTS_NUMA
493 select SYS_SUPPORTS_SH_CMT
497 source "arch/sh/mm/Kconfig"
499 source "arch/sh/Kconfig.cpu"
501 source "arch/sh/boards/Kconfig"
503 menu "Timer and clock configuration"
506 int "Peripheral clock frequency (in Hz)"
507 depends on SH_CLK_CPG_LEGACY
508 default "31250000" if CPU_SUBTYPE_SH7619
509 default "33333333" if CPU_SUBTYPE_SH7770 || \
510 CPU_SUBTYPE_SH7760 || \
511 CPU_SUBTYPE_SH7705 || \
512 CPU_SUBTYPE_SH7203 || \
513 CPU_SUBTYPE_SH7206 || \
514 CPU_SUBTYPE_SH7263 || \
516 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
519 This option is used to specify the peripheral clock frequency.
520 This is necessary for determining the reference clock value on
521 platforms lacking an RTC.
526 config SH_CLK_CPG_LEGACY
527 depends on SH_CLK_CPG
528 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \
529 !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \
530 !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \
535 menu "CPU Frequency scaling"
536 source "drivers/cpufreq/Kconfig"
539 source "arch/sh/drivers/Kconfig"
543 menu "Kernel features"
545 source "kernel/Kconfig.hz"
547 config ARCH_SUPPORTS_KEXEC
550 config ARCH_SUPPORTS_CRASH_DUMP
551 def_bool BROKEN_ON_SMP
553 config ARCH_SUPPORTS_KEXEC_JUMP
556 config PHYSICAL_START
557 hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
560 This gives the physical address where the kernel is loaded
561 and is ordinarily the same as MEMORY_START.
563 Different values are primarily used in the case of kexec on panic
564 where the fail safe kernel needs to run at a different address
565 than the panic-ed kernel.
568 bool "Symmetric multi-processing support"
569 depends on SYS_SUPPORTS_SMP
571 This enables support for systems with more than one CPU. If you have
572 a system with only one CPU, say N. If you have a system with more
575 If you say N here, the kernel will run on uni- and multiprocessor
576 machines, but will use only one CPU of a multiprocessor machine. If
577 you say Y here, the kernel will run on many, but not all,
578 uniprocessor machines. On a uniprocessor machine, the kernel
579 will run faster if you say N here.
581 People using multiprocessor machines who say Y here should also say
582 Y to "Enhanced Real Time Clock Support", below.
584 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO
585 available at <https://www.tldp.org/docs.html#howto>.
587 If you don't know what to do here, say N.
590 int "Maximum number of CPUs (2-32)"
593 default "4" if CPU_SUBTYPE_SHX3
596 This allows you to specify the maximum number of CPUs which this
597 kernel will support. The maximum supported value is 32 and the
598 minimum value which makes sense is 2.
600 This is purely to save memory - each supported CPU adds
601 approximately eight kilobytes to the kernel image.
604 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
607 Say Y here to experiment with turning CPUs off and on. CPUs
608 can be controlled through /sys/devices/system/cpu.
614 This enables support for gUSA (general UserSpace Atomicity).
615 This is the default implementation for both UP and non-ll/sc
616 CPUs, and is used by the libc, amongst others.
618 For additional information, design information can be found
619 in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>.
621 This should only be disabled for special cases where alternate
622 atomicity implementations exist.
625 bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)"
626 depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A)
628 Enabling this option will allow the kernel to implement some
629 atomic operations using a software implementation of load-locked/
630 store-conditional (LLSC). On machines which do not have hardware
631 LLSC, this should be more efficient than the other alternative of
632 disabling interrupts around the atomic sequence.
634 config HW_PERF_EVENTS
635 bool "Enable hardware performance counter support for perf events"
636 depends on PERF_EVENTS && CPU_HAS_PMU
639 Enable hardware performance counter support for perf events. If
640 disabled, perf events will use software events only.
642 source "drivers/sh/Kconfig"
648 config USE_BUILTIN_DTB
649 bool "Use builtin DTB"
651 depends on SH_DEVICE_TREE
653 Link a device tree blob for particular hardware into the kernel,
654 suppressing use of the DTB pointer provided by the bootloader.
655 This option should only be used with legacy bootloaders that are
656 not capable of providing a DTB to the kernel, or for experimental
657 hardware without stable device tree bindings.
659 config BUILTIN_DTB_SOURCE
660 string "Source file for builtin DTB"
662 depends on USE_BUILTIN_DTB
664 Base name (without suffix, relative to arch/sh/boot/dts) for the
665 a DTS file that will be used to produce the DTB linked into the
668 config ZERO_PAGE_OFFSET
670 default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
671 SH_7751_SOLUTION_ENGINE
672 default "0x00004000" if PAGE_SIZE_16KB || SH_SH03
673 default "0x00002000" if PAGE_SIZE_8KB
676 This sets the default offset of zero page.
678 config BOOT_LINK_OFFSET
680 default "0x00210000" if SH_SHMIN
681 default "0x00810000" if SH_7780_SOLUTION_ENGINE
682 default "0x009e0000" if SH_TITAN
683 default "0x01800000" if SH_SDK7780
684 default "0x02000000" if SH_EDOSK7760
687 This option allows you to set the link address offset of the zImage.
688 This can be useful if you are on a board which has a small amount of
693 default "0x00001000" if PAGE_SIZE_4KB
694 default "0x00002000" if PAGE_SIZE_8KB
695 default "0x00004000" if PAGE_SIZE_16KB
696 default "0x00010000" if PAGE_SIZE_64KB
699 config ROMIMAGE_MMCIF
700 bool "Include MMCIF loader in romImage (EXPERIMENTAL)"
701 depends on CPU_SUBTYPE_SH7724
703 Say Y here to include experimental MMCIF loading code in
704 romImage. With this enabled it is possible to write the romImage
705 kernel image to an MMC card and boot the kernel straight from
706 the reset vector. At reset the processor Mask ROM will load the
707 first part of the romImage which in turn loads the rest the kernel
708 image to RAM using the MMCIF hardware block.
711 prompt "Kernel command line"
713 default CMDLINE_OVERWRITE
715 Setting this option allows the kernel command line arguments
718 config CMDLINE_OVERWRITE
719 bool "Overwrite bootloader kernel arguments"
721 Given string will overwrite any arguments passed in by
724 config CMDLINE_EXTEND
725 bool "Extend bootloader kernel arguments"
727 Given string will be concatenated with arguments passed in
733 string "Kernel command line arguments string"
734 depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND
735 default "console=ttySC1,115200"
742 bool "Maple Bus support"
743 depends on SH_DREAMCAST
745 The Maple Bus is SEGA's serial communication bus for peripherals
746 on the Dreamcast. Without this bus support you won't be able to
747 get your Dreamcast keyboard etc to work, so most users
748 probably want to say 'Y' here, unless you are only using the
749 Dreamcast with a serial line terminal or a remote network
754 menu "Power management options (EXPERIMENTAL)"
756 source "kernel/power/Kconfig"
758 source "drivers/cpuidle/Kconfig"