drivers/gpu/drm/meson/meson_drv.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Copyright (C) 2016 BayLibre, SAS
   4  * Author: Neil Armstrong <[email protected]>
   5  * Copyright (C) 2014 Endless Mobile
   6  *
   7  * Written by:
   8  *     Jasper St. Pierre <[email protected]>
   9  */
  10
  11 #include <linux/component.h>
  12 #include <linux/module.h>
  13 #include <linux/of_graph.h>
  14 #include <linux/sys_soc.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/soc/amlogic/meson-canvas.h>
  17
  18 #include <drm/drm_aperture.h>
  19 #include <drm/drm_atomic_helper.h>
  20 #include <drm/drm_drv.h>
  21 #include <drm/drm_fb_helper.h>
  22 #include <drm/drm_gem_cma_helper.h>
  23 #include <drm/drm_gem_framebuffer_helper.h>
  24 #include <drm/drm_modeset_helper_vtables.h>
  25 #include <drm/drm_probe_helper.h>
  26 #include <drm/drm_vblank.h>
  27
  28 #include "meson_crtc.h"
  29 #include "meson_drv.h"
  30 #include "meson_overlay.h"
  31 #include "meson_plane.h"
  32 #include "meson_osd_afbcd.h"
  33 #include "meson_registers.h"
  34 #include "meson_encoder_cvbs.h"
  35 #include "meson_encoder_hdmi.h"
  36 #include "meson_viu.h"
  37 #include "meson_vpp.h"
  38 #include "meson_rdma.h"
  39
  40 #define DRIVER_NAME "meson"
  41 #define DRIVER_DESC "Amlogic Meson DRM driver"
  42
  43 /**
  44  * DOC: Video Processing Unit
  45  *
  46  * VPU Handles the Global Video Processing, it includes management of the
  47  * clocks gates, blocks reset lines and power domains.
  48  *
  49  * What is missing :
  50  *
  51  * - Full reset of entire video processing HW blocks
  52  * - Scaling and setup of the VPU clock
  53  * - Bus clock gates
  54  * - Powering up video processing HW blocks
  55  * - Powering Up HDMI controller and PHY
  56  */
  57
  58 static const struct drm_mode_config_funcs meson_mode_config_funcs = {
  59         .atomic_check        = drm_atomic_helper_check,
  60         .atomic_commit       = drm_atomic_helper_commit,
  61         .fb_create           = drm_gem_fb_create,
  62 };
  63
  64 static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = {
  65         .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
  66 };
  67
  68 static irqreturn_t meson_irq(int irq, void *arg)
  69 {
  70         struct drm_device *dev = arg;
  71         struct meson_drm *priv = dev->dev_private;
  72
  73         (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
  74
  75         meson_crtc_irq(priv);
  76
  77         return IRQ_HANDLED;
  78 }
  79
  80 static int meson_dumb_create(struct drm_file *file, struct drm_device *dev,
  81                              struct drm_mode_create_dumb *args)
  82 {
  83         /*
  84          * We need 64bytes aligned stride, and PAGE aligned size
  85          */
  86         args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64);
  87         args->size = PAGE_ALIGN(args->pitch * args->height);
  88
  89         return drm_gem_cma_dumb_create_internal(file, dev, args);
  90 }
  91
  92 DEFINE_DRM_GEM_CMA_FOPS(fops);
  93
  94 static const struct drm_driver meson_driver = {
  95         .driver_features        = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
  96
  97         /* CMA Ops */
  98         DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(meson_dumb_create),
  99
 100         /* Misc */
 101         .fops                   = &fops,
 102         .name                   = DRIVER_NAME,
 103         .desc                   = DRIVER_DESC,
 104         .date                   = "20161109",
 105         .major                  = 1,
 106         .minor                  = 0,
 107 };
 108
 109 static bool meson_vpu_has_available_connectors(struct device *dev)
 110 {
 111         struct device_node *ep, *remote;
 112
 113         /* Parses each endpoint and check if remote exists */
 114         for_each_endpoint_of_node(dev->of_node, ep) {
 115                 /* If the endpoint node exists, consider it enabled */
 116                 remote = of_graph_get_remote_port(ep);
 117                 if (remote)
 118                         return true;
 119         }
 120
 121         return false;
 122 }
 123
 124 static struct regmap_config meson_regmap_config = {
 125         .reg_bits       = 32,
 126         .val_bits       = 32,
 127         .reg_stride     = 4,
 128         .max_register   = 0x1000,
 129 };
 130
 131 static void meson_vpu_init(struct meson_drm *priv)
 132 {
 133         u32 value;
 134
 135         /*
 136          * Slave dc0 and dc5 connected to master port 1.
 137          * By default other slaves are connected to master port 0.
 138          */
 139         value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1) |
 140                 VPU_RDARB_SLAVE_TO_MASTER_PORT(5, 1);
 141         writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
 142
 143         /* Slave dc0 connected to master port 1 */
 144         value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1);
 145         writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
 146
 147         /* Slave dc4 and dc7 connected to master port 1 */
 148         value = VPU_RDARB_SLAVE_TO_MASTER_PORT(4, 1) |
 149                 VPU_RDARB_SLAVE_TO_MASTER_PORT(7, 1);
 150         writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
 151
 152         /* Slave dc1 connected to master port 1 */
 153         value = VPU_RDARB_SLAVE_TO_MASTER_PORT(1, 1);
 154         writel_relaxed(value, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
 155 }
 156
 157 struct meson_drm_soc_attr {
 158         struct meson_drm_soc_limits limits;
 159         const struct soc_device_attribute *attrs;
 160 };
 161
 162 static const struct meson_drm_soc_attr meson_drm_soc_attrs[] = {
 163         /* S805X/S805Y HDMI PLL won't lock for HDMI PHY freq > 1,65GHz */
 164         {
 165                 .limits = {
 166                         .max_hdmi_phy_freq = 1650000,
 167                 },
 168                 .attrs = (const struct soc_device_attribute []) {
 169                         { .soc_id = "GXL (S805*)", },
 170                         { /* sentinel */ },
 171                 }
 172         },
 173 };
 174
 175 static int meson_drv_bind_master(struct device *dev, bool has_components)
 176 {
 177         struct platform_device *pdev = to_platform_device(dev);
 178         const struct meson_drm_match_data *match;
 179         struct meson_drm *priv;
 180         struct drm_device *drm;
 181         struct resource *res;
 182         void __iomem *regs;
 183         int ret, i;
 184
 185         /* Checks if an output connector is available */
 186         if (!meson_vpu_has_available_connectors(dev)) {
 187                 dev_err(dev, "No output connector available\n");
 188                 return -ENODEV;
 189         }
 190
 191         match = of_device_get_match_data(dev);
 192         if (!match)
 193                 return -ENODEV;
 194
 195         drm = drm_dev_alloc(&meson_driver, dev);
 196         if (IS_ERR(drm))
 197                 return PTR_ERR(drm);
 198
 199         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 200         if (!priv) {
 201                 ret = -ENOMEM;
 202                 goto free_drm;
 203         }
 204         drm->dev_private = priv;
 205         priv->drm = drm;
 206         priv->dev = dev;
 207         priv->compat = match->compat;
 208         priv->afbcd.ops = match->afbcd_ops;
 209
 210         regs = devm_platform_ioremap_resource_byname(pdev, "vpu");
 211         if (IS_ERR(regs)) {
 212                 ret = PTR_ERR(regs);
 213                 goto free_drm;
 214         }
 215
 216         priv->io_base = regs;
 217
 218         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
 219         if (!res) {
 220                 ret = -EINVAL;
 221                 goto free_drm;
 222         }
 223         /* Simply ioremap since it may be a shared register zone */
 224         regs = devm_ioremap(dev, res->start, resource_size(res));
 225         if (!regs) {
 226                 ret = -EADDRNOTAVAIL;
 227                 goto free_drm;
 228         }
 229
 230         priv->hhi = devm_regmap_init_mmio(dev, regs,
 231                                           &meson_regmap_config);
 232         if (IS_ERR(priv->hhi)) {
 233                 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
 234                 ret = PTR_ERR(priv->hhi);
 235                 goto free_drm;
 236         }
 237
 238         priv->canvas = meson_canvas_get(dev);
 239         if (IS_ERR(priv->canvas)) {
 240                 ret = PTR_ERR(priv->canvas);
 241                 goto free_drm;
 242         }
 243
 244         ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
 245         if (ret)
 246                 goto free_drm;
 247         ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
 248         if (ret) {
 249                 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
 250                 goto free_drm;
 251         }
 252         ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1);
 253         if (ret) {
 254                 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
 255                 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
 256                 goto free_drm;
 257         }
 258         ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2);
 259         if (ret) {
 260                 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
 261                 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
 262                 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
 263                 goto free_drm;
 264         }
 265
 266         priv->vsync_irq = platform_get_irq(pdev, 0);
 267
 268         ret = drm_vblank_init(drm, 1);
 269         if (ret)
 270                 goto free_drm;
 271
 272         /* Assign limits per soc revision/package */
 273         for (i = 0 ; i < ARRAY_SIZE(meson_drm_soc_attrs) ; ++i) {
 274                 if (soc_device_match(meson_drm_soc_attrs[i].attrs)) {
 275                         priv->limits = &meson_drm_soc_attrs[i].limits;
 276                         break;
 277                 }
 278         }
 279
 280         /*
 281          * Remove early framebuffers (ie. simplefb). The framebuffer can be
 282          * located anywhere in RAM
 283          */
 284         ret = drm_aperture_remove_framebuffers(false, &meson_driver);
 285         if (ret)
 286                 goto free_drm;
 287
 288         ret = drmm_mode_config_init(drm);
 289         if (ret)
 290                 goto free_drm;
 291         drm->mode_config.max_width = 3840;
 292         drm->mode_config.max_height = 2160;
 293         drm->mode_config.funcs = &meson_mode_config_funcs;
 294         drm->mode_config.helper_private = &meson_mode_config_helpers;
 295
 296         /* Hardware Initialization */
 297
 298         meson_vpu_init(priv);
 299         meson_venc_init(priv);
 300         meson_vpp_init(priv);
 301         meson_viu_init(priv);
 302         if (priv->afbcd.ops) {
 303                 ret = priv->afbcd.ops->init(priv);
 304                 if (ret)
 305                         return ret;
 306         }
 307
 308         /* Encoder Initialization */
 309
 310         ret = meson_encoder_cvbs_init(priv);
 311         if (ret)
 312                 goto free_drm;
 313
 314         if (has_components) {
 315                 ret = component_bind_all(drm->dev, drm);
 316                 if (ret) {
 317                         dev_err(drm->dev, "Couldn't bind all components\n");
 318                         goto free_drm;
 319                 }
 320         }
 321
 322         ret = meson_encoder_hdmi_init(priv);
 323         if (ret)
 324                 goto free_drm;
 325
 326         ret = meson_plane_create(priv);
 327         if (ret)
 328                 goto free_drm;
 329
 330         ret = meson_overlay_create(priv);
 331         if (ret)
 332                 goto free_drm;
 333
 334         ret = meson_crtc_create(priv);
 335         if (ret)
 336                 goto free_drm;
 337
 338         ret = request_irq(priv->vsync_irq, meson_irq, 0, drm->driver->name, drm);
 339         if (ret)
 340                 goto free_drm;
 341
 342         drm_mode_config_reset(drm);
 343
 344         drm_kms_helper_poll_init(drm);
 345
 346         platform_set_drvdata(pdev, priv);
 347
 348         ret = drm_dev_register(drm, 0);
 349         if (ret)
 350                 goto uninstall_irq;
 351
 352         drm_fbdev_generic_setup(drm, 32);
 353
 354         return 0;
 355
 356 uninstall_irq:
 357         free_irq(priv->vsync_irq, drm);
 358 free_drm:
 359         drm_dev_put(drm);
 360
 361         return ret;
 362 }
 363
 364 static int meson_drv_bind(struct device *dev)
 365 {
 366         return meson_drv_bind_master(dev, true);
 367 }
 368
 369 static void meson_drv_unbind(struct device *dev)
 370 {
 371         struct meson_drm *priv = dev_get_drvdata(dev);
 372         struct drm_device *drm = priv->drm;
 373
 374         if (priv->canvas) {
 375                 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
 376                 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
 377                 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
 378                 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2);
 379         }
 380
 381         drm_dev_unregister(drm);
 382         drm_kms_helper_poll_fini(drm);
 383         drm_atomic_helper_shutdown(drm);
 384         component_unbind_all(dev, drm);
 385         free_irq(priv->vsync_irq, drm);
 386         drm_dev_put(drm);
 387
 388         if (priv->afbcd.ops) {
 389                 priv->afbcd.ops->reset(priv);
 390                 meson_rdma_free(priv);
 391         }
 392 }
 393
 394 static const struct component_master_ops meson_drv_master_ops = {
 395         .bind   = meson_drv_bind,
 396         .unbind = meson_drv_unbind,
 397 };
 398
 399 static int __maybe_unused meson_drv_pm_suspend(struct device *dev)
 400 {
 401         struct meson_drm *priv = dev_get_drvdata(dev);
 402
 403         if (!priv)
 404                 return 0;
 405
 406         return drm_mode_config_helper_suspend(priv->drm);
 407 }
 408
 409 static int __maybe_unused meson_drv_pm_resume(struct device *dev)
 410 {
 411         struct meson_drm *priv = dev_get_drvdata(dev);
 412
 413         if (!priv)
 414                 return 0;
 415
 416         meson_vpu_init(priv);
 417         meson_venc_init(priv);
 418         meson_vpp_init(priv);
 419         meson_viu_init(priv);
 420         if (priv->afbcd.ops)
 421                 priv->afbcd.ops->init(priv);
 422
 423         return drm_mode_config_helper_resume(priv->drm);
 424 }
 425
 426 static int compare_of(struct device *dev, void *data)
 427 {
 428         DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n",
 429                          dev->of_node, data);
 430
 431         return dev->of_node == data;
 432 }
 433
 434 static void meson_drv_shutdown(struct platform_device *pdev)
 435 {
 436         struct meson_drm *priv = dev_get_drvdata(&pdev->dev);
 437
 438         if (!priv)
 439                 return;
 440
 441         drm_kms_helper_poll_fini(priv->drm);
 442         drm_atomic_helper_shutdown(priv->drm);
 443 }
 444
 445 /* Possible connectors nodes to ignore */
 446 static const struct of_device_id connectors_match[] = {
 447         { .compatible = "composite-video-connector" },
 448         { .compatible = "svideo-connector" },
 449         {}
 450 };
 451
 452 static int meson_drv_probe(struct platform_device *pdev)
 453 {
 454         struct component_match *match = NULL;
 455         struct device_node *np = pdev->dev.of_node;
 456         struct device_node *ep, *remote;
 457         int count = 0;
 458
 459         for_each_endpoint_of_node(np, ep) {
 460                 remote = of_graph_get_remote_port_parent(ep);
 461                 if (!remote || !of_device_is_available(remote)) {
 462                         of_node_put(remote);
 463                         continue;
 464                 }
 465
 466                 /* If an analog connector is detected, count it as an output */
 467                 if (of_match_node(connectors_match, remote)) {
 468                         ++count;
 469                         of_node_put(remote);
 470                         continue;
 471                 }
 472
 473                 dev_dbg(&pdev->dev, "parent %pOF remote match add %pOF parent %s\n",
 474                         np, remote, dev_name(&pdev->dev));
 475
 476                 component_match_add(&pdev->dev, &match, compare_of, remote);
 477
 478                 of_node_put(remote);
 479
 480                 ++count;
 481         }
 482
 483         if (count && !match)
 484                 return meson_drv_bind_master(&pdev->dev, false);
 485
 486         /* If some endpoints were found, initialize the nodes */
 487         if (count) {
 488                 dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);
 489
 490                 return component_master_add_with_match(&pdev->dev,
 491                                                        &meson_drv_master_ops,
 492                                                        match);
 493         }
 494
 495         /* If no output endpoints were available, simply bail out */
 496         return 0;
 497 };
 498
 499 static struct meson_drm_match_data meson_drm_gxbb_data = {
 500         .compat = VPU_COMPATIBLE_GXBB,
 501 };
 502
 503 static struct meson_drm_match_data meson_drm_gxl_data = {
 504         .compat = VPU_COMPATIBLE_GXL,
 505 };
 506
 507 static struct meson_drm_match_data meson_drm_gxm_data = {
 508         .compat = VPU_COMPATIBLE_GXM,
 509         .afbcd_ops = &meson_afbcd_gxm_ops,
 510 };
 511
 512 static struct meson_drm_match_data meson_drm_g12a_data = {
 513         .compat = VPU_COMPATIBLE_G12A,
 514         .afbcd_ops = &meson_afbcd_g12a_ops,
 515 };
 516
 517 static const struct of_device_id dt_match[] = {
 518         { .compatible = "amlogic,meson-gxbb-vpu",
 519           .data       = (void *)&meson_drm_gxbb_data },
 520         { .compatible = "amlogic,meson-gxl-vpu",
 521           .data       = (void *)&meson_drm_gxl_data },
 522         { .compatible = "amlogic,meson-gxm-vpu",
 523           .data       = (void *)&meson_drm_gxm_data },
 524         { .compatible = "amlogic,meson-g12a-vpu",
 525           .data       = (void *)&meson_drm_g12a_data },
 526         {}
 527 };
 528 MODULE_DEVICE_TABLE(of, dt_match);
 529
 530 static const struct dev_pm_ops meson_drv_pm_ops = {
 531         SET_SYSTEM_SLEEP_PM_OPS(meson_drv_pm_suspend, meson_drv_pm_resume)
 532 };
 533
 534 static struct platform_driver meson_drm_platform_driver = {
 535         .probe      = meson_drv_probe,
 536         .shutdown   = meson_drv_shutdown,
 537         .driver     = {
 538                 .name   = "meson-drm",
 539                 .of_match_table = dt_match,
 540                 .pm = &meson_drv_pm_ops,
 541         },
 542 };
 543
 544 module_platform_driver(meson_drm_platform_driver);
 545
 546 MODULE_AUTHOR("Jasper St. Pierre <[email protected]>");
 547 MODULE_AUTHOR("Neil Armstrong <[email protected]>");
 548 MODULE_DESCRIPTION(DRIVER_DESC);
 549 MODULE_LICENSE("GPL");