2 * Low-Level PCI Support for PC
7 #include <linux/sched.h>
9 #include <linux/pci-acpi.h>
10 #include <linux/ioport.h>
11 #include <linux/init.h>
12 #include <linux/dmi.h>
13 #include <linux/slab.h>
16 #include <asm/segment.h>
19 #include <asm/pci_x86.h>
20 #include <asm/setup.h>
22 unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
25 unsigned int pci_early_dump_regs;
26 static int pci_bf_sort;
27 static int smbios_type_b1_flag;
30 #ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS
31 int noioapicreroute = 0;
33 int noioapicreroute = 1;
35 int pcibios_last_bus = -1;
36 unsigned long pirq_table_addr;
37 const struct pci_raw_ops *__read_mostly raw_pci_ops;
38 const struct pci_raw_ops *__read_mostly raw_pci_ext_ops;
40 int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
41 int reg, int len, u32 *val)
43 if (domain == 0 && reg < 256 && raw_pci_ops)
44 return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
46 return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
50 int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
51 int reg, int len, u32 val)
53 if (domain == 0 && reg < 256 && raw_pci_ops)
54 return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
56 return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
60 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
62 return raw_pci_read(pci_domain_nr(bus), bus->number,
63 devfn, where, size, value);
66 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
68 return raw_pci_write(pci_domain_nr(bus), bus->number,
69 devfn, where, size, value);
72 struct pci_ops pci_root_ops = {
78 * This interrupt-safe spinlock protects all accesses to PCI
79 * configuration space.
81 DEFINE_RAW_SPINLOCK(pci_config_lock);
83 static int __init can_skip_ioresource_align(const struct dmi_system_id *d)
85 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
86 printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
90 static const struct dmi_system_id can_skip_pciprobe_dmi_table[] __initconst = {
92 * Systems where PCI IO resource ISA alignment can be skipped
93 * when the ISA enable bit in the bridge control is not set
96 .callback = can_skip_ioresource_align,
97 .ident = "IBM System x3800",
99 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
100 DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
104 .callback = can_skip_ioresource_align,
105 .ident = "IBM System x3850",
107 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
108 DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
112 .callback = can_skip_ioresource_align,
113 .ident = "IBM System x3950",
115 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
116 DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
122 void __init dmi_check_skip_isa_align(void)
124 dmi_check_system(can_skip_pciprobe_dmi_table);
127 static void pcibios_fixup_device_resources(struct pci_dev *dev)
129 struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE];
130 struct resource *bar_r;
133 if (pci_probe & PCI_NOASSIGN_BARS) {
135 * If the BIOS did not assign the BAR, zero out the
136 * resource so the kernel doesn't attempt to assign
137 * it later on in pci_assign_unassigned_resources
139 for (bar = 0; bar <= PCI_STD_RESOURCE_END; bar++) {
140 bar_r = &dev->resource[bar];
141 if (bar_r->start == 0 && bar_r->end != 0) {
148 if (pci_probe & PCI_NOASSIGN_ROMS) {
152 /* we deal with BIOS assigned ROM later */
155 rom_r->start = rom_r->end = rom_r->flags = 0;
160 * Called after each bus is probed, but before its children
164 void pcibios_fixup_bus(struct pci_bus *b)
168 pci_read_bridge_bases(b);
169 list_for_each_entry(dev, &b->devices, bus_list)
170 pcibios_fixup_device_resources(dev);
173 void pcibios_add_bus(struct pci_bus *bus)
175 acpi_pci_add_bus(bus);
178 void pcibios_remove_bus(struct pci_bus *bus)
180 acpi_pci_remove_bus(bus);
184 * Only use DMI information to set this if nothing was passed
185 * on the kernel command line (which was parsed earlier).
188 static int __init set_bf_sort(const struct dmi_system_id *d)
190 if (pci_bf_sort == pci_bf_sort_default) {
191 pci_bf_sort = pci_dmi_bf;
192 printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
197 static void __init read_dmi_type_b1(const struct dmi_header *dm,
200 u8 *d = (u8 *)dm + 4;
202 if (dm->type != 0xB1)
204 switch (((*(u32 *)d) >> 9) & 0x03) {
206 printk(KERN_INFO "dmi type 0xB1 record - unknown flag\n");
208 case 0x01: /* set pci=bfsort */
209 smbios_type_b1_flag = 1;
211 case 0x02: /* do not set pci=bfsort */
212 smbios_type_b1_flag = 2;
219 static int __init find_sort_method(const struct dmi_system_id *d)
221 dmi_walk(read_dmi_type_b1, NULL);
223 if (smbios_type_b1_flag == 1) {
231 * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
234 static int __init assign_all_busses(const struct dmi_system_id *d)
236 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
237 printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
238 " (pci=assign-busses)\n", d->ident);
243 static int __init set_scan_all(const struct dmi_system_id *d)
245 printk(KERN_INFO "PCI: %s detected, enabling pci=pcie_scan_all\n",
247 pci_add_flags(PCI_SCAN_ALL_PCIE_DEVS);
251 static const struct dmi_system_id pciprobe_dmi_table[] __initconst = {
254 * Laptops which need pci=assign-busses to see Cardbus cards
257 .callback = assign_all_busses,
258 .ident = "Samsung X20 Laptop",
260 DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
261 DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
264 #endif /* __i386__ */
266 .callback = set_bf_sort,
267 .ident = "Dell PowerEdge 1950",
269 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
270 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
274 .callback = set_bf_sort,
275 .ident = "Dell PowerEdge 1955",
277 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
278 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
282 .callback = set_bf_sort,
283 .ident = "Dell PowerEdge 2900",
285 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
286 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
290 .callback = set_bf_sort,
291 .ident = "Dell PowerEdge 2950",
293 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
294 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
298 .callback = set_bf_sort,
299 .ident = "Dell PowerEdge R900",
301 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
302 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
306 .callback = find_sort_method,
307 .ident = "Dell System",
309 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"),
313 .callback = set_bf_sort,
314 .ident = "HP ProLiant BL20p G3",
316 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
317 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
321 .callback = set_bf_sort,
322 .ident = "HP ProLiant BL20p G4",
324 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
325 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
329 .callback = set_bf_sort,
330 .ident = "HP ProLiant BL30p G1",
332 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
333 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
337 .callback = set_bf_sort,
338 .ident = "HP ProLiant BL25p G1",
340 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
341 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
345 .callback = set_bf_sort,
346 .ident = "HP ProLiant BL35p G1",
348 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
349 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
353 .callback = set_bf_sort,
354 .ident = "HP ProLiant BL45p G1",
356 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
357 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
361 .callback = set_bf_sort,
362 .ident = "HP ProLiant BL45p G2",
364 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
365 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
369 .callback = set_bf_sort,
370 .ident = "HP ProLiant BL460c G1",
372 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
373 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
377 .callback = set_bf_sort,
378 .ident = "HP ProLiant BL465c G1",
380 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
381 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
385 .callback = set_bf_sort,
386 .ident = "HP ProLiant BL480c G1",
388 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
389 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
393 .callback = set_bf_sort,
394 .ident = "HP ProLiant BL685c G1",
396 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
397 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
401 .callback = set_bf_sort,
402 .ident = "HP ProLiant DL360",
404 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
405 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"),
409 .callback = set_bf_sort,
410 .ident = "HP ProLiant DL380",
412 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
413 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"),
418 .callback = assign_all_busses,
419 .ident = "Compaq EVO N800c",
421 DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
422 DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"),
427 .callback = set_bf_sort,
428 .ident = "HP ProLiant DL385 G2",
430 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
431 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
435 .callback = set_bf_sort,
436 .ident = "HP ProLiant DL585 G2",
438 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
439 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
443 .callback = set_scan_all,
444 .ident = "Stratus/NEC ftServer",
446 DMI_MATCH(DMI_SYS_VENDOR, "Stratus"),
447 DMI_MATCH(DMI_PRODUCT_NAME, "ftServer"),
451 .callback = set_scan_all,
452 .ident = "Stratus/NEC ftServer",
454 DMI_MATCH(DMI_SYS_VENDOR, "NEC"),
455 DMI_MATCH(DMI_PRODUCT_NAME, "Express5800/R32"),
459 .callback = set_scan_all,
460 .ident = "Stratus/NEC ftServer",
462 DMI_MATCH(DMI_SYS_VENDOR, "NEC"),
463 DMI_MATCH(DMI_PRODUCT_NAME, "Express5800/R31"),
469 void __init dmi_check_pciprobe(void)
471 dmi_check_system(pciprobe_dmi_table);
474 void pcibios_scan_root(int busnum)
477 struct pci_sysdata *sd;
478 LIST_HEAD(resources);
480 sd = kzalloc(sizeof(*sd), GFP_KERNEL);
482 printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busnum);
485 sd->node = x86_pci_root_bus_node(busnum);
486 x86_pci_root_bus_resources(busnum, &resources);
487 printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
488 bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, sd, &resources);
490 pci_free_resource_list(&resources);
494 pci_bus_add_devices(bus);
497 void __init pcibios_set_cache_line_size(void)
499 struct cpuinfo_x86 *c = &boot_cpu_data;
502 * Set PCI cacheline size to that of the CPU if the CPU has reported it.
503 * (For older CPUs that don't support cpuid, we se it to 32 bytes
504 * It's also good for 386/486s (which actually have 16)
505 * as quite a few PCI devices do not support smaller values.
507 if (c->x86_clflush_size > 0) {
508 pci_dfl_cache_line_size = c->x86_clflush_size >> 2;
509 printk(KERN_DEBUG "PCI: pci_cache_line_size set to %d bytes\n",
510 pci_dfl_cache_line_size << 2);
512 pci_dfl_cache_line_size = 32 >> 2;
513 printk(KERN_DEBUG "PCI: Unknown cacheline size. Setting to 32 bytes\n");
517 int __init pcibios_init(void)
519 if (!raw_pci_ops && !raw_pci_ext_ops) {
520 printk(KERN_WARNING "PCI: System does not support PCI\n");
524 pcibios_set_cache_line_size();
525 pcibios_resource_survey();
527 if (pci_bf_sort >= pci_force_bf)
528 pci_sort_breadthfirst();
532 char *__init pcibios_setup(char *str)
534 if (!strcmp(str, "off")) {
537 } else if (!strcmp(str, "bfsort")) {
538 pci_bf_sort = pci_force_bf;
540 } else if (!strcmp(str, "nobfsort")) {
541 pci_bf_sort = pci_force_nobf;
544 #ifdef CONFIG_PCI_BIOS
545 else if (!strcmp(str, "bios")) {
546 pci_probe = PCI_PROBE_BIOS;
548 } else if (!strcmp(str, "nobios")) {
549 pci_probe &= ~PCI_PROBE_BIOS;
551 } else if (!strcmp(str, "biosirq")) {
552 pci_probe |= PCI_BIOS_IRQ_SCAN;
554 } else if (!strncmp(str, "pirqaddr=", 9)) {
555 pirq_table_addr = simple_strtoul(str+9, NULL, 0);
559 #ifdef CONFIG_PCI_DIRECT
560 else if (!strcmp(str, "conf1")) {
561 pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
564 else if (!strcmp(str, "conf2")) {
565 pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
569 #ifdef CONFIG_PCI_MMCONFIG
570 else if (!strcmp(str, "nommconf")) {
571 pci_probe &= ~PCI_PROBE_MMCONF;
574 else if (!strcmp(str, "check_enable_amd_mmconf")) {
575 pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
579 else if (!strcmp(str, "noacpi")) {
583 else if (!strcmp(str, "noearly")) {
584 pci_probe |= PCI_PROBE_NOEARLY;
587 else if (!strcmp(str, "usepirqmask")) {
588 pci_probe |= PCI_USE_PIRQ_MASK;
590 } else if (!strncmp(str, "irqmask=", 8)) {
591 pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
593 } else if (!strncmp(str, "lastbus=", 8)) {
594 pcibios_last_bus = simple_strtol(str+8, NULL, 0);
596 } else if (!strcmp(str, "rom")) {
597 pci_probe |= PCI_ASSIGN_ROMS;
599 } else if (!strcmp(str, "norom")) {
600 pci_probe |= PCI_NOASSIGN_ROMS;
602 } else if (!strcmp(str, "nobar")) {
603 pci_probe |= PCI_NOASSIGN_BARS;
605 } else if (!strcmp(str, "assign-busses")) {
606 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
608 } else if (!strcmp(str, "use_crs")) {
609 pci_probe |= PCI_USE__CRS;
611 } else if (!strcmp(str, "nocrs")) {
612 pci_probe |= PCI_ROOT_NO_CRS;
614 } else if (!strcmp(str, "earlydump")) {
615 pci_early_dump_regs = 1;
617 } else if (!strcmp(str, "routeirq")) {
620 } else if (!strcmp(str, "skip_isa_align")) {
621 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
623 } else if (!strcmp(str, "noioapicquirk")) {
626 } else if (!strcmp(str, "ioapicreroute")) {
627 if (noioapicreroute != -1)
630 } else if (!strcmp(str, "noioapicreroute")) {
631 if (noioapicreroute != -1)
638 unsigned int pcibios_assign_all_busses(void)
640 return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
643 #if defined(CONFIG_X86_DEV_DMA_OPS) && defined(CONFIG_PCI_DOMAINS)
644 static LIST_HEAD(dma_domain_list);
645 static DEFINE_SPINLOCK(dma_domain_list_lock);
647 void add_dma_domain(struct dma_domain *domain)
649 spin_lock(&dma_domain_list_lock);
650 list_add(&domain->node, &dma_domain_list);
651 spin_unlock(&dma_domain_list_lock);
653 EXPORT_SYMBOL_GPL(add_dma_domain);
655 void del_dma_domain(struct dma_domain *domain)
657 spin_lock(&dma_domain_list_lock);
658 list_del(&domain->node);
659 spin_unlock(&dma_domain_list_lock);
661 EXPORT_SYMBOL_GPL(del_dma_domain);
663 static void set_dma_domain_ops(struct pci_dev *pdev)
665 struct dma_domain *domain;
667 spin_lock(&dma_domain_list_lock);
668 list_for_each_entry(domain, &dma_domain_list, node) {
669 if (pci_domain_nr(pdev->bus) == domain->domain_nr) {
670 pdev->dev.dma_ops = domain->dma_ops;
674 spin_unlock(&dma_domain_list_lock);
677 static void set_dma_domain_ops(struct pci_dev *pdev) {}
680 static void set_dev_domain_options(struct pci_dev *pdev)
682 if (is_vmd(pdev->bus))
683 pdev->hotplug_user_indicators = 1;
686 int pcibios_add_device(struct pci_dev *dev)
688 struct setup_data *data;
689 struct pci_setup_rom *rom;
692 pa_data = boot_params.hdr.setup_data;
694 data = ioremap(pa_data, sizeof(*rom));
698 if (data->type == SETUP_PCI) {
699 rom = (struct pci_setup_rom *)data;
701 if ((pci_domain_nr(dev->bus) == rom->segment) &&
702 (dev->bus->number == rom->bus) &&
703 (PCI_SLOT(dev->devfn) == rom->device) &&
704 (PCI_FUNC(dev->devfn) == rom->function) &&
705 (dev->vendor == rom->vendor) &&
706 (dev->device == rom->devid)) {
708 offsetof(struct pci_setup_rom, romdata);
709 dev->romlen = rom->pcilen;
712 pa_data = data->next;
715 set_dma_domain_ops(dev);
716 set_dev_domain_options(dev);
720 int pcibios_enable_device(struct pci_dev *dev, int mask)
724 if ((err = pci_enable_resources(dev, mask)) < 0)
727 if (!pci_dev_msi_enabled(dev))
728 return pcibios_enable_irq(dev);
732 void pcibios_disable_device (struct pci_dev *dev)
734 if (!pci_dev_msi_enabled(dev) && pcibios_disable_irq)
735 pcibios_disable_irq(dev);
738 #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC
739 void pcibios_release_device(struct pci_dev *dev)
741 if (atomic_dec_return(&dev->enable_cnt) >= 0)
742 pcibios_disable_device(dev);
747 int pci_ext_cfg_avail(void)