1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016 MediaTek Inc.
9 #include <linux/dma-mapping.h>
10 #include <linux/iopoll.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/of_address.h>
14 #include <linux/of_irq.h>
15 #include <linux/platform_device.h>
19 #include "mtu3_debug.h"
21 /* u2-port0 should be powered on and enabled; */
22 int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks)
24 void __iomem *ibase = ssusb->ippc_base;
28 check_val = ex_clks | SSUSB_SYS125_RST_B_STS | SSUSB_SYSPLL_STABLE |
31 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value,
32 (check_val == (value & check_val)), 100, 20000);
34 dev_err(ssusb->dev, "clks of sts1 are not stable!\n");
38 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS2, value,
39 (value & SSUSB_U2_MAC_SYS_RST_B_STS), 100, 10000);
41 dev_err(ssusb->dev, "mac2 clock is not stable\n");
48 static int ssusb_phy_init(struct ssusb_mtk *ssusb)
53 for (i = 0; i < ssusb->num_phys; i++) {
54 ret = phy_init(ssusb->phys[i]);
62 phy_exit(ssusb->phys[i - 1]);
67 static int ssusb_phy_exit(struct ssusb_mtk *ssusb)
71 for (i = 0; i < ssusb->num_phys; i++)
72 phy_exit(ssusb->phys[i]);
77 static int ssusb_phy_power_on(struct ssusb_mtk *ssusb)
82 for (i = 0; i < ssusb->num_phys; i++) {
83 ret = phy_power_on(ssusb->phys[i]);
91 phy_power_off(ssusb->phys[i - 1]);
96 static void ssusb_phy_power_off(struct ssusb_mtk *ssusb)
100 for (i = 0; i < ssusb->num_phys; i++)
101 phy_power_off(ssusb->phys[i]);
104 static int ssusb_clks_enable(struct ssusb_mtk *ssusb)
108 ret = clk_prepare_enable(ssusb->sys_clk);
110 dev_err(ssusb->dev, "failed to enable sys_clk\n");
114 ret = clk_prepare_enable(ssusb->ref_clk);
116 dev_err(ssusb->dev, "failed to enable ref_clk\n");
120 ret = clk_prepare_enable(ssusb->mcu_clk);
122 dev_err(ssusb->dev, "failed to enable mcu_clk\n");
126 ret = clk_prepare_enable(ssusb->dma_clk);
128 dev_err(ssusb->dev, "failed to enable dma_clk\n");
135 clk_disable_unprepare(ssusb->mcu_clk);
137 clk_disable_unprepare(ssusb->ref_clk);
139 clk_disable_unprepare(ssusb->sys_clk);
144 static void ssusb_clks_disable(struct ssusb_mtk *ssusb)
146 clk_disable_unprepare(ssusb->dma_clk);
147 clk_disable_unprepare(ssusb->mcu_clk);
148 clk_disable_unprepare(ssusb->ref_clk);
149 clk_disable_unprepare(ssusb->sys_clk);
152 static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
156 ret = regulator_enable(ssusb->vusb33);
158 dev_err(ssusb->dev, "failed to enable vusb33\n");
162 ret = ssusb_clks_enable(ssusb);
166 ret = ssusb_phy_init(ssusb);
168 dev_err(ssusb->dev, "failed to init phy\n");
172 ret = ssusb_phy_power_on(ssusb);
174 dev_err(ssusb->dev, "failed to power on phy\n");
181 ssusb_phy_exit(ssusb);
183 ssusb_clks_disable(ssusb);
185 regulator_disable(ssusb->vusb33);
190 static void ssusb_rscs_exit(struct ssusb_mtk *ssusb)
192 ssusb_clks_disable(ssusb);
193 regulator_disable(ssusb->vusb33);
194 ssusb_phy_power_off(ssusb);
195 ssusb_phy_exit(ssusb);
198 static void ssusb_ip_sw_reset(struct ssusb_mtk *ssusb)
200 /* reset whole ip (xhci & u3d) */
201 mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
203 mtu3_clrbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
206 * device ip may be powered on in firmware/BROM stage before entering
208 * power down device ip, otherwise ip-sleep will fail when working as
211 mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
214 /* ignore the error if the clock does not exist */
215 static struct clk *get_optional_clk(struct device *dev, const char *id)
219 opt_clk = devm_clk_get(dev, id);
220 /* ignore error number except EPROBE_DEFER */
221 if (IS_ERR(opt_clk) && (PTR_ERR(opt_clk) != -EPROBE_DEFER))
227 static int get_ssusb_rscs(struct platform_device *pdev, struct ssusb_mtk *ssusb)
229 struct device_node *node = pdev->dev.of_node;
230 struct otg_switch_mtk *otg_sx = &ssusb->otg_switch;
231 struct device *dev = &pdev->dev;
232 struct resource *res;
236 ssusb->vusb33 = devm_regulator_get(dev, "vusb33");
237 if (IS_ERR(ssusb->vusb33)) {
238 dev_err(dev, "failed to get vusb33\n");
239 return PTR_ERR(ssusb->vusb33);
242 ssusb->sys_clk = devm_clk_get(dev, "sys_ck");
243 if (IS_ERR(ssusb->sys_clk)) {
244 dev_err(dev, "failed to get sys clock\n");
245 return PTR_ERR(ssusb->sys_clk);
248 ssusb->ref_clk = get_optional_clk(dev, "ref_ck");
249 if (IS_ERR(ssusb->ref_clk))
250 return PTR_ERR(ssusb->ref_clk);
252 ssusb->mcu_clk = get_optional_clk(dev, "mcu_ck");
253 if (IS_ERR(ssusb->mcu_clk))
254 return PTR_ERR(ssusb->mcu_clk);
256 ssusb->dma_clk = get_optional_clk(dev, "dma_ck");
257 if (IS_ERR(ssusb->dma_clk))
258 return PTR_ERR(ssusb->dma_clk);
260 ssusb->num_phys = of_count_phandle_with_args(node,
261 "phys", "#phy-cells");
262 if (ssusb->num_phys > 0) {
263 ssusb->phys = devm_kcalloc(dev, ssusb->num_phys,
264 sizeof(*ssusb->phys), GFP_KERNEL);
271 for (i = 0; i < ssusb->num_phys; i++) {
272 ssusb->phys[i] = devm_of_phy_get_by_index(dev, node, i);
273 if (IS_ERR(ssusb->phys[i])) {
274 dev_err(dev, "failed to get phy-%d\n", i);
275 return PTR_ERR(ssusb->phys[i]);
279 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ippc");
280 ssusb->ippc_base = devm_ioremap_resource(dev, res);
281 if (IS_ERR(ssusb->ippc_base))
282 return PTR_ERR(ssusb->ippc_base);
284 ssusb->dr_mode = usb_get_dr_mode(dev);
285 if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN)
286 ssusb->dr_mode = USB_DR_MODE_OTG;
288 if (ssusb->dr_mode == USB_DR_MODE_PERIPHERAL)
291 /* if host role is supported */
292 ret = ssusb_wakeup_of_property_parse(ssusb, node);
294 dev_err(dev, "failed to parse uwk property\n");
298 /* optional property, ignore the error if it does not exist */
299 of_property_read_u32(node, "mediatek,u3p-dis-msk",
300 &ssusb->u3p_dis_msk);
302 otg_sx->vbus = devm_regulator_get(dev, "vbus");
303 if (IS_ERR(otg_sx->vbus)) {
304 dev_err(dev, "failed to get vbus\n");
305 return PTR_ERR(otg_sx->vbus);
308 if (ssusb->dr_mode == USB_DR_MODE_HOST)
311 /* if dual-role mode is supported */
312 otg_sx->is_u3_drd = of_property_read_bool(node, "mediatek,usb3-drd");
313 otg_sx->manual_drd_enabled =
314 of_property_read_bool(node, "enable-manual-drd");
316 if (of_property_read_bool(node, "extcon")) {
317 otg_sx->edev = extcon_get_edev_by_phandle(ssusb->dev, 0);
318 if (IS_ERR(otg_sx->edev)) {
319 dev_err(ssusb->dev, "couldn't get extcon device\n");
320 return PTR_ERR(otg_sx->edev);
325 dev_info(dev, "dr_mode: %d, is_u3_dr: %d, u3p_dis_msk: %x, drd: %s\n",
326 ssusb->dr_mode, otg_sx->is_u3_drd, ssusb->u3p_dis_msk,
327 otg_sx->manual_drd_enabled ? "manual" : "auto");
332 static int mtu3_probe(struct platform_device *pdev)
334 struct device_node *node = pdev->dev.of_node;
335 struct device *dev = &pdev->dev;
336 struct ssusb_mtk *ssusb;
339 /* all elements are set to ZERO as default value */
340 ssusb = devm_kzalloc(dev, sizeof(*ssusb), GFP_KERNEL);
344 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
346 dev_err(dev, "No suitable DMA config available\n");
350 platform_set_drvdata(pdev, ssusb);
353 ret = get_ssusb_rscs(pdev, ssusb);
357 ssusb_debugfs_create_root(ssusb);
359 /* enable power domain */
360 pm_runtime_enable(dev);
361 pm_runtime_get_sync(dev);
362 device_enable_async_suspend(dev);
364 ret = ssusb_rscs_init(ssusb);
368 ssusb_ip_sw_reset(ssusb);
370 if (IS_ENABLED(CONFIG_USB_MTU3_HOST))
371 ssusb->dr_mode = USB_DR_MODE_HOST;
372 else if (IS_ENABLED(CONFIG_USB_MTU3_GADGET))
373 ssusb->dr_mode = USB_DR_MODE_PERIPHERAL;
375 /* default as host */
376 ssusb->is_host = !(ssusb->dr_mode == USB_DR_MODE_PERIPHERAL);
378 switch (ssusb->dr_mode) {
379 case USB_DR_MODE_PERIPHERAL:
380 ret = ssusb_gadget_init(ssusb);
382 dev_err(dev, "failed to initialize gadget\n");
386 case USB_DR_MODE_HOST:
387 ret = ssusb_host_init(ssusb, node);
389 dev_err(dev, "failed to initialize host\n");
393 case USB_DR_MODE_OTG:
394 ret = ssusb_gadget_init(ssusb);
396 dev_err(dev, "failed to initialize gadget\n");
400 ret = ssusb_host_init(ssusb, node);
402 dev_err(dev, "failed to initialize host\n");
406 ret = ssusb_otg_switch_init(ssusb);
408 dev_err(dev, "failed to initialize switch\n");
413 dev_err(dev, "unsupported mode: %d\n", ssusb->dr_mode);
421 ssusb_host_exit(ssusb);
423 ssusb_gadget_exit(ssusb);
425 ssusb_rscs_exit(ssusb);
427 pm_runtime_put_sync(dev);
428 pm_runtime_disable(dev);
429 ssusb_debugfs_remove_root(ssusb);
434 static int mtu3_remove(struct platform_device *pdev)
436 struct ssusb_mtk *ssusb = platform_get_drvdata(pdev);
438 switch (ssusb->dr_mode) {
439 case USB_DR_MODE_PERIPHERAL:
440 ssusb_gadget_exit(ssusb);
442 case USB_DR_MODE_HOST:
443 ssusb_host_exit(ssusb);
445 case USB_DR_MODE_OTG:
446 ssusb_otg_switch_exit(ssusb);
447 ssusb_gadget_exit(ssusb);
448 ssusb_host_exit(ssusb);
454 ssusb_rscs_exit(ssusb);
455 pm_runtime_put_sync(&pdev->dev);
456 pm_runtime_disable(&pdev->dev);
457 ssusb_debugfs_remove_root(ssusb);
463 * when support dual-role mode, we reject suspend when
464 * it works as device mode;
466 static int __maybe_unused mtu3_suspend(struct device *dev)
468 struct ssusb_mtk *ssusb = dev_get_drvdata(dev);
470 dev_dbg(dev, "%s\n", __func__);
472 /* REVISIT: disconnect it for only device mode? */
476 ssusb_host_disable(ssusb, true);
477 ssusb_phy_power_off(ssusb);
478 ssusb_clks_disable(ssusb);
479 ssusb_wakeup_set(ssusb, true);
484 static int __maybe_unused mtu3_resume(struct device *dev)
486 struct ssusb_mtk *ssusb = dev_get_drvdata(dev);
489 dev_dbg(dev, "%s\n", __func__);
494 ssusb_wakeup_set(ssusb, false);
495 ret = ssusb_clks_enable(ssusb);
499 ret = ssusb_phy_power_on(ssusb);
503 ssusb_host_enable(ssusb);
508 ssusb_clks_disable(ssusb);
513 static const struct dev_pm_ops mtu3_pm_ops = {
514 SET_SYSTEM_SLEEP_PM_OPS(mtu3_suspend, mtu3_resume)
517 #define DEV_PM_OPS (IS_ENABLED(CONFIG_PM) ? &mtu3_pm_ops : NULL)
521 static const struct of_device_id mtu3_of_match[] = {
522 {.compatible = "mediatek,mt8173-mtu3",},
523 {.compatible = "mediatek,mtu3",},
527 MODULE_DEVICE_TABLE(of, mtu3_of_match);
531 static struct platform_driver mtu3_driver = {
533 .remove = mtu3_remove,
535 .name = MTU3_DRIVER_NAME,
537 .of_match_table = of_match_ptr(mtu3_of_match),
540 module_platform_driver(mtu3_driver);
543 MODULE_LICENSE("GPL v2");
544 MODULE_DESCRIPTION("MediaTek USB3 DRD Controller Driver");