drivers/infiniband/hw/qib/qib_init.c

   1 /*
   2  * Copyright (c) 2012, 2013 Intel Corporation.  All rights reserved.
   3  * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
   4  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   5  *
   6  * This software is available to you under a choice of one of two
   7  * licenses.  You may choose to be licensed under the terms of the GNU
   8  * General Public License (GPL) Version 2, available from the file
   9  * COPYING in the main directory of this source tree, or the
  10  * OpenIB.org BSD license below:
  11  *
  12  *     Redistribution and use in source and binary forms, with or
  13  *     without modification, are permitted provided that the following
  14  *     conditions are met:
  15  *
  16  *      - Redistributions of source code must retain the above
  17  *        copyright notice, this list of conditions and the following
  18  *        disclaimer.
  19  *
  20  *      - Redistributions in binary form must reproduce the above
  21  *        copyright notice, this list of conditions and the following
  22  *        disclaimer in the documentation and/or other materials
  23  *        provided with the distribution.
  24  *
  25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32  * SOFTWARE.
  33  */
  34
  35 #include <linux/pci.h>
  36 #include <linux/netdevice.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/delay.h>
  39 #include <linux/idr.h>
  40 #include <linux/module.h>
  41 #include <linux/printk.h>
  42 #ifdef CONFIG_INFINIBAND_QIB_DCA
  43 #include <linux/dca.h>
  44 #endif
  45 #include <rdma/rdma_vt.h>
  46
  47 #include "qib.h"
  48 #include "qib_common.h"
  49 #include "qib_mad.h"
  50 #ifdef CONFIG_DEBUG_FS
  51 #include "qib_debugfs.h"
  52 #include "qib_verbs.h"
  53 #endif
  54
  55 #undef pr_fmt
  56 #define pr_fmt(fmt) QIB_DRV_NAME ": " fmt
  57
  58 /*
  59  * min buffers we want to have per context, after driver
  60  */
  61 #define QIB_MIN_USER_CTXT_BUFCNT 7
  62
  63 #define QLOGIC_IB_R_SOFTWARE_MASK 0xFF
  64 #define QLOGIC_IB_R_SOFTWARE_SHIFT 24
  65 #define QLOGIC_IB_R_EMULATOR_MASK (1ULL<<62)
  66
  67 /*
  68  * Number of ctxts we are configured to use (to allow for more pio
  69  * buffers per ctxt, etc.)  Zero means use chip value.
  70  */
  71 ushort qib_cfgctxts;
  72 module_param_named(cfgctxts, qib_cfgctxts, ushort, S_IRUGO);
  73 MODULE_PARM_DESC(cfgctxts, "Set max number of contexts to use");
  74
  75 unsigned qib_numa_aware;
  76 module_param_named(numa_aware, qib_numa_aware, uint, S_IRUGO);
  77 MODULE_PARM_DESC(numa_aware,
  78         "0 -> PSM allocation close to HCA, 1 -> PSM allocation local to process");
  79
  80 /*
  81  * If set, do not write to any regs if avoidable, hack to allow
  82  * check for deranged default register values.
  83  */
  84 ushort qib_mini_init;
  85 module_param_named(mini_init, qib_mini_init, ushort, S_IRUGO);
  86 MODULE_PARM_DESC(mini_init, "If set, do minimal diag init");
  87
  88 unsigned qib_n_krcv_queues;
  89 module_param_named(krcvqs, qib_n_krcv_queues, uint, S_IRUGO);
  90 MODULE_PARM_DESC(krcvqs, "number of kernel receive queues per IB port");
  91
  92 unsigned qib_cc_table_size;
  93 module_param_named(cc_table_size, qib_cc_table_size, uint, S_IRUGO);
  94 MODULE_PARM_DESC(cc_table_size, "Congestion control table entries 0 (CCA disabled - default), min = 128, max = 1984");
  95
  96 static void verify_interrupt(struct timer_list *);
  97
  98 static struct idr qib_unit_table;
  99 u32 qib_cpulist_count;
 100 unsigned long *qib_cpulist;
 101
 102 /* set number of contexts we'll actually use */
 103 void qib_set_ctxtcnt(struct qib_devdata *dd)
 104 {
 105         if (!qib_cfgctxts) {
 106                 dd->cfgctxts = dd->first_user_ctxt + num_online_cpus();
 107                 if (dd->cfgctxts > dd->ctxtcnt)
 108                         dd->cfgctxts = dd->ctxtcnt;
 109         } else if (qib_cfgctxts < dd->num_pports)
 110                 dd->cfgctxts = dd->ctxtcnt;
 111         else if (qib_cfgctxts <= dd->ctxtcnt)
 112                 dd->cfgctxts = qib_cfgctxts;
 113         else
 114                 dd->cfgctxts = dd->ctxtcnt;
 115         dd->freectxts = (dd->first_user_ctxt > dd->cfgctxts) ? 0 :
 116                 dd->cfgctxts - dd->first_user_ctxt;
 117 }
 118
 119 /*
 120  * Common code for creating the receive context array.
 121  */
 122 int qib_create_ctxts(struct qib_devdata *dd)
 123 {
 124         unsigned i;
 125         int local_node_id = pcibus_to_node(dd->pcidev->bus);
 126
 127         if (local_node_id < 0)
 128                 local_node_id = numa_node_id();
 129         dd->assigned_node_id = local_node_id;
 130
 131         /*
 132          * Allocate full ctxtcnt array, rather than just cfgctxts, because
 133          * cleanup iterates across all possible ctxts.
 134          */
 135         dd->rcd = kcalloc(dd->ctxtcnt, sizeof(*dd->rcd), GFP_KERNEL);
 136         if (!dd->rcd)
 137                 return -ENOMEM;
 138
 139         /* create (one or more) kctxt */
 140         for (i = 0; i < dd->first_user_ctxt; ++i) {
 141                 struct qib_pportdata *ppd;
 142                 struct qib_ctxtdata *rcd;
 143
 144                 if (dd->skip_kctxt_mask & (1 << i))
 145                         continue;
 146
 147                 ppd = dd->pport + (i % dd->num_pports);
 148
 149                 rcd = qib_create_ctxtdata(ppd, i, dd->assigned_node_id);
 150                 if (!rcd) {
 151                         qib_dev_err(dd,
 152                                 "Unable to allocate ctxtdata for Kernel ctxt, failing\n");
 153                         kfree(dd->rcd);
 154                         dd->rcd = NULL;
 155                         return -ENOMEM;
 156                 }
 157                 rcd->pkeys[0] = QIB_DEFAULT_P_KEY;
 158                 rcd->seq_cnt = 1;
 159         }
 160         return 0;
 161 }
 162
 163 /*
 164  * Common code for user and kernel context setup.
 165  */
 166 struct qib_ctxtdata *qib_create_ctxtdata(struct qib_pportdata *ppd, u32 ctxt,
 167         int node_id)
 168 {
 169         struct qib_devdata *dd = ppd->dd;
 170         struct qib_ctxtdata *rcd;
 171
 172         rcd = kzalloc_node(sizeof(*rcd), GFP_KERNEL, node_id);
 173         if (rcd) {
 174                 INIT_LIST_HEAD(&rcd->qp_wait_list);
 175                 rcd->node_id = node_id;
 176                 rcd->ppd = ppd;
 177                 rcd->dd = dd;
 178                 rcd->cnt = 1;
 179                 rcd->ctxt = ctxt;
 180                 dd->rcd[ctxt] = rcd;
 181 #ifdef CONFIG_DEBUG_FS
 182                 if (ctxt < dd->first_user_ctxt) { /* N/A for PSM contexts */
 183                         rcd->opstats = kzalloc_node(sizeof(*rcd->opstats),
 184                                 GFP_KERNEL, node_id);
 185                         if (!rcd->opstats) {
 186                                 kfree(rcd);
 187                                 qib_dev_err(dd,
 188                                         "Unable to allocate per ctxt stats buffer\n");
 189                                 return NULL;
 190                         }
 191                 }
 192 #endif
 193                 dd->f_init_ctxt(rcd);
 194
 195                 /*
 196                  * To avoid wasting a lot of memory, we allocate 32KB chunks
 197                  * of physically contiguous memory, advance through it until
 198                  * used up and then allocate more.  Of course, we need
 199                  * memory to store those extra pointers, now.  32KB seems to
 200                  * be the most that is "safe" under memory pressure
 201                  * (creating large files and then copying them over
 202                  * NFS while doing lots of MPI jobs).  The OOM killer can
 203                  * get invoked, even though we say we can sleep and this can
 204                  * cause significant system problems....
 205                  */
 206                 rcd->rcvegrbuf_size = 0x8000;
 207                 rcd->rcvegrbufs_perchunk =
 208                         rcd->rcvegrbuf_size / dd->rcvegrbufsize;
 209                 rcd->rcvegrbuf_chunks = (rcd->rcvegrcnt +
 210                         rcd->rcvegrbufs_perchunk - 1) /
 211                         rcd->rcvegrbufs_perchunk;
 212                 BUG_ON(!is_power_of_2(rcd->rcvegrbufs_perchunk));
 213                 rcd->rcvegrbufs_perchunk_shift =
 214                         ilog2(rcd->rcvegrbufs_perchunk);
 215         }
 216         return rcd;
 217 }
 218
 219 /*
 220  * Common code for initializing the physical port structure.
 221  */
 222 int qib_init_pportdata(struct qib_pportdata *ppd, struct qib_devdata *dd,
 223                         u8 hw_pidx, u8 port)
 224 {
 225         int size;
 226
 227         ppd->dd = dd;
 228         ppd->hw_pidx = hw_pidx;
 229         ppd->port = port; /* IB port number, not index */
 230
 231         spin_lock_init(&ppd->sdma_lock);
 232         spin_lock_init(&ppd->lflags_lock);
 233         spin_lock_init(&ppd->cc_shadow_lock);
 234         init_waitqueue_head(&ppd->state_wait);
 235
 236         timer_setup(&ppd->symerr_clear_timer, qib_clear_symerror_on_linkup, 0);
 237
 238         ppd->qib_wq = NULL;
 239         ppd->ibport_data.pmastats =
 240                 alloc_percpu(struct qib_pma_counters);
 241         if (!ppd->ibport_data.pmastats)
 242                 return -ENOMEM;
 243         ppd->ibport_data.rvp.rc_acks = alloc_percpu(u64);
 244         ppd->ibport_data.rvp.rc_qacks = alloc_percpu(u64);
 245         ppd->ibport_data.rvp.rc_delayed_comp = alloc_percpu(u64);
 246         if (!(ppd->ibport_data.rvp.rc_acks) ||
 247             !(ppd->ibport_data.rvp.rc_qacks) ||
 248             !(ppd->ibport_data.rvp.rc_delayed_comp))
 249                 return -ENOMEM;
 250
 251         if (qib_cc_table_size < IB_CCT_MIN_ENTRIES)
 252                 goto bail;
 253
 254         ppd->cc_supported_table_entries = min(max_t(int, qib_cc_table_size,
 255                 IB_CCT_MIN_ENTRIES), IB_CCT_ENTRIES*IB_CC_TABLE_CAP_DEFAULT);
 256
 257         ppd->cc_max_table_entries =
 258                 ppd->cc_supported_table_entries/IB_CCT_ENTRIES;
 259
 260         size = IB_CC_TABLE_CAP_DEFAULT * sizeof(struct ib_cc_table_entry)
 261                 * IB_CCT_ENTRIES;
 262         ppd->ccti_entries = kzalloc(size, GFP_KERNEL);
 263         if (!ppd->ccti_entries)
 264                 goto bail;
 265
 266         size = IB_CC_CCS_ENTRIES * sizeof(struct ib_cc_congestion_entry);
 267         ppd->congestion_entries = kzalloc(size, GFP_KERNEL);
 268         if (!ppd->congestion_entries)
 269                 goto bail_1;
 270
 271         size = sizeof(struct cc_table_shadow);
 272         ppd->ccti_entries_shadow = kzalloc(size, GFP_KERNEL);
 273         if (!ppd->ccti_entries_shadow)
 274                 goto bail_2;
 275
 276         size = sizeof(struct ib_cc_congestion_setting_attr);
 277         ppd->congestion_entries_shadow = kzalloc(size, GFP_KERNEL);
 278         if (!ppd->congestion_entries_shadow)
 279                 goto bail_3;
 280
 281         return 0;
 282
 283 bail_3:
 284         kfree(ppd->ccti_entries_shadow);
 285         ppd->ccti_entries_shadow = NULL;
 286 bail_2:
 287         kfree(ppd->congestion_entries);
 288         ppd->congestion_entries = NULL;
 289 bail_1:
 290         kfree(ppd->ccti_entries);
 291         ppd->ccti_entries = NULL;
 292 bail:
 293         /* User is intentionally disabling the congestion control agent */
 294         if (!qib_cc_table_size)
 295                 return 0;
 296
 297         if (qib_cc_table_size < IB_CCT_MIN_ENTRIES) {
 298                 qib_cc_table_size = 0;
 299                 qib_dev_err(dd,
 300                  "Congestion Control table size %d less than minimum %d for port %d\n",
 301                  qib_cc_table_size, IB_CCT_MIN_ENTRIES, port);
 302         }
 303
 304         qib_dev_err(dd, "Congestion Control Agent disabled for port %d\n",
 305                 port);
 306         return 0;
 307 }
 308
 309 static int init_pioavailregs(struct qib_devdata *dd)
 310 {
 311         int ret, pidx;
 312         u64 *status_page;
 313
 314         dd->pioavailregs_dma = dma_alloc_coherent(
 315                 &dd->pcidev->dev, PAGE_SIZE, &dd->pioavailregs_phys,
 316                 GFP_KERNEL);
 317         if (!dd->pioavailregs_dma) {
 318                 qib_dev_err(dd,
 319                         "failed to allocate PIOavail reg area in memory\n");
 320                 ret = -ENOMEM;
 321                 goto done;
 322         }
 323
 324         /*
 325          * We really want L2 cache aligned, but for current CPUs of
 326          * interest, they are the same.
 327          */
 328         status_page = (u64 *)
 329                 ((char *) dd->pioavailregs_dma +
 330                  ((2 * L1_CACHE_BYTES +
 331                    dd->pioavregs * sizeof(u64)) & ~L1_CACHE_BYTES));
 332         /* device status comes first, for backwards compatibility */
 333         dd->devstatusp = status_page;
 334         *status_page++ = 0;
 335         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 336                 dd->pport[pidx].statusp = status_page;
 337                 *status_page++ = 0;
 338         }
 339
 340         /*
 341          * Setup buffer to hold freeze and other messages, accessible to
 342          * apps, following statusp.  This is per-unit, not per port.
 343          */
 344         dd->freezemsg = (char *) status_page;
 345         *dd->freezemsg = 0;
 346         /* length of msg buffer is "whatever is left" */
 347         ret = (char *) status_page - (char *) dd->pioavailregs_dma;
 348         dd->freezelen = PAGE_SIZE - ret;
 349
 350         ret = 0;
 351
 352 done:
 353         return ret;
 354 }
 355
 356 /**
 357  * init_shadow_tids - allocate the shadow TID array
 358  * @dd: the qlogic_ib device
 359  *
 360  * allocate the shadow TID array, so we can qib_munlock previous
 361  * entries.  It may make more sense to move the pageshadow to the
 362  * ctxt data structure, so we only allocate memory for ctxts actually
 363  * in use, since we at 8k per ctxt, now.
 364  * We don't want failures here to prevent use of the driver/chip,
 365  * so no return value.
 366  */
 367 static void init_shadow_tids(struct qib_devdata *dd)
 368 {
 369         struct page **pages;
 370         dma_addr_t *addrs;
 371
 372         pages = vzalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(struct page *));
 373         if (!pages)
 374                 goto bail;
 375
 376         addrs = vzalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(dma_addr_t));
 377         if (!addrs)
 378                 goto bail_free;
 379
 380         dd->pageshadow = pages;
 381         dd->physshadow = addrs;
 382         return;
 383
 384 bail_free:
 385         vfree(pages);
 386 bail:
 387         dd->pageshadow = NULL;
 388 }
 389
 390 /*
 391  * Do initialization for device that is only needed on
 392  * first detect, not on resets.
 393  */
 394 static int loadtime_init(struct qib_devdata *dd)
 395 {
 396         int ret = 0;
 397
 398         if (((dd->revision >> QLOGIC_IB_R_SOFTWARE_SHIFT) &
 399              QLOGIC_IB_R_SOFTWARE_MASK) != QIB_CHIP_SWVERSION) {
 400                 qib_dev_err(dd,
 401                         "Driver only handles version %d, chip swversion is %d (%llx), failing\n",
 402                         QIB_CHIP_SWVERSION,
 403                         (int)(dd->revision >>
 404                                 QLOGIC_IB_R_SOFTWARE_SHIFT) &
 405                                 QLOGIC_IB_R_SOFTWARE_MASK,
 406                         (unsigned long long) dd->revision);
 407                 ret = -ENOSYS;
 408                 goto done;
 409         }
 410
 411         if (dd->revision & QLOGIC_IB_R_EMULATOR_MASK)
 412                 qib_devinfo(dd->pcidev, "%s", dd->boardversion);
 413
 414         spin_lock_init(&dd->pioavail_lock);
 415         spin_lock_init(&dd->sendctrl_lock);
 416         spin_lock_init(&dd->uctxt_lock);
 417         spin_lock_init(&dd->qib_diag_trans_lock);
 418         spin_lock_init(&dd->eep_st_lock);
 419         mutex_init(&dd->eep_lock);
 420
 421         if (qib_mini_init)
 422                 goto done;
 423
 424         ret = init_pioavailregs(dd);
 425         init_shadow_tids(dd);
 426
 427         qib_get_eeprom_info(dd);
 428
 429         /* setup time (don't start yet) to verify we got interrupt */
 430         timer_setup(&dd->intrchk_timer, verify_interrupt, 0);
 431 done:
 432         return ret;
 433 }
 434
 435 /**
 436  * init_after_reset - re-initialize after a reset
 437  * @dd: the qlogic_ib device
 438  *
 439  * sanity check at least some of the values after reset, and
 440  * ensure no receive or transmit (explicitly, in case reset
 441  * failed
 442  */
 443 static int init_after_reset(struct qib_devdata *dd)
 444 {
 445         int i;
 446
 447         /*
 448          * Ensure chip does no sends or receives, tail updates, or
 449          * pioavail updates while we re-initialize.  This is mostly
 450          * for the driver data structures, not chip registers.
 451          */
 452         for (i = 0; i < dd->num_pports; ++i) {
 453                 /*
 454                  * ctxt == -1 means "all contexts". Only really safe for
 455                  * _dis_abling things, as here.
 456                  */
 457                 dd->f_rcvctrl(dd->pport + i, QIB_RCVCTRL_CTXT_DIS |
 458                                   QIB_RCVCTRL_INTRAVAIL_DIS |
 459                                   QIB_RCVCTRL_TAILUPD_DIS, -1);
 460                 /* Redundant across ports for some, but no big deal.  */
 461                 dd->f_sendctrl(dd->pport + i, QIB_SENDCTRL_SEND_DIS |
 462                         QIB_SENDCTRL_AVAIL_DIS);
 463         }
 464
 465         return 0;
 466 }
 467
 468 static void enable_chip(struct qib_devdata *dd)
 469 {
 470         u64 rcvmask;
 471         int i;
 472
 473         /*
 474          * Enable PIO send, and update of PIOavail regs to memory.
 475          */
 476         for (i = 0; i < dd->num_pports; ++i)
 477                 dd->f_sendctrl(dd->pport + i, QIB_SENDCTRL_SEND_ENB |
 478                         QIB_SENDCTRL_AVAIL_ENB);
 479         /*
 480          * Enable kernel ctxts' receive and receive interrupt.
 481          * Other ctxts done as user opens and inits them.
 482          */
 483         rcvmask = QIB_RCVCTRL_CTXT_ENB | QIB_RCVCTRL_INTRAVAIL_ENB;
 484         rcvmask |= (dd->flags & QIB_NODMA_RTAIL) ?
 485                   QIB_RCVCTRL_TAILUPD_DIS : QIB_RCVCTRL_TAILUPD_ENB;
 486         for (i = 0; dd->rcd && i < dd->first_user_ctxt; ++i) {
 487                 struct qib_ctxtdata *rcd = dd->rcd[i];
 488
 489                 if (rcd)
 490                         dd->f_rcvctrl(rcd->ppd, rcvmask, i);
 491         }
 492 }
 493
 494 static void verify_interrupt(struct timer_list *t)
 495 {
 496         struct qib_devdata *dd = from_timer(dd, t, intrchk_timer);
 497         u64 int_counter;
 498
 499         if (!dd)
 500                 return; /* being torn down */
 501
 502         /*
 503          * If we don't have a lid or any interrupts, let the user know and
 504          * don't bother checking again.
 505          */
 506         int_counter = qib_int_counter(dd) - dd->z_int_counter;
 507         if (int_counter == 0) {
 508                 if (!dd->f_intr_fallback(dd))
 509                         dev_err(&dd->pcidev->dev,
 510                                 "No interrupts detected, not usable.\n");
 511                 else /* re-arm the timer to see if fallback works */
 512                         mod_timer(&dd->intrchk_timer, jiffies + HZ/2);
 513         }
 514 }
 515
 516 static void init_piobuf_state(struct qib_devdata *dd)
 517 {
 518         int i, pidx;
 519         u32 uctxts;
 520
 521         /*
 522          * Ensure all buffers are free, and fifos empty.  Buffers
 523          * are common, so only do once for port 0.
 524          *
 525          * After enable and qib_chg_pioavailkernel so we can safely
 526          * enable pioavail updates and PIOENABLE.  After this, packets
 527          * are ready and able to go out.
 528          */
 529         dd->f_sendctrl(dd->pport, QIB_SENDCTRL_DISARM_ALL);
 530         for (pidx = 0; pidx < dd->num_pports; ++pidx)
 531                 dd->f_sendctrl(dd->pport + pidx, QIB_SENDCTRL_FLUSH);
 532
 533         /*
 534          * If not all sendbufs are used, add the one to each of the lower
 535          * numbered contexts.  pbufsctxt and lastctxt_piobuf are
 536          * calculated in chip-specific code because it may cause some
 537          * chip-specific adjustments to be made.
 538          */
 539         uctxts = dd->cfgctxts - dd->first_user_ctxt;
 540         dd->ctxts_extrabuf = dd->pbufsctxt ?
 541                 dd->lastctxt_piobuf - (dd->pbufsctxt * uctxts) : 0;
 542
 543         /*
 544          * Set up the shadow copies of the piobufavail registers,
 545          * which we compare against the chip registers for now, and
 546          * the in memory DMA'ed copies of the registers.
 547          * By now pioavail updates to memory should have occurred, so
 548          * copy them into our working/shadow registers; this is in
 549          * case something went wrong with abort, but mostly to get the
 550          * initial values of the generation bit correct.
 551          */
 552         for (i = 0; i < dd->pioavregs; i++) {
 553                 __le64 tmp;
 554
 555                 tmp = dd->pioavailregs_dma[i];
 556                 /*
 557                  * Don't need to worry about pioavailkernel here
 558                  * because we will call qib_chg_pioavailkernel() later
 559                  * in initialization, to busy out buffers as needed.
 560                  */
 561                 dd->pioavailshadow[i] = le64_to_cpu(tmp);
 562         }
 563         while (i < ARRAY_SIZE(dd->pioavailshadow))
 564                 dd->pioavailshadow[i++] = 0; /* for debugging sanity */
 565
 566         /* after pioavailshadow is setup */
 567         qib_chg_pioavailkernel(dd, 0, dd->piobcnt2k + dd->piobcnt4k,
 568                                TXCHK_CHG_TYPE_KERN, NULL);
 569         dd->f_initvl15_bufs(dd);
 570 }
 571
 572 /**
 573  * qib_create_workqueues - create per port workqueues
 574  * @dd: the qlogic_ib device
 575  */
 576 static int qib_create_workqueues(struct qib_devdata *dd)
 577 {
 578         int pidx;
 579         struct qib_pportdata *ppd;
 580
 581         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 582                 ppd = dd->pport + pidx;
 583                 if (!ppd->qib_wq) {
 584                         char wq_name[8]; /* 3 + 2 + 1 + 1 + 1 */
 585
 586                         snprintf(wq_name, sizeof(wq_name), "qib%d_%d",
 587                                 dd->unit, pidx);
 588                         ppd->qib_wq = alloc_ordered_workqueue(wq_name,
 589                                                               WQ_MEM_RECLAIM);
 590                         if (!ppd->qib_wq)
 591                                 goto wq_error;
 592                 }
 593         }
 594         return 0;
 595 wq_error:
 596         pr_err("create_singlethread_workqueue failed for port %d\n",
 597                 pidx + 1);
 598         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 599                 ppd = dd->pport + pidx;
 600                 if (ppd->qib_wq) {
 601                         destroy_workqueue(ppd->qib_wq);
 602                         ppd->qib_wq = NULL;
 603                 }
 604         }
 605         return -ENOMEM;
 606 }
 607
 608 static void qib_free_pportdata(struct qib_pportdata *ppd)
 609 {
 610         free_percpu(ppd->ibport_data.pmastats);
 611         free_percpu(ppd->ibport_data.rvp.rc_acks);
 612         free_percpu(ppd->ibport_data.rvp.rc_qacks);
 613         free_percpu(ppd->ibport_data.rvp.rc_delayed_comp);
 614         ppd->ibport_data.pmastats = NULL;
 615 }
 616
 617 /**
 618  * qib_init - do the actual initialization sequence on the chip
 619  * @dd: the qlogic_ib device
 620  * @reinit: reinitializing, so don't allocate new memory
 621  *
 622  * Do the actual initialization sequence on the chip.  This is done
 623  * both from the init routine called from the PCI infrastructure, and
 624  * when we reset the chip, or detect that it was reset internally,
 625  * or it's administratively re-enabled.
 626  *
 627  * Memory allocation here and in called routines is only done in
 628  * the first case (reinit == 0).  We have to be careful, because even
 629  * without memory allocation, we need to re-write all the chip registers
 630  * TIDs, etc. after the reset or enable has completed.
 631  */
 632 int qib_init(struct qib_devdata *dd, int reinit)
 633 {
 634         int ret = 0, pidx, lastfail = 0;
 635         u32 portok = 0;
 636         unsigned i;
 637         struct qib_ctxtdata *rcd;
 638         struct qib_pportdata *ppd;
 639         unsigned long flags;
 640
 641         /* Set linkstate to unknown, so we can watch for a transition. */
 642         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 643                 ppd = dd->pport + pidx;
 644                 spin_lock_irqsave(&ppd->lflags_lock, flags);
 645                 ppd->lflags &= ~(QIBL_LINKACTIVE | QIBL_LINKARMED |
 646                                  QIBL_LINKDOWN | QIBL_LINKINIT |
 647                                  QIBL_LINKV);
 648                 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
 649         }
 650
 651         if (reinit)
 652                 ret = init_after_reset(dd);
 653         else
 654                 ret = loadtime_init(dd);
 655         if (ret)
 656                 goto done;
 657
 658         /* Bypass most chip-init, to get to device creation */
 659         if (qib_mini_init)
 660                 return 0;
 661
 662         ret = dd->f_late_initreg(dd);
 663         if (ret)
 664                 goto done;
 665
 666         /* dd->rcd can be NULL if early init failed */
 667         for (i = 0; dd->rcd && i < dd->first_user_ctxt; ++i) {
 668                 /*
 669                  * Set up the (kernel) rcvhdr queue and egr TIDs.  If doing
 670                  * re-init, the simplest way to handle this is to free
 671                  * existing, and re-allocate.
 672                  * Need to re-create rest of ctxt 0 ctxtdata as well.
 673                  */
 674                 rcd = dd->rcd[i];
 675                 if (!rcd)
 676                         continue;
 677
 678                 lastfail = qib_create_rcvhdrq(dd, rcd);
 679                 if (!lastfail)
 680                         lastfail = qib_setup_eagerbufs(rcd);
 681                 if (lastfail) {
 682                         qib_dev_err(dd,
 683                                 "failed to allocate kernel ctxt's rcvhdrq and/or egr bufs\n");
 684                         continue;
 685                 }
 686         }
 687
 688         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 689                 int mtu;
 690
 691                 if (lastfail)
 692                         ret = lastfail;
 693                 ppd = dd->pport + pidx;
 694                 mtu = ib_mtu_enum_to_int(qib_ibmtu);
 695                 if (mtu == -1) {
 696                         mtu = QIB_DEFAULT_MTU;
 697                         qib_ibmtu = 0; /* don't leave invalid value */
 698                 }
 699                 /* set max we can ever have for this driver load */
 700                 ppd->init_ibmaxlen = min(mtu > 2048 ?
 701                                          dd->piosize4k : dd->piosize2k,
 702                                          dd->rcvegrbufsize +
 703                                          (dd->rcvhdrentsize << 2));
 704                 /*
 705                  * Have to initialize ibmaxlen, but this will normally
 706                  * change immediately in qib_set_mtu().
 707                  */
 708                 ppd->ibmaxlen = ppd->init_ibmaxlen;
 709                 qib_set_mtu(ppd, mtu);
 710
 711                 spin_lock_irqsave(&ppd->lflags_lock, flags);
 712                 ppd->lflags |= QIBL_IB_LINK_DISABLED;
 713                 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
 714
 715                 lastfail = dd->f_bringup_serdes(ppd);
 716                 if (lastfail) {
 717                         qib_devinfo(dd->pcidev,
 718                                  "Failed to bringup IB port %u\n", ppd->port);
 719                         lastfail = -ENETDOWN;
 720                         continue;
 721                 }
 722
 723                 portok++;
 724         }
 725
 726         if (!portok) {
 727                 /* none of the ports initialized */
 728                 if (!ret && lastfail)
 729                         ret = lastfail;
 730                 else if (!ret)
 731                         ret = -ENETDOWN;
 732                 /* but continue on, so we can debug cause */
 733         }
 734
 735         enable_chip(dd);
 736
 737         init_piobuf_state(dd);
 738
 739 done:
 740         if (!ret) {
 741                 /* chip is OK for user apps; mark it as initialized */
 742                 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 743                         ppd = dd->pport + pidx;
 744                         /*
 745                          * Set status even if port serdes is not initialized
 746                          * so that diags will work.
 747                          */
 748                         *ppd->statusp |= QIB_STATUS_CHIP_PRESENT |
 749                                 QIB_STATUS_INITTED;
 750                         if (!ppd->link_speed_enabled)
 751                                 continue;
 752                         if (dd->flags & QIB_HAS_SEND_DMA)
 753                                 ret = qib_setup_sdma(ppd);
 754                         timer_setup(&ppd->hol_timer, qib_hol_event, 0);
 755                         ppd->hol_state = QIB_HOL_UP;
 756                 }
 757
 758                 /* now we can enable all interrupts from the chip */
 759                 dd->f_set_intr_state(dd, 1);
 760
 761                 /*
 762                  * Setup to verify we get an interrupt, and fallback
 763                  * to an alternate if necessary and possible.
 764                  */
 765                 mod_timer(&dd->intrchk_timer, jiffies + HZ/2);
 766                 /* start stats retrieval timer */
 767                 mod_timer(&dd->stats_timer, jiffies + HZ * ACTIVITY_TIMER);
 768         }
 769
 770         /* if ret is non-zero, we probably should do some cleanup here... */
 771         return ret;
 772 }
 773
 774 /*
 775  * These next two routines are placeholders in case we don't have per-arch
 776  * code for controlling write combining.  If explicit control of write
 777  * combining is not available, performance will probably be awful.
 778  */
 779
 780 int __attribute__((weak)) qib_enable_wc(struct qib_devdata *dd)
 781 {
 782         return -EOPNOTSUPP;
 783 }
 784
 785 void __attribute__((weak)) qib_disable_wc(struct qib_devdata *dd)
 786 {
 787 }
 788
 789 static inline struct qib_devdata *__qib_lookup(int unit)
 790 {
 791         return idr_find(&qib_unit_table, unit);
 792 }
 793
 794 struct qib_devdata *qib_lookup(int unit)
 795 {
 796         struct qib_devdata *dd;
 797         unsigned long flags;
 798
 799         spin_lock_irqsave(&qib_devs_lock, flags);
 800         dd = __qib_lookup(unit);
 801         spin_unlock_irqrestore(&qib_devs_lock, flags);
 802
 803         return dd;
 804 }
 805
 806 /*
 807  * Stop the timers during unit shutdown, or after an error late
 808  * in initialization.
 809  */
 810 static void qib_stop_timers(struct qib_devdata *dd)
 811 {
 812         struct qib_pportdata *ppd;
 813         int pidx;
 814
 815         if (dd->stats_timer.function)
 816                 del_timer_sync(&dd->stats_timer);
 817         if (dd->intrchk_timer.function)
 818                 del_timer_sync(&dd->intrchk_timer);
 819         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 820                 ppd = dd->pport + pidx;
 821                 if (ppd->hol_timer.function)
 822                         del_timer_sync(&ppd->hol_timer);
 823                 if (ppd->led_override_timer.function) {
 824                         del_timer_sync(&ppd->led_override_timer);
 825                         atomic_set(&ppd->led_override_timer_active, 0);
 826                 }
 827                 if (ppd->symerr_clear_timer.function)
 828                         del_timer_sync(&ppd->symerr_clear_timer);
 829         }
 830 }
 831
 832 /**
 833  * qib_shutdown_device - shut down a device
 834  * @dd: the qlogic_ib device
 835  *
 836  * This is called to make the device quiet when we are about to
 837  * unload the driver, and also when the device is administratively
 838  * disabled.   It does not free any data structures.
 839  * Everything it does has to be setup again by qib_init(dd, 1)
 840  */
 841 static void qib_shutdown_device(struct qib_devdata *dd)
 842 {
 843         struct qib_pportdata *ppd;
 844         unsigned pidx;
 845
 846         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 847                 ppd = dd->pport + pidx;
 848
 849                 spin_lock_irq(&ppd->lflags_lock);
 850                 ppd->lflags &= ~(QIBL_LINKDOWN | QIBL_LINKINIT |
 851                                  QIBL_LINKARMED | QIBL_LINKACTIVE |
 852                                  QIBL_LINKV);
 853                 spin_unlock_irq(&ppd->lflags_lock);
 854                 *ppd->statusp &= ~(QIB_STATUS_IB_CONF | QIB_STATUS_IB_READY);
 855         }
 856         dd->flags &= ~QIB_INITTED;
 857
 858         /* mask interrupts, but not errors */
 859         dd->f_set_intr_state(dd, 0);
 860
 861         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 862                 ppd = dd->pport + pidx;
 863                 dd->f_rcvctrl(ppd, QIB_RCVCTRL_TAILUPD_DIS |
 864                                    QIB_RCVCTRL_CTXT_DIS |
 865                                    QIB_RCVCTRL_INTRAVAIL_DIS |
 866                                    QIB_RCVCTRL_PKEY_ENB, -1);
 867                 /*
 868                  * Gracefully stop all sends allowing any in progress to
 869                  * trickle out first.
 870                  */
 871                 dd->f_sendctrl(ppd, QIB_SENDCTRL_CLEAR);
 872         }
 873
 874         /*
 875          * Enough for anything that's going to trickle out to have actually
 876          * done so.
 877          */
 878         udelay(20);
 879
 880         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
 881                 ppd = dd->pport + pidx;
 882                 dd->f_setextled(ppd, 0); /* make sure LEDs are off */
 883
 884                 if (dd->flags & QIB_HAS_SEND_DMA)
 885                         qib_teardown_sdma(ppd);
 886
 887                 dd->f_sendctrl(ppd, QIB_SENDCTRL_AVAIL_DIS |
 888                                     QIB_SENDCTRL_SEND_DIS);
 889                 /*
 890                  * Clear SerdesEnable.
 891                  * We can't count on interrupts since we are stopping.
 892                  */
 893                 dd->f_quiet_serdes(ppd);
 894
 895                 if (ppd->qib_wq) {
 896                         destroy_workqueue(ppd->qib_wq);
 897                         ppd->qib_wq = NULL;
 898                 }
 899                 qib_free_pportdata(ppd);
 900         }
 901
 902 }
 903
 904 /**
 905  * qib_free_ctxtdata - free a context's allocated data
 906  * @dd: the qlogic_ib device
 907  * @rcd: the ctxtdata structure
 908  *
 909  * free up any allocated data for a context
 910  * This should not touch anything that would affect a simultaneous
 911  * re-allocation of context data, because it is called after qib_mutex
 912  * is released (and can be called from reinit as well).
 913  * It should never change any chip state, or global driver state.
 914  */
 915 void qib_free_ctxtdata(struct qib_devdata *dd, struct qib_ctxtdata *rcd)
 916 {
 917         if (!rcd)
 918                 return;
 919
 920         if (rcd->rcvhdrq) {
 921                 dma_free_coherent(&dd->pcidev->dev, rcd->rcvhdrq_size,
 922                                   rcd->rcvhdrq, rcd->rcvhdrq_phys);
 923                 rcd->rcvhdrq = NULL;
 924                 if (rcd->rcvhdrtail_kvaddr) {
 925                         dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
 926                                           rcd->rcvhdrtail_kvaddr,
 927                                           rcd->rcvhdrqtailaddr_phys);
 928                         rcd->rcvhdrtail_kvaddr = NULL;
 929                 }
 930         }
 931         if (rcd->rcvegrbuf) {
 932                 unsigned e;
 933
 934                 for (e = 0; e < rcd->rcvegrbuf_chunks; e++) {
 935                         void *base = rcd->rcvegrbuf[e];
 936                         size_t size = rcd->rcvegrbuf_size;
 937
 938                         dma_free_coherent(&dd->pcidev->dev, size,
 939                                           base, rcd->rcvegrbuf_phys[e]);
 940                 }
 941                 kfree(rcd->rcvegrbuf);
 942                 rcd->rcvegrbuf = NULL;
 943                 kfree(rcd->rcvegrbuf_phys);
 944                 rcd->rcvegrbuf_phys = NULL;
 945                 rcd->rcvegrbuf_chunks = 0;
 946         }
 947
 948         kfree(rcd->tid_pg_list);
 949         vfree(rcd->user_event_mask);
 950         vfree(rcd->subctxt_uregbase);
 951         vfree(rcd->subctxt_rcvegrbuf);
 952         vfree(rcd->subctxt_rcvhdr_base);
 953 #ifdef CONFIG_DEBUG_FS
 954         kfree(rcd->opstats);
 955         rcd->opstats = NULL;
 956 #endif
 957         kfree(rcd);
 958 }
 959
 960 /*
 961  * Perform a PIO buffer bandwidth write test, to verify proper system
 962  * configuration.  Even when all the setup calls work, occasionally
 963  * BIOS or other issues can prevent write combining from working, or
 964  * can cause other bandwidth problems to the chip.
 965  *
 966  * This test simply writes the same buffer over and over again, and
 967  * measures close to the peak bandwidth to the chip (not testing
 968  * data bandwidth to the wire).   On chips that use an address-based
 969  * trigger to send packets to the wire, this is easy.  On chips that
 970  * use a count to trigger, we want to make sure that the packet doesn't
 971  * go out on the wire, or trigger flow control checks.
 972  */
 973 static void qib_verify_pioperf(struct qib_devdata *dd)
 974 {
 975         u32 pbnum, cnt, lcnt;
 976         u32 __iomem *piobuf;
 977         u32 *addr;
 978         u64 msecs, emsecs;
 979
 980         piobuf = dd->f_getsendbuf(dd->pport, 0ULL, &pbnum);
 981         if (!piobuf) {
 982                 qib_devinfo(dd->pcidev,
 983                          "No PIObufs for checking perf, skipping\n");
 984                 return;
 985         }
 986
 987         /*
 988          * Enough to give us a reasonable test, less than piobuf size, and
 989          * likely multiple of store buffer length.
 990          */
 991         cnt = 1024;
 992
 993         addr = vmalloc(cnt);
 994         if (!addr)
 995                 goto done;
 996
 997         preempt_disable();  /* we want reasonably accurate elapsed time */
 998         msecs = 1 + jiffies_to_msecs(jiffies);
 999         for (lcnt = 0; lcnt < 10000U; lcnt++) {
1000                 /* wait until we cross msec boundary */
1001                 if (jiffies_to_msecs(jiffies) >= msecs)
1002                         break;
1003                 udelay(1);
1004         }
1005
1006         dd->f_set_armlaunch(dd, 0);
1007
1008         /*
1009          * length 0, no dwords actually sent
1010          */
1011         writeq(0, piobuf);
1012         qib_flush_wc();
1013
1014         /*
1015          * This is only roughly accurate, since even with preempt we
1016          * still take interrupts that could take a while.   Running for
1017          * >= 5 msec seems to get us "close enough" to accurate values.
1018          */
1019         msecs = jiffies_to_msecs(jiffies);
1020         for (emsecs = lcnt = 0; emsecs <= 5UL; lcnt++) {
1021                 qib_pio_copy(piobuf + 64, addr, cnt >> 2);
1022                 emsecs = jiffies_to_msecs(jiffies) - msecs;
1023         }
1024
1025         /* 1 GiB/sec, slightly over IB SDR line rate */
1026         if (lcnt < (emsecs * 1024U))
1027                 qib_dev_err(dd,
1028                             "Performance problem: bandwidth to PIO buffers is only %u MiB/sec\n",
1029                             lcnt / (u32) emsecs);
1030
1031         preempt_enable();
1032
1033         vfree(addr);
1034
1035 done:
1036         /* disarm piobuf, so it's available again */
1037         dd->f_sendctrl(dd->pport, QIB_SENDCTRL_DISARM_BUF(pbnum));
1038         qib_sendbuf_done(dd, pbnum);
1039         dd->f_set_armlaunch(dd, 1);
1040 }
1041
1042 void qib_free_devdata(struct qib_devdata *dd)
1043 {
1044         unsigned long flags;
1045
1046         spin_lock_irqsave(&qib_devs_lock, flags);
1047         idr_remove(&qib_unit_table, dd->unit);
1048         list_del(&dd->list);
1049         spin_unlock_irqrestore(&qib_devs_lock, flags);
1050
1051 #ifdef CONFIG_DEBUG_FS
1052         qib_dbg_ibdev_exit(&dd->verbs_dev);
1053 #endif
1054         free_percpu(dd->int_counter);
1055         rvt_dealloc_device(&dd->verbs_dev.rdi);
1056 }
1057
1058 u64 qib_int_counter(struct qib_devdata *dd)
1059 {
1060         int cpu;
1061         u64 int_counter = 0;
1062
1063         for_each_possible_cpu(cpu)
1064                 int_counter += *per_cpu_ptr(dd->int_counter, cpu);
1065         return int_counter;
1066 }
1067
1068 u64 qib_sps_ints(void)
1069 {
1070         unsigned long flags;
1071         struct qib_devdata *dd;
1072         u64 sps_ints = 0;
1073
1074         spin_lock_irqsave(&qib_devs_lock, flags);
1075         list_for_each_entry(dd, &qib_dev_list, list) {
1076                 sps_ints += qib_int_counter(dd);
1077         }
1078         spin_unlock_irqrestore(&qib_devs_lock, flags);
1079         return sps_ints;
1080 }
1081
1082 /*
1083  * Allocate our primary per-unit data structure.  Must be done via verbs
1084  * allocator, because the verbs cleanup process both does cleanup and
1085  * free of the data structure.
1086  * "extra" is for chip-specific data.
1087  *
1088  * Use the idr mechanism to get a unit number for this unit.
1089  */
1090 struct qib_devdata *qib_alloc_devdata(struct pci_dev *pdev, size_t extra)
1091 {
1092         unsigned long flags;
1093         struct qib_devdata *dd;
1094         int ret, nports;
1095
1096         /* extra is * number of ports */
1097         nports = extra / sizeof(struct qib_pportdata);
1098         dd = (struct qib_devdata *)rvt_alloc_device(sizeof(*dd) + extra,
1099                                                     nports);
1100         if (!dd)
1101                 return ERR_PTR(-ENOMEM);
1102
1103         INIT_LIST_HEAD(&dd->list);
1104
1105         idr_preload(GFP_KERNEL);
1106         spin_lock_irqsave(&qib_devs_lock, flags);
1107
1108         ret = idr_alloc(&qib_unit_table, dd, 0, 0, GFP_NOWAIT);
1109         if (ret >= 0) {
1110                 dd->unit = ret;
1111                 list_add(&dd->list, &qib_dev_list);
1112         }
1113
1114         spin_unlock_irqrestore(&qib_devs_lock, flags);
1115         idr_preload_end();
1116
1117         if (ret < 0) {
1118                 qib_early_err(&pdev->dev,
1119                               "Could not allocate unit ID: error %d\n", -ret);
1120                 goto bail;
1121         }
1122         dd->int_counter = alloc_percpu(u64);
1123         if (!dd->int_counter) {
1124                 ret = -ENOMEM;
1125                 qib_early_err(&pdev->dev,
1126                               "Could not allocate per-cpu int_counter\n");
1127                 goto bail;
1128         }
1129
1130         if (!qib_cpulist_count) {
1131                 u32 count = num_online_cpus();
1132
1133                 qib_cpulist = kzalloc(BITS_TO_LONGS(count) *
1134                                       sizeof(long), GFP_KERNEL);
1135                 if (qib_cpulist)
1136                         qib_cpulist_count = count;
1137         }
1138 #ifdef CONFIG_DEBUG_FS
1139         qib_dbg_ibdev_init(&dd->verbs_dev);
1140 #endif
1141         return dd;
1142 bail:
1143         if (!list_empty(&dd->list))
1144                 list_del_init(&dd->list);
1145         rvt_dealloc_device(&dd->verbs_dev.rdi);
1146         return ERR_PTR(ret);
1147 }
1148
1149 /*
1150  * Called from freeze mode handlers, and from PCI error
1151  * reporting code.  Should be paranoid about state of
1152  * system and data structures.
1153  */
1154 void qib_disable_after_error(struct qib_devdata *dd)
1155 {
1156         if (dd->flags & QIB_INITTED) {
1157                 u32 pidx;
1158
1159                 dd->flags &= ~QIB_INITTED;
1160                 if (dd->pport)
1161                         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1162                                 struct qib_pportdata *ppd;
1163
1164                                 ppd = dd->pport + pidx;
1165                                 if (dd->flags & QIB_PRESENT) {
1166                                         qib_set_linkstate(ppd,
1167                                                 QIB_IB_LINKDOWN_DISABLE);
1168                                         dd->f_setextled(ppd, 0);
1169                                 }
1170                                 *ppd->statusp &= ~QIB_STATUS_IB_READY;
1171                         }
1172         }
1173
1174         /*
1175          * Mark as having had an error for driver, and also
1176          * for /sys and status word mapped to user programs.
1177          * This marks unit as not usable, until reset.
1178          */
1179         if (dd->devstatusp)
1180                 *dd->devstatusp |= QIB_STATUS_HWERROR;
1181 }
1182
1183 static void qib_remove_one(struct pci_dev *);
1184 static int qib_init_one(struct pci_dev *, const struct pci_device_id *);
1185
1186 #define DRIVER_LOAD_MSG "Intel " QIB_DRV_NAME " loaded: "
1187 #define PFX QIB_DRV_NAME ": "
1188
1189 static const struct pci_device_id qib_pci_tbl[] = {
1190         { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_QLOGIC_IB_6120) },
1191         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_IB_7220) },
1192         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_IB_7322) },
1193         { 0, }
1194 };
1195
1196 MODULE_DEVICE_TABLE(pci, qib_pci_tbl);
1197
1198 static struct pci_driver qib_driver = {
1199         .name = QIB_DRV_NAME,
1200         .probe = qib_init_one,
1201         .remove = qib_remove_one,
1202         .id_table = qib_pci_tbl,
1203         .err_handler = &qib_pci_err_handler,
1204 };
1205
1206 #ifdef CONFIG_INFINIBAND_QIB_DCA
1207
1208 static int qib_notify_dca(struct notifier_block *, unsigned long, void *);
1209 static struct notifier_block dca_notifier = {
1210         .notifier_call  = qib_notify_dca,
1211         .next           = NULL,
1212         .priority       = 0
1213 };
1214
1215 static int qib_notify_dca_device(struct device *device, void *data)
1216 {
1217         struct qib_devdata *dd = dev_get_drvdata(device);
1218         unsigned long event = *(unsigned long *)data;
1219
1220         return dd->f_notify_dca(dd, event);
1221 }
1222
1223 static int qib_notify_dca(struct notifier_block *nb, unsigned long event,
1224                                           void *p)
1225 {
1226         int rval;
1227
1228         rval = driver_for_each_device(&qib_driver.driver, NULL,
1229                                       &event, qib_notify_dca_device);
1230         return rval ? NOTIFY_BAD : NOTIFY_DONE;
1231 }
1232
1233 #endif
1234
1235 /*
1236  * Do all the generic driver unit- and chip-independent memory
1237  * allocation and initialization.
1238  */
1239 static int __init qib_ib_init(void)
1240 {
1241         int ret;
1242
1243         ret = qib_dev_init();
1244         if (ret)
1245                 goto bail;
1246
1247         /*
1248          * These must be called before the driver is registered with
1249          * the PCI subsystem.
1250          */
1251         idr_init(&qib_unit_table);
1252
1253 #ifdef CONFIG_INFINIBAND_QIB_DCA
1254         dca_register_notify(&dca_notifier);
1255 #endif
1256 #ifdef CONFIG_DEBUG_FS
1257         qib_dbg_init();
1258 #endif
1259         ret = pci_register_driver(&qib_driver);
1260         if (ret < 0) {
1261                 pr_err("Unable to register driver: error %d\n", -ret);
1262                 goto bail_dev;
1263         }
1264
1265         /* not fatal if it doesn't work */
1266         if (qib_init_qibfs())
1267                 pr_err("Unable to register ipathfs\n");
1268         goto bail; /* all OK */
1269
1270 bail_dev:
1271 #ifdef CONFIG_INFINIBAND_QIB_DCA
1272         dca_unregister_notify(&dca_notifier);
1273 #endif
1274 #ifdef CONFIG_DEBUG_FS
1275         qib_dbg_exit();
1276 #endif
1277         idr_destroy(&qib_unit_table);
1278         qib_dev_cleanup();
1279 bail:
1280         return ret;
1281 }
1282
1283 module_init(qib_ib_init);
1284
1285 /*
1286  * Do the non-unit driver cleanup, memory free, etc. at unload.
1287  */
1288 static void __exit qib_ib_cleanup(void)
1289 {
1290         int ret;
1291
1292         ret = qib_exit_qibfs();
1293         if (ret)
1294                 pr_err(
1295                         "Unable to cleanup counter filesystem: error %d\n",
1296                         -ret);
1297
1298 #ifdef CONFIG_INFINIBAND_QIB_DCA
1299         dca_unregister_notify(&dca_notifier);
1300 #endif
1301         pci_unregister_driver(&qib_driver);
1302 #ifdef CONFIG_DEBUG_FS
1303         qib_dbg_exit();
1304 #endif
1305
1306         qib_cpulist_count = 0;
1307         kfree(qib_cpulist);
1308
1309         idr_destroy(&qib_unit_table);
1310         qib_dev_cleanup();
1311 }
1312
1313 module_exit(qib_ib_cleanup);
1314
1315 /* this can only be called after a successful initialization */
1316 static void cleanup_device_data(struct qib_devdata *dd)
1317 {
1318         int ctxt;
1319         int pidx;
1320         struct qib_ctxtdata **tmp;
1321         unsigned long flags;
1322
1323         /* users can't do anything more with chip */
1324         for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1325                 if (dd->pport[pidx].statusp)
1326                         *dd->pport[pidx].statusp &= ~QIB_STATUS_CHIP_PRESENT;
1327
1328                 spin_lock(&dd->pport[pidx].cc_shadow_lock);
1329
1330                 kfree(dd->pport[pidx].congestion_entries);
1331                 dd->pport[pidx].congestion_entries = NULL;
1332                 kfree(dd->pport[pidx].ccti_entries);
1333                 dd->pport[pidx].ccti_entries = NULL;
1334                 kfree(dd->pport[pidx].ccti_entries_shadow);
1335                 dd->pport[pidx].ccti_entries_shadow = NULL;
1336                 kfree(dd->pport[pidx].congestion_entries_shadow);
1337                 dd->pport[pidx].congestion_entries_shadow = NULL;
1338
1339                 spin_unlock(&dd->pport[pidx].cc_shadow_lock);
1340         }
1341
1342         qib_disable_wc(dd);
1343
1344         if (dd->pioavailregs_dma) {
1345                 dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
1346                                   (void *) dd->pioavailregs_dma,
1347                                   dd->pioavailregs_phys);
1348                 dd->pioavailregs_dma = NULL;
1349         }
1350
1351         if (dd->pageshadow) {
1352                 struct page **tmpp = dd->pageshadow;
1353                 dma_addr_t *tmpd = dd->physshadow;
1354                 int i;
1355
1356                 for (ctxt = 0; ctxt < dd->cfgctxts; ctxt++) {
1357                         int ctxt_tidbase = ctxt * dd->rcvtidcnt;
1358                         int maxtid = ctxt_tidbase + dd->rcvtidcnt;
1359
1360                         for (i = ctxt_tidbase; i < maxtid; i++) {
1361                                 if (!tmpp[i])
1362                                         continue;
1363                                 pci_unmap_page(dd->pcidev, tmpd[i],
1364                                                PAGE_SIZE, PCI_DMA_FROMDEVICE);
1365                                 qib_release_user_pages(&tmpp[i], 1);
1366                                 tmpp[i] = NULL;
1367                         }
1368                 }
1369
1370                 dd->pageshadow = NULL;
1371                 vfree(tmpp);
1372                 dd->physshadow = NULL;
1373                 vfree(tmpd);
1374         }
1375
1376         /*
1377          * Free any resources still in use (usually just kernel contexts)
1378          * at unload; we do for ctxtcnt, because that's what we allocate.
1379          * We acquire lock to be really paranoid that rcd isn't being
1380          * accessed from some interrupt-related code (that should not happen,
1381          * but best to be sure).
1382          */
1383         spin_lock_irqsave(&dd->uctxt_lock, flags);
1384         tmp = dd->rcd;
1385         dd->rcd = NULL;
1386         spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1387         for (ctxt = 0; tmp && ctxt < dd->ctxtcnt; ctxt++) {
1388                 struct qib_ctxtdata *rcd = tmp[ctxt];
1389
1390                 tmp[ctxt] = NULL; /* debugging paranoia */
1391                 qib_free_ctxtdata(dd, rcd);
1392         }
1393         kfree(tmp);
1394 }
1395
1396 /*
1397  * Clean up on unit shutdown, or error during unit load after
1398  * successful initialization.
1399  */
1400 static void qib_postinit_cleanup(struct qib_devdata *dd)
1401 {
1402         /*
1403          * Clean up chip-specific stuff.
1404          * We check for NULL here, because it's outside
1405          * the kregbase check, and we need to call it
1406          * after the free_irq.  Thus it's possible that
1407          * the function pointers were never initialized.
1408          */
1409         if (dd->f_cleanup)
1410                 dd->f_cleanup(dd);
1411
1412         qib_pcie_ddcleanup(dd);
1413
1414         cleanup_device_data(dd);
1415
1416         qib_free_devdata(dd);
1417 }
1418
1419 static int qib_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1420 {
1421         int ret, j, pidx, initfail;
1422         struct qib_devdata *dd = NULL;
1423
1424         ret = qib_pcie_init(pdev, ent);
1425         if (ret)
1426                 goto bail;
1427
1428         /*
1429          * Do device-specific initialiation, function table setup, dd
1430          * allocation, etc.
1431          */
1432         switch (ent->device) {
1433         case PCI_DEVICE_ID_QLOGIC_IB_6120:
1434 #ifdef CONFIG_PCI_MSI
1435                 dd = qib_init_iba6120_funcs(pdev, ent);
1436 #else
1437                 qib_early_err(&pdev->dev,
1438                         "Intel PCIE device 0x%x cannot work if CONFIG_PCI_MSI is not enabled\n",
1439                         ent->device);
1440                 dd = ERR_PTR(-ENODEV);
1441 #endif
1442                 break;
1443
1444         case PCI_DEVICE_ID_QLOGIC_IB_7220:
1445                 dd = qib_init_iba7220_funcs(pdev, ent);
1446                 break;
1447
1448         case PCI_DEVICE_ID_QLOGIC_IB_7322:
1449                 dd = qib_init_iba7322_funcs(pdev, ent);
1450                 break;
1451
1452         default:
1453                 qib_early_err(&pdev->dev,
1454                         "Failing on unknown Intel deviceid 0x%x\n",
1455                         ent->device);
1456                 ret = -ENODEV;
1457         }
1458
1459         if (IS_ERR(dd))
1460                 ret = PTR_ERR(dd);
1461         if (ret)
1462                 goto bail; /* error already printed */
1463
1464         ret = qib_create_workqueues(dd);
1465         if (ret)
1466                 goto bail;
1467
1468         /* do the generic initialization */
1469         initfail = qib_init(dd, 0);
1470
1471         ret = qib_register_ib_device(dd);
1472
1473         /*
1474          * Now ready for use.  this should be cleared whenever we
1475          * detect a reset, or initiate one.  If earlier failure,
1476          * we still create devices, so diags, etc. can be used
1477          * to determine cause of problem.
1478          */
1479         if (!qib_mini_init && !initfail && !ret)
1480                 dd->flags |= QIB_INITTED;
1481
1482         j = qib_device_create(dd);
1483         if (j)
1484                 qib_dev_err(dd, "Failed to create /dev devices: %d\n", -j);
1485         j = qibfs_add(dd);
1486         if (j)
1487                 qib_dev_err(dd, "Failed filesystem setup for counters: %d\n",
1488                             -j);
1489
1490         if (qib_mini_init || initfail || ret) {
1491                 qib_stop_timers(dd);
1492                 flush_workqueue(ib_wq);
1493                 for (pidx = 0; pidx < dd->num_pports; ++pidx)
1494                         dd->f_quiet_serdes(dd->pport + pidx);
1495                 if (qib_mini_init)
1496                         goto bail;
1497                 if (!j) {
1498                         (void) qibfs_remove(dd);
1499                         qib_device_remove(dd);
1500                 }
1501                 if (!ret)
1502                         qib_unregister_ib_device(dd);
1503                 qib_postinit_cleanup(dd);
1504                 if (initfail)
1505                         ret = initfail;
1506                 goto bail;
1507         }
1508
1509         ret = qib_enable_wc(dd);
1510         if (ret) {
1511                 qib_dev_err(dd,
1512                         "Write combining not enabled (err %d): performance may be poor\n",
1513                         -ret);
1514                 ret = 0;
1515         }
1516
1517         qib_verify_pioperf(dd);
1518 bail:
1519         return ret;
1520 }
1521
1522 static void qib_remove_one(struct pci_dev *pdev)
1523 {
1524         struct qib_devdata *dd = pci_get_drvdata(pdev);
1525         int ret;
1526
1527         /* unregister from IB core */
1528         qib_unregister_ib_device(dd);
1529
1530         /*
1531          * Disable the IB link, disable interrupts on the device,
1532          * clear dma engines, etc.
1533          */
1534         if (!qib_mini_init)
1535                 qib_shutdown_device(dd);
1536
1537         qib_stop_timers(dd);
1538
1539         /* wait until all of our (qsfp) queue_work() calls complete */
1540         flush_workqueue(ib_wq);
1541
1542         ret = qibfs_remove(dd);
1543         if (ret)
1544                 qib_dev_err(dd, "Failed counters filesystem cleanup: %d\n",
1545                             -ret);
1546
1547         qib_device_remove(dd);
1548
1549         qib_postinit_cleanup(dd);
1550 }
1551
1552 /**
1553  * qib_create_rcvhdrq - create a receive header queue
1554  * @dd: the qlogic_ib device
1555  * @rcd: the context data
1556  *
1557  * This must be contiguous memory (from an i/o perspective), and must be
1558  * DMA'able (which means for some systems, it will go through an IOMMU,
1559  * or be forced into a low address range).
1560  */
1561 int qib_create_rcvhdrq(struct qib_devdata *dd, struct qib_ctxtdata *rcd)
1562 {
1563         unsigned amt;
1564         int old_node_id;
1565
1566         if (!rcd->rcvhdrq) {
1567                 dma_addr_t phys_hdrqtail;
1568                 gfp_t gfp_flags;
1569
1570                 amt = ALIGN(dd->rcvhdrcnt * dd->rcvhdrentsize *
1571                             sizeof(u32), PAGE_SIZE);
1572                 gfp_flags = (rcd->ctxt >= dd->first_user_ctxt) ?
1573                         GFP_USER : GFP_KERNEL;
1574
1575                 old_node_id = dev_to_node(&dd->pcidev->dev);
1576                 set_dev_node(&dd->pcidev->dev, rcd->node_id);
1577                 rcd->rcvhdrq = dma_alloc_coherent(
1578                         &dd->pcidev->dev, amt, &rcd->rcvhdrq_phys,
1579                         gfp_flags | __GFP_COMP);
1580                 set_dev_node(&dd->pcidev->dev, old_node_id);
1581
1582                 if (!rcd->rcvhdrq) {
1583                         qib_dev_err(dd,
1584                                 "attempt to allocate %d bytes for ctxt %u rcvhdrq failed\n",
1585                                 amt, rcd->ctxt);
1586                         goto bail;
1587                 }
1588
1589                 if (rcd->ctxt >= dd->first_user_ctxt) {
1590                         rcd->user_event_mask = vmalloc_user(PAGE_SIZE);
1591                         if (!rcd->user_event_mask)
1592                                 goto bail_free_hdrq;
1593                 }
1594
1595                 if (!(dd->flags & QIB_NODMA_RTAIL)) {
1596                         set_dev_node(&dd->pcidev->dev, rcd->node_id);
1597                         rcd->rcvhdrtail_kvaddr = dma_alloc_coherent(
1598                                 &dd->pcidev->dev, PAGE_SIZE, &phys_hdrqtail,
1599                                 gfp_flags);
1600                         set_dev_node(&dd->pcidev->dev, old_node_id);
1601                         if (!rcd->rcvhdrtail_kvaddr)
1602                                 goto bail_free;
1603                         rcd->rcvhdrqtailaddr_phys = phys_hdrqtail;
1604                 }
1605
1606                 rcd->rcvhdrq_size = amt;
1607         }
1608
1609         /* clear for security and sanity on each use */
1610         memset(rcd->rcvhdrq, 0, rcd->rcvhdrq_size);
1611         if (rcd->rcvhdrtail_kvaddr)
1612                 memset(rcd->rcvhdrtail_kvaddr, 0, PAGE_SIZE);
1613         return 0;
1614
1615 bail_free:
1616         qib_dev_err(dd,
1617                 "attempt to allocate 1 page for ctxt %u rcvhdrqtailaddr failed\n",
1618                 rcd->ctxt);
1619         vfree(rcd->user_event_mask);
1620         rcd->user_event_mask = NULL;
1621 bail_free_hdrq:
1622         dma_free_coherent(&dd->pcidev->dev, amt, rcd->rcvhdrq,
1623                           rcd->rcvhdrq_phys);
1624         rcd->rcvhdrq = NULL;
1625 bail:
1626         return -ENOMEM;
1627 }
1628
1629 /**
1630  * allocate eager buffers, both kernel and user contexts.
1631  * @rcd: the context we are setting up.
1632  *
1633  * Allocate the eager TID buffers and program them into hip.
1634  * They are no longer completely contiguous, we do multiple allocation
1635  * calls.  Otherwise we get the OOM code involved, by asking for too
1636  * much per call, with disastrous results on some kernels.
1637  */
1638 int qib_setup_eagerbufs(struct qib_ctxtdata *rcd)
1639 {
1640         struct qib_devdata *dd = rcd->dd;
1641         unsigned e, egrcnt, egrperchunk, chunk, egrsize, egroff;
1642         size_t size;
1643         gfp_t gfp_flags;
1644         int old_node_id;
1645
1646         /*
1647          * GFP_USER, but without GFP_FS, so buffer cache can be
1648          * coalesced (we hope); otherwise, even at order 4,
1649          * heavy filesystem activity makes these fail, and we can
1650          * use compound pages.
1651          */
1652         gfp_flags = __GFP_RECLAIM | __GFP_IO | __GFP_COMP;
1653
1654         egrcnt = rcd->rcvegrcnt;
1655         egroff = rcd->rcvegr_tid_base;
1656         egrsize = dd->rcvegrbufsize;
1657
1658         chunk = rcd->rcvegrbuf_chunks;
1659         egrperchunk = rcd->rcvegrbufs_perchunk;
1660         size = rcd->rcvegrbuf_size;
1661         if (!rcd->rcvegrbuf) {
1662                 rcd->rcvegrbuf =
1663                         kzalloc_node(chunk * sizeof(rcd->rcvegrbuf[0]),
1664                                 GFP_KERNEL, rcd->node_id);
1665                 if (!rcd->rcvegrbuf)
1666                         goto bail;
1667         }
1668         if (!rcd->rcvegrbuf_phys) {
1669                 rcd->rcvegrbuf_phys =
1670                         kmalloc_array_node(chunk,
1671                                            sizeof(rcd->rcvegrbuf_phys[0]),
1672                                            GFP_KERNEL, rcd->node_id);
1673                 if (!rcd->rcvegrbuf_phys)
1674                         goto bail_rcvegrbuf;
1675         }
1676         for (e = 0; e < rcd->rcvegrbuf_chunks; e++) {
1677                 if (rcd->rcvegrbuf[e])
1678                         continue;
1679
1680                 old_node_id = dev_to_node(&dd->pcidev->dev);
1681                 set_dev_node(&dd->pcidev->dev, rcd->node_id);
1682                 rcd->rcvegrbuf[e] =
1683                         dma_alloc_coherent(&dd->pcidev->dev, size,
1684                                            &rcd->rcvegrbuf_phys[e],
1685                                            gfp_flags);
1686                 set_dev_node(&dd->pcidev->dev, old_node_id);
1687                 if (!rcd->rcvegrbuf[e])
1688                         goto bail_rcvegrbuf_phys;
1689         }
1690
1691         rcd->rcvegr_phys = rcd->rcvegrbuf_phys[0];
1692
1693         for (e = chunk = 0; chunk < rcd->rcvegrbuf_chunks; chunk++) {
1694                 dma_addr_t pa = rcd->rcvegrbuf_phys[chunk];
1695                 unsigned i;
1696
1697                 /* clear for security and sanity on each use */
1698                 memset(rcd->rcvegrbuf[chunk], 0, size);
1699
1700                 for (i = 0; e < egrcnt && i < egrperchunk; e++, i++) {
1701                         dd->f_put_tid(dd, e + egroff +
1702                                           (u64 __iomem *)
1703                                           ((char __iomem *)
1704                                            dd->kregbase +
1705                                            dd->rcvegrbase),
1706                                           RCVHQ_RCV_TYPE_EAGER, pa);
1707                         pa += egrsize;
1708                 }
1709                 cond_resched(); /* don't hog the cpu */
1710         }
1711
1712         return 0;
1713
1714 bail_rcvegrbuf_phys:
1715         for (e = 0; e < rcd->rcvegrbuf_chunks && rcd->rcvegrbuf[e]; e++)
1716                 dma_free_coherent(&dd->pcidev->dev, size,
1717                                   rcd->rcvegrbuf[e], rcd->rcvegrbuf_phys[e]);
1718         kfree(rcd->rcvegrbuf_phys);
1719         rcd->rcvegrbuf_phys = NULL;
1720 bail_rcvegrbuf:
1721         kfree(rcd->rcvegrbuf);
1722         rcd->rcvegrbuf = NULL;
1723 bail:
1724         return -ENOMEM;
1725 }
1726
1727 /*
1728  * Note: Changes to this routine should be mirrored
1729  * for the diagnostics routine qib_remap_ioaddr32().
1730  * There is also related code for VL15 buffers in qib_init_7322_variables().
1731  * The teardown code that unmaps is in qib_pcie_ddcleanup()
1732  */
1733 int init_chip_wc_pat(struct qib_devdata *dd, u32 vl15buflen)
1734 {
1735         u64 __iomem *qib_kregbase = NULL;
1736         void __iomem *qib_piobase = NULL;
1737         u64 __iomem *qib_userbase = NULL;
1738         u64 qib_kreglen;
1739         u64 qib_pio2koffset = dd->piobufbase & 0xffffffff;
1740         u64 qib_pio4koffset = dd->piobufbase >> 32;
1741         u64 qib_pio2klen = dd->piobcnt2k * dd->palign;
1742         u64 qib_pio4klen = dd->piobcnt4k * dd->align4k;
1743         u64 qib_physaddr = dd->physaddr;
1744         u64 qib_piolen;
1745         u64 qib_userlen = 0;
1746
1747         /*
1748          * Free the old mapping because the kernel will try to reuse the
1749          * old mapping and not create a new mapping with the
1750          * write combining attribute.
1751          */
1752         iounmap(dd->kregbase);
1753         dd->kregbase = NULL;
1754
1755         /*
1756          * Assumes chip address space looks like:
1757          *      - kregs + sregs + cregs + uregs (in any order)
1758          *      - piobufs (2K and 4K bufs in either order)
1759          * or:
1760          *      - kregs + sregs + cregs (in any order)
1761          *      - piobufs (2K and 4K bufs in either order)
1762          *      - uregs
1763          */
1764         if (dd->piobcnt4k == 0) {
1765                 qib_kreglen = qib_pio2koffset;
1766                 qib_piolen = qib_pio2klen;
1767         } else if (qib_pio2koffset < qib_pio4koffset) {
1768                 qib_kreglen = qib_pio2koffset;
1769                 qib_piolen = qib_pio4koffset + qib_pio4klen - qib_kreglen;
1770         } else {
1771                 qib_kreglen = qib_pio4koffset;
1772                 qib_piolen = qib_pio2koffset + qib_pio2klen - qib_kreglen;
1773         }
1774         qib_piolen += vl15buflen;
1775         /* Map just the configured ports (not all hw ports) */
1776         if (dd->uregbase > qib_kreglen)
1777                 qib_userlen = dd->ureg_align * dd->cfgctxts;
1778
1779         /* Sanity checks passed, now create the new mappings */
1780         qib_kregbase = ioremap_nocache(qib_physaddr, qib_kreglen);
1781         if (!qib_kregbase)
1782                 goto bail;
1783
1784         qib_piobase = ioremap_wc(qib_physaddr + qib_kreglen, qib_piolen);
1785         if (!qib_piobase)
1786                 goto bail_kregbase;
1787
1788         if (qib_userlen) {
1789                 qib_userbase = ioremap_nocache(qib_physaddr + dd->uregbase,
1790                                                qib_userlen);
1791                 if (!qib_userbase)
1792                         goto bail_piobase;
1793         }
1794
1795         dd->kregbase = qib_kregbase;
1796         dd->kregend = (u64 __iomem *)
1797                 ((char __iomem *) qib_kregbase + qib_kreglen);
1798         dd->piobase = qib_piobase;
1799         dd->pio2kbase = (void __iomem *)
1800                 (((char __iomem *) dd->piobase) +
1801                  qib_pio2koffset - qib_kreglen);
1802         if (dd->piobcnt4k)
1803                 dd->pio4kbase = (void __iomem *)
1804                         (((char __iomem *) dd->piobase) +
1805                          qib_pio4koffset - qib_kreglen);
1806         if (qib_userlen)
1807                 /* ureg will now be accessed relative to dd->userbase */
1808                 dd->userbase = qib_userbase;
1809         return 0;
1810
1811 bail_piobase:
1812         iounmap(qib_piobase);
1813 bail_kregbase:
1814         iounmap(qib_kregbase);
1815 bail:
1816         return -ENOMEM;
1817 }