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Merge tag 'ceph-for-4.15-rc1' of git://github.com/ceph/ceph-client
[linux.git] / drivers / infiniband / hw / qib / qib_file_ops.c
1 /*
2  * Copyright (c) 2012, 2013 Intel Corporation. All rights reserved.
3  * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
4  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
5  *
6  * This software is available to you under a choice of one of two
7  * licenses.  You may choose to be licensed under the terms of the GNU
8  * General Public License (GPL) Version 2, available from the file
9  * COPYING in the main directory of this source tree, or the
10  * OpenIB.org BSD license below:
11  *
12  *     Redistribution and use in source and binary forms, with or
13  *     without modification, are permitted provided that the following
14  *     conditions are met:
15  *
16  *      - Redistributions of source code must retain the above
17  *        copyright notice, this list of conditions and the following
18  *        disclaimer.
19  *
20  *      - Redistributions in binary form must reproduce the above
21  *        copyright notice, this list of conditions and the following
22  *        disclaimer in the documentation and/or other materials
23  *        provided with the distribution.
24  *
25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32  * SOFTWARE.
33  */
34
35 #include <linux/pci.h>
36 #include <linux/poll.h>
37 #include <linux/cdev.h>
38 #include <linux/swap.h>
39 #include <linux/vmalloc.h>
40 #include <linux/highmem.h>
41 #include <linux/io.h>
42 #include <linux/jiffies.h>
43 #include <asm/pgtable.h>
44 #include <linux/delay.h>
45 #include <linux/export.h>
46 #include <linux/uio.h>
47
48 #include <rdma/ib.h>
49
50 #include "qib.h"
51 #include "qib_common.h"
52 #include "qib_user_sdma.h"
53
54 #undef pr_fmt
55 #define pr_fmt(fmt) QIB_DRV_NAME ": " fmt
56
57 static int qib_open(struct inode *, struct file *);
58 static int qib_close(struct inode *, struct file *);
59 static ssize_t qib_write(struct file *, const char __user *, size_t, loff_t *);
60 static ssize_t qib_write_iter(struct kiocb *, struct iov_iter *);
61 static unsigned int qib_poll(struct file *, struct poll_table_struct *);
62 static int qib_mmapf(struct file *, struct vm_area_struct *);
63
64 /*
65  * This is really, really weird shit - write() and writev() here
66  * have completely unrelated semantics.  Sucky userland ABI,
67  * film at 11.
68  */
69 static const struct file_operations qib_file_ops = {
70         .owner = THIS_MODULE,
71         .write = qib_write,
72         .write_iter = qib_write_iter,
73         .open = qib_open,
74         .release = qib_close,
75         .poll = qib_poll,
76         .mmap = qib_mmapf,
77         .llseek = noop_llseek,
78 };
79
80 /*
81  * Convert kernel virtual addresses to physical addresses so they don't
82  * potentially conflict with the chip addresses used as mmap offsets.
83  * It doesn't really matter what mmap offset we use as long as we can
84  * interpret it correctly.
85  */
86 static u64 cvt_kvaddr(void *p)
87 {
88         struct page *page;
89         u64 paddr = 0;
90
91         page = vmalloc_to_page(p);
92         if (page)
93                 paddr = page_to_pfn(page) << PAGE_SHIFT;
94
95         return paddr;
96 }
97
98 static int qib_get_base_info(struct file *fp, void __user *ubase,
99                              size_t ubase_size)
100 {
101         struct qib_ctxtdata *rcd = ctxt_fp(fp);
102         int ret = 0;
103         struct qib_base_info *kinfo = NULL;
104         struct qib_devdata *dd = rcd->dd;
105         struct qib_pportdata *ppd = rcd->ppd;
106         unsigned subctxt_cnt;
107         int shared, master;
108         size_t sz;
109
110         subctxt_cnt = rcd->subctxt_cnt;
111         if (!subctxt_cnt) {
112                 shared = 0;
113                 master = 0;
114                 subctxt_cnt = 1;
115         } else {
116                 shared = 1;
117                 master = !subctxt_fp(fp);
118         }
119
120         sz = sizeof(*kinfo);
121         /* If context sharing is not requested, allow the old size structure */
122         if (!shared)
123                 sz -= 7 * sizeof(u64);
124         if (ubase_size < sz) {
125                 ret = -EINVAL;
126                 goto bail;
127         }
128
129         kinfo = kzalloc(sizeof(*kinfo), GFP_KERNEL);
130         if (kinfo == NULL) {
131                 ret = -ENOMEM;
132                 goto bail;
133         }
134
135         ret = dd->f_get_base_info(rcd, kinfo);
136         if (ret < 0)
137                 goto bail;
138
139         kinfo->spi_rcvhdr_cnt = dd->rcvhdrcnt;
140         kinfo->spi_rcvhdrent_size = dd->rcvhdrentsize;
141         kinfo->spi_tidegrcnt = rcd->rcvegrcnt;
142         kinfo->spi_rcv_egrbufsize = dd->rcvegrbufsize;
143         /*
144          * have to mmap whole thing
145          */
146         kinfo->spi_rcv_egrbuftotlen =
147                 rcd->rcvegrbuf_chunks * rcd->rcvegrbuf_size;
148         kinfo->spi_rcv_egrperchunk = rcd->rcvegrbufs_perchunk;
149         kinfo->spi_rcv_egrchunksize = kinfo->spi_rcv_egrbuftotlen /
150                 rcd->rcvegrbuf_chunks;
151         kinfo->spi_tidcnt = dd->rcvtidcnt / subctxt_cnt;
152         if (master)
153                 kinfo->spi_tidcnt += dd->rcvtidcnt % subctxt_cnt;
154         /*
155          * for this use, may be cfgctxts summed over all chips that
156          * are are configured and present
157          */
158         kinfo->spi_nctxts = dd->cfgctxts;
159         /* unit (chip/board) our context is on */
160         kinfo->spi_unit = dd->unit;
161         kinfo->spi_port = ppd->port;
162         /* for now, only a single page */
163         kinfo->spi_tid_maxsize = PAGE_SIZE;
164
165         /*
166          * Doing this per context, and based on the skip value, etc.  This has
167          * to be the actual buffer size, since the protocol code treats it
168          * as an array.
169          *
170          * These have to be set to user addresses in the user code via mmap.
171          * These values are used on return to user code for the mmap target
172          * addresses only.  For 32 bit, same 44 bit address problem, so use
173          * the physical address, not virtual.  Before 2.6.11, using the
174          * page_address() macro worked, but in 2.6.11, even that returns the
175          * full 64 bit address (upper bits all 1's).  So far, using the
176          * physical addresses (or chip offsets, for chip mapping) works, but
177          * no doubt some future kernel release will change that, and we'll be
178          * on to yet another method of dealing with this.
179          * Normally only one of rcvhdr_tailaddr or rhf_offset is useful
180          * since the chips with non-zero rhf_offset don't normally
181          * enable tail register updates to host memory, but for testing,
182          * both can be enabled and used.
183          */
184         kinfo->spi_rcvhdr_base = (u64) rcd->rcvhdrq_phys;
185         kinfo->spi_rcvhdr_tailaddr = (u64) rcd->rcvhdrqtailaddr_phys;
186         kinfo->spi_rhf_offset = dd->rhf_offset;
187         kinfo->spi_rcv_egrbufs = (u64) rcd->rcvegr_phys;
188         kinfo->spi_pioavailaddr = (u64) dd->pioavailregs_phys;
189         /* setup per-unit (not port) status area for user programs */
190         kinfo->spi_status = (u64) kinfo->spi_pioavailaddr +
191                 (char *) ppd->statusp -
192                 (char *) dd->pioavailregs_dma;
193         kinfo->spi_uregbase = (u64) dd->uregbase + dd->ureg_align * rcd->ctxt;
194         if (!shared) {
195                 kinfo->spi_piocnt = rcd->piocnt;
196                 kinfo->spi_piobufbase = (u64) rcd->piobufs;
197                 kinfo->spi_sendbuf_status = cvt_kvaddr(rcd->user_event_mask);
198         } else if (master) {
199                 kinfo->spi_piocnt = (rcd->piocnt / subctxt_cnt) +
200                                     (rcd->piocnt % subctxt_cnt);
201                 /* Master's PIO buffers are after all the slave's */
202                 kinfo->spi_piobufbase = (u64) rcd->piobufs +
203                         dd->palign *
204                         (rcd->piocnt - kinfo->spi_piocnt);
205         } else {
206                 unsigned slave = subctxt_fp(fp) - 1;
207
208                 kinfo->spi_piocnt = rcd->piocnt / subctxt_cnt;
209                 kinfo->spi_piobufbase = (u64) rcd->piobufs +
210                         dd->palign * kinfo->spi_piocnt * slave;
211         }
212
213         if (shared) {
214                 kinfo->spi_sendbuf_status =
215                         cvt_kvaddr(&rcd->user_event_mask[subctxt_fp(fp)]);
216                 /* only spi_subctxt_* fields should be set in this block! */
217                 kinfo->spi_subctxt_uregbase = cvt_kvaddr(rcd->subctxt_uregbase);
218
219                 kinfo->spi_subctxt_rcvegrbuf =
220                         cvt_kvaddr(rcd->subctxt_rcvegrbuf);
221                 kinfo->spi_subctxt_rcvhdr_base =
222                         cvt_kvaddr(rcd->subctxt_rcvhdr_base);
223         }
224
225         /*
226          * All user buffers are 2KB buffers.  If we ever support
227          * giving 4KB buffers to user processes, this will need some
228          * work.  Can't use piobufbase directly, because it has
229          * both 2K and 4K buffer base values.
230          */
231         kinfo->spi_pioindex = (kinfo->spi_piobufbase - dd->pio2k_bufbase) /
232                 dd->palign;
233         kinfo->spi_pioalign = dd->palign;
234         kinfo->spi_qpair = QIB_KD_QP;
235         /*
236          * user mode PIO buffers are always 2KB, even when 4KB can
237          * be received, and sent via the kernel; this is ibmaxlen
238          * for 2K MTU.
239          */
240         kinfo->spi_piosize = dd->piosize2k - 2 * sizeof(u32);
241         kinfo->spi_mtu = ppd->ibmaxlen; /* maxlen, not ibmtu */
242         kinfo->spi_ctxt = rcd->ctxt;
243         kinfo->spi_subctxt = subctxt_fp(fp);
244         kinfo->spi_sw_version = QIB_KERN_SWVERSION;
245         kinfo->spi_sw_version |= 1U << 31; /* QLogic-built, not kernel.org */
246         kinfo->spi_hw_version = dd->revision;
247
248         if (master)
249                 kinfo->spi_runtime_flags |= QIB_RUNTIME_MASTER;
250
251         sz = (ubase_size < sizeof(*kinfo)) ? ubase_size : sizeof(*kinfo);
252         if (copy_to_user(ubase, kinfo, sz))
253                 ret = -EFAULT;
254 bail:
255         kfree(kinfo);
256         return ret;
257 }
258
259 /**
260  * qib_tid_update - update a context TID
261  * @rcd: the context
262  * @fp: the qib device file
263  * @ti: the TID information
264  *
265  * The new implementation as of Oct 2004 is that the driver assigns
266  * the tid and returns it to the caller.   To reduce search time, we
267  * keep a cursor for each context, walking the shadow tid array to find
268  * one that's not in use.
269  *
270  * For now, if we can't allocate the full list, we fail, although
271  * in the long run, we'll allocate as many as we can, and the
272  * caller will deal with that by trying the remaining pages later.
273  * That means that when we fail, we have to mark the tids as not in
274  * use again, in our shadow copy.
275  *
276  * It's up to the caller to free the tids when they are done.
277  * We'll unlock the pages as they free them.
278  *
279  * Also, right now we are locking one page at a time, but since
280  * the intended use of this routine is for a single group of
281  * virtually contiguous pages, that should change to improve
282  * performance.
283  */
284 static int qib_tid_update(struct qib_ctxtdata *rcd, struct file *fp,
285                           const struct qib_tid_info *ti)
286 {
287         int ret = 0, ntids;
288         u32 tid, ctxttid, cnt, i, tidcnt, tidoff;
289         u16 *tidlist;
290         struct qib_devdata *dd = rcd->dd;
291         u64 physaddr;
292         unsigned long vaddr;
293         u64 __iomem *tidbase;
294         unsigned long tidmap[8];
295         struct page **pagep = NULL;
296         unsigned subctxt = subctxt_fp(fp);
297
298         if (!dd->pageshadow) {
299                 ret = -ENOMEM;
300                 goto done;
301         }
302
303         cnt = ti->tidcnt;
304         if (!cnt) {
305                 ret = -EFAULT;
306                 goto done;
307         }
308         ctxttid = rcd->ctxt * dd->rcvtidcnt;
309         if (!rcd->subctxt_cnt) {
310                 tidcnt = dd->rcvtidcnt;
311                 tid = rcd->tidcursor;
312                 tidoff = 0;
313         } else if (!subctxt) {
314                 tidcnt = (dd->rcvtidcnt / rcd->subctxt_cnt) +
315                          (dd->rcvtidcnt % rcd->subctxt_cnt);
316                 tidoff = dd->rcvtidcnt - tidcnt;
317                 ctxttid += tidoff;
318                 tid = tidcursor_fp(fp);
319         } else {
320                 tidcnt = dd->rcvtidcnt / rcd->subctxt_cnt;
321                 tidoff = tidcnt * (subctxt - 1);
322                 ctxttid += tidoff;
323                 tid = tidcursor_fp(fp);
324         }
325         if (cnt > tidcnt) {
326                 /* make sure it all fits in tid_pg_list */
327                 qib_devinfo(dd->pcidev,
328                         "Process tried to allocate %u TIDs, only trying max (%u)\n",
329                         cnt, tidcnt);
330                 cnt = tidcnt;
331         }
332         pagep = (struct page **) rcd->tid_pg_list;
333         tidlist = (u16 *) &pagep[dd->rcvtidcnt];
334         pagep += tidoff;
335         tidlist += tidoff;
336
337         memset(tidmap, 0, sizeof(tidmap));
338         /* before decrement; chip actual # */
339         ntids = tidcnt;
340         tidbase = (u64 __iomem *) (((char __iomem *) dd->kregbase) +
341                                    dd->rcvtidbase +
342                                    ctxttid * sizeof(*tidbase));
343
344         /* virtual address of first page in transfer */
345         vaddr = ti->tidvaddr;
346         if (!access_ok(VERIFY_WRITE, (void __user *) vaddr,
347                        cnt * PAGE_SIZE)) {
348                 ret = -EFAULT;
349                 goto done;
350         }
351         ret = qib_get_user_pages(vaddr, cnt, pagep);
352         if (ret) {
353                 /*
354                  * if (ret == -EBUSY)
355                  * We can't continue because the pagep array won't be
356                  * initialized. This should never happen,
357                  * unless perhaps the user has mpin'ed the pages
358                  * themselves.
359                  */
360                 qib_devinfo(
361                         dd->pcidev,
362                         "Failed to lock addr %p, %u pages: errno %d\n",
363                         (void *) vaddr, cnt, -ret);
364                 goto done;
365         }
366         for (i = 0; i < cnt; i++, vaddr += PAGE_SIZE) {
367                 for (; ntids--; tid++) {
368                         if (tid == tidcnt)
369                                 tid = 0;
370                         if (!dd->pageshadow[ctxttid + tid])
371                                 break;
372                 }
373                 if (ntids < 0) {
374                         /*
375                          * Oops, wrapped all the way through their TIDs,
376                          * and didn't have enough free; see comments at
377                          * start of routine
378                          */
379                         i--;    /* last tidlist[i] not filled in */
380                         ret = -ENOMEM;
381                         break;
382                 }
383                 tidlist[i] = tid + tidoff;
384                 /* we "know" system pages and TID pages are same size */
385                 dd->pageshadow[ctxttid + tid] = pagep[i];
386                 dd->physshadow[ctxttid + tid] =
387                         qib_map_page(dd->pcidev, pagep[i], 0, PAGE_SIZE,
388                                      PCI_DMA_FROMDEVICE);
389                 /*
390                  * don't need atomic or it's overhead
391                  */
392                 __set_bit(tid, tidmap);
393                 physaddr = dd->physshadow[ctxttid + tid];
394                 /* PERFORMANCE: below should almost certainly be cached */
395                 dd->f_put_tid(dd, &tidbase[tid],
396                                   RCVHQ_RCV_TYPE_EXPECTED, physaddr);
397                 /*
398                  * don't check this tid in qib_ctxtshadow, since we
399                  * just filled it in; start with the next one.
400                  */
401                 tid++;
402         }
403
404         if (ret) {
405                 u32 limit;
406 cleanup:
407                 /* jump here if copy out of updated info failed... */
408                 /* same code that's in qib_free_tid() */
409                 limit = sizeof(tidmap) * BITS_PER_BYTE;
410                 if (limit > tidcnt)
411                         /* just in case size changes in future */
412                         limit = tidcnt;
413                 tid = find_first_bit((const unsigned long *)tidmap, limit);
414                 for (; tid < limit; tid++) {
415                         if (!test_bit(tid, tidmap))
416                                 continue;
417                         if (dd->pageshadow[ctxttid + tid]) {
418                                 dma_addr_t phys;
419
420                                 phys = dd->physshadow[ctxttid + tid];
421                                 dd->physshadow[ctxttid + tid] = dd->tidinvalid;
422                                 /* PERFORMANCE: below should almost certainly
423                                  * be cached
424                                  */
425                                 dd->f_put_tid(dd, &tidbase[tid],
426                                               RCVHQ_RCV_TYPE_EXPECTED,
427                                               dd->tidinvalid);
428                                 pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
429                                                PCI_DMA_FROMDEVICE);
430                                 dd->pageshadow[ctxttid + tid] = NULL;
431                         }
432                 }
433                 qib_release_user_pages(pagep, cnt);
434         } else {
435                 /*
436                  * Copy the updated array, with qib_tid's filled in, back
437                  * to user.  Since we did the copy in already, this "should
438                  * never fail" If it does, we have to clean up...
439                  */
440                 if (copy_to_user((void __user *)
441                                  (unsigned long) ti->tidlist,
442                                  tidlist, cnt * sizeof(*tidlist))) {
443                         ret = -EFAULT;
444                         goto cleanup;
445                 }
446                 if (copy_to_user((void __user *) (unsigned long) ti->tidmap,
447                                  tidmap, sizeof(tidmap))) {
448                         ret = -EFAULT;
449                         goto cleanup;
450                 }
451                 if (tid == tidcnt)
452                         tid = 0;
453                 if (!rcd->subctxt_cnt)
454                         rcd->tidcursor = tid;
455                 else
456                         tidcursor_fp(fp) = tid;
457         }
458
459 done:
460         return ret;
461 }
462
463 /**
464  * qib_tid_free - free a context TID
465  * @rcd: the context
466  * @subctxt: the subcontext
467  * @ti: the TID info
468  *
469  * right now we are unlocking one page at a time, but since
470  * the intended use of this routine is for a single group of
471  * virtually contiguous pages, that should change to improve
472  * performance.  We check that the TID is in range for this context
473  * but otherwise don't check validity; if user has an error and
474  * frees the wrong tid, it's only their own data that can thereby
475  * be corrupted.  We do check that the TID was in use, for sanity
476  * We always use our idea of the saved address, not the address that
477  * they pass in to us.
478  */
479 static int qib_tid_free(struct qib_ctxtdata *rcd, unsigned subctxt,
480                         const struct qib_tid_info *ti)
481 {
482         int ret = 0;
483         u32 tid, ctxttid, cnt, limit, tidcnt;
484         struct qib_devdata *dd = rcd->dd;
485         u64 __iomem *tidbase;
486         unsigned long tidmap[8];
487
488         if (!dd->pageshadow) {
489                 ret = -ENOMEM;
490                 goto done;
491         }
492
493         if (copy_from_user(tidmap, (void __user *)(unsigned long)ti->tidmap,
494                            sizeof(tidmap))) {
495                 ret = -EFAULT;
496                 goto done;
497         }
498
499         ctxttid = rcd->ctxt * dd->rcvtidcnt;
500         if (!rcd->subctxt_cnt)
501                 tidcnt = dd->rcvtidcnt;
502         else if (!subctxt) {
503                 tidcnt = (dd->rcvtidcnt / rcd->subctxt_cnt) +
504                          (dd->rcvtidcnt % rcd->subctxt_cnt);
505                 ctxttid += dd->rcvtidcnt - tidcnt;
506         } else {
507                 tidcnt = dd->rcvtidcnt / rcd->subctxt_cnt;
508                 ctxttid += tidcnt * (subctxt - 1);
509         }
510         tidbase = (u64 __iomem *) ((char __iomem *)(dd->kregbase) +
511                                    dd->rcvtidbase +
512                                    ctxttid * sizeof(*tidbase));
513
514         limit = sizeof(tidmap) * BITS_PER_BYTE;
515         if (limit > tidcnt)
516                 /* just in case size changes in future */
517                 limit = tidcnt;
518         tid = find_first_bit(tidmap, limit);
519         for (cnt = 0; tid < limit; tid++) {
520                 /*
521                  * small optimization; if we detect a run of 3 or so without
522                  * any set, use find_first_bit again.  That's mainly to
523                  * accelerate the case where we wrapped, so we have some at
524                  * the beginning, and some at the end, and a big gap
525                  * in the middle.
526                  */
527                 if (!test_bit(tid, tidmap))
528                         continue;
529                 cnt++;
530                 if (dd->pageshadow[ctxttid + tid]) {
531                         struct page *p;
532                         dma_addr_t phys;
533
534                         p = dd->pageshadow[ctxttid + tid];
535                         dd->pageshadow[ctxttid + tid] = NULL;
536                         phys = dd->physshadow[ctxttid + tid];
537                         dd->physshadow[ctxttid + tid] = dd->tidinvalid;
538                         /* PERFORMANCE: below should almost certainly be
539                          * cached
540                          */
541                         dd->f_put_tid(dd, &tidbase[tid],
542                                       RCVHQ_RCV_TYPE_EXPECTED, dd->tidinvalid);
543                         pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
544                                        PCI_DMA_FROMDEVICE);
545                         qib_release_user_pages(&p, 1);
546                 }
547         }
548 done:
549         return ret;
550 }
551
552 /**
553  * qib_set_part_key - set a partition key
554  * @rcd: the context
555  * @key: the key
556  *
557  * We can have up to 4 active at a time (other than the default, which is
558  * always allowed).  This is somewhat tricky, since multiple contexts may set
559  * the same key, so we reference count them, and clean up at exit.  All 4
560  * partition keys are packed into a single qlogic_ib register.  It's an
561  * error for a process to set the same pkey multiple times.  We provide no
562  * mechanism to de-allocate a pkey at this time, we may eventually need to
563  * do that.  I've used the atomic operations, and no locking, and only make
564  * a single pass through what's available.  This should be more than
565  * adequate for some time. I'll think about spinlocks or the like if and as
566  * it's necessary.
567  */
568 static int qib_set_part_key(struct qib_ctxtdata *rcd, u16 key)
569 {
570         struct qib_pportdata *ppd = rcd->ppd;
571         int i, any = 0, pidx = -1;
572         u16 lkey = key & 0x7FFF;
573         int ret;
574
575         if (lkey == (QIB_DEFAULT_P_KEY & 0x7FFF)) {
576                 /* nothing to do; this key always valid */
577                 ret = 0;
578                 goto bail;
579         }
580
581         if (!lkey) {
582                 ret = -EINVAL;
583                 goto bail;
584         }
585
586         /*
587          * Set the full membership bit, because it has to be
588          * set in the register or the packet, and it seems
589          * cleaner to set in the register than to force all
590          * callers to set it.
591          */
592         key |= 0x8000;
593
594         for (i = 0; i < ARRAY_SIZE(rcd->pkeys); i++) {
595                 if (!rcd->pkeys[i] && pidx == -1)
596                         pidx = i;
597                 if (rcd->pkeys[i] == key) {
598                         ret = -EEXIST;
599                         goto bail;
600                 }
601         }
602         if (pidx == -1) {
603                 ret = -EBUSY;
604                 goto bail;
605         }
606         for (any = i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) {
607                 if (!ppd->pkeys[i]) {
608                         any++;
609                         continue;
610                 }
611                 if (ppd->pkeys[i] == key) {
612                         atomic_t *pkrefs = &ppd->pkeyrefs[i];
613
614                         if (atomic_inc_return(pkrefs) > 1) {
615                                 rcd->pkeys[pidx] = key;
616                                 ret = 0;
617                                 goto bail;
618                         } else {
619                                 /*
620                                  * lost race, decrement count, catch below
621                                  */
622                                 atomic_dec(pkrefs);
623                                 any++;
624                         }
625                 }
626                 if ((ppd->pkeys[i] & 0x7FFF) == lkey) {
627                         /*
628                          * It makes no sense to have both the limited and
629                          * full membership PKEY set at the same time since
630                          * the unlimited one will disable the limited one.
631                          */
632                         ret = -EEXIST;
633                         goto bail;
634                 }
635         }
636         if (!any) {
637                 ret = -EBUSY;
638                 goto bail;
639         }
640         for (any = i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) {
641                 if (!ppd->pkeys[i] &&
642                     atomic_inc_return(&ppd->pkeyrefs[i]) == 1) {
643                         rcd->pkeys[pidx] = key;
644                         ppd->pkeys[i] = key;
645                         (void) ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_PKEYS, 0);
646                         ret = 0;
647                         goto bail;
648                 }
649         }
650         ret = -EBUSY;
651
652 bail:
653         return ret;
654 }
655
656 /**
657  * qib_manage_rcvq - manage a context's receive queue
658  * @rcd: the context
659  * @subctxt: the subcontext
660  * @start_stop: action to carry out
661  *
662  * start_stop == 0 disables receive on the context, for use in queue
663  * overflow conditions.  start_stop==1 re-enables, to be used to
664  * re-init the software copy of the head register
665  */
666 static int qib_manage_rcvq(struct qib_ctxtdata *rcd, unsigned subctxt,
667                            int start_stop)
668 {
669         struct qib_devdata *dd = rcd->dd;
670         unsigned int rcvctrl_op;
671
672         if (subctxt)
673                 goto bail;
674         /* atomically clear receive enable ctxt. */
675         if (start_stop) {
676                 /*
677                  * On enable, force in-memory copy of the tail register to
678                  * 0, so that protocol code doesn't have to worry about
679                  * whether or not the chip has yet updated the in-memory
680                  * copy or not on return from the system call. The chip
681                  * always resets it's tail register back to 0 on a
682                  * transition from disabled to enabled.
683                  */
684                 if (rcd->rcvhdrtail_kvaddr)
685                         qib_clear_rcvhdrtail(rcd);
686                 rcvctrl_op = QIB_RCVCTRL_CTXT_ENB;
687         } else
688                 rcvctrl_op = QIB_RCVCTRL_CTXT_DIS;
689         dd->f_rcvctrl(rcd->ppd, rcvctrl_op, rcd->ctxt);
690         /* always; new head should be equal to new tail; see above */
691 bail:
692         return 0;
693 }
694
695 static void qib_clean_part_key(struct qib_ctxtdata *rcd,
696                                struct qib_devdata *dd)
697 {
698         int i, j, pchanged = 0;
699         struct qib_pportdata *ppd = rcd->ppd;
700
701         for (i = 0; i < ARRAY_SIZE(rcd->pkeys); i++) {
702                 if (!rcd->pkeys[i])
703                         continue;
704                 for (j = 0; j < ARRAY_SIZE(ppd->pkeys); j++) {
705                         /* check for match independent of the global bit */
706                         if ((ppd->pkeys[j] & 0x7fff) !=
707                             (rcd->pkeys[i] & 0x7fff))
708                                 continue;
709                         if (atomic_dec_and_test(&ppd->pkeyrefs[j])) {
710                                 ppd->pkeys[j] = 0;
711                                 pchanged++;
712                         }
713                         break;
714                 }
715                 rcd->pkeys[i] = 0;
716         }
717         if (pchanged)
718                 (void) ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_PKEYS, 0);
719 }
720
721 /* common code for the mappings on dma_alloc_coherent mem */
722 static int qib_mmap_mem(struct vm_area_struct *vma, struct qib_ctxtdata *rcd,
723                         unsigned len, void *kvaddr, u32 write_ok, char *what)
724 {
725         struct qib_devdata *dd = rcd->dd;
726         unsigned long pfn;
727         int ret;
728
729         if ((vma->vm_end - vma->vm_start) > len) {
730                 qib_devinfo(dd->pcidev,
731                          "FAIL on %s: len %lx > %x\n", what,
732                          vma->vm_end - vma->vm_start, len);
733                 ret = -EFAULT;
734                 goto bail;
735         }
736
737         /*
738          * shared context user code requires rcvhdrq mapped r/w, others
739          * only allowed readonly mapping.
740          */
741         if (!write_ok) {
742                 if (vma->vm_flags & VM_WRITE) {
743                         qib_devinfo(dd->pcidev,
744                                  "%s must be mapped readonly\n", what);
745                         ret = -EPERM;
746                         goto bail;
747                 }
748
749                 /* don't allow them to later change with mprotect */
750                 vma->vm_flags &= ~VM_MAYWRITE;
751         }
752
753         pfn = virt_to_phys(kvaddr) >> PAGE_SHIFT;
754         ret = remap_pfn_range(vma, vma->vm_start, pfn,
755                               len, vma->vm_page_prot);
756         if (ret)
757                 qib_devinfo(dd->pcidev,
758                         "%s ctxt%u mmap of %lx, %x bytes failed: %d\n",
759                         what, rcd->ctxt, pfn, len, ret);
760 bail:
761         return ret;
762 }
763
764 static int mmap_ureg(struct vm_area_struct *vma, struct qib_devdata *dd,
765                      u64 ureg)
766 {
767         unsigned long phys;
768         unsigned long sz;
769         int ret;
770
771         /*
772          * This is real hardware, so use io_remap.  This is the mechanism
773          * for the user process to update the head registers for their ctxt
774          * in the chip.
775          */
776         sz = dd->flags & QIB_HAS_HDRSUPP ? 2 * PAGE_SIZE : PAGE_SIZE;
777         if ((vma->vm_end - vma->vm_start) > sz) {
778                 qib_devinfo(dd->pcidev,
779                         "FAIL mmap userreg: reqlen %lx > PAGE\n",
780                         vma->vm_end - vma->vm_start);
781                 ret = -EFAULT;
782         } else {
783                 phys = dd->physaddr + ureg;
784                 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
785
786                 vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND;
787                 ret = io_remap_pfn_range(vma, vma->vm_start,
788                                          phys >> PAGE_SHIFT,
789                                          vma->vm_end - vma->vm_start,
790                                          vma->vm_page_prot);
791         }
792         return ret;
793 }
794
795 static int mmap_piobufs(struct vm_area_struct *vma,
796                         struct qib_devdata *dd,
797                         struct qib_ctxtdata *rcd,
798                         unsigned piobufs, unsigned piocnt)
799 {
800         unsigned long phys;
801         int ret;
802
803         /*
804          * When we map the PIO buffers in the chip, we want to map them as
805          * writeonly, no read possible; unfortunately, x86 doesn't allow
806          * for this in hardware, but we still prevent users from asking
807          * for it.
808          */
809         if ((vma->vm_end - vma->vm_start) > (piocnt * dd->palign)) {
810                 qib_devinfo(dd->pcidev,
811                         "FAIL mmap piobufs: reqlen %lx > PAGE\n",
812                          vma->vm_end - vma->vm_start);
813                 ret = -EINVAL;
814                 goto bail;
815         }
816
817         phys = dd->physaddr + piobufs;
818
819 #if defined(__powerpc__)
820         vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
821 #endif
822
823         /*
824          * don't allow them to later change to readable with mprotect (for when
825          * not initially mapped readable, as is normally the case)
826          */
827         vma->vm_flags &= ~VM_MAYREAD;
828         vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND;
829
830         /* We used PAT if wc_cookie == 0 */
831         if (!dd->wc_cookie)
832                 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
833
834         ret = io_remap_pfn_range(vma, vma->vm_start, phys >> PAGE_SHIFT,
835                                  vma->vm_end - vma->vm_start,
836                                  vma->vm_page_prot);
837 bail:
838         return ret;
839 }
840
841 static int mmap_rcvegrbufs(struct vm_area_struct *vma,
842                            struct qib_ctxtdata *rcd)
843 {
844         struct qib_devdata *dd = rcd->dd;
845         unsigned long start, size;
846         size_t total_size, i;
847         unsigned long pfn;
848         int ret;
849
850         size = rcd->rcvegrbuf_size;
851         total_size = rcd->rcvegrbuf_chunks * size;
852         if ((vma->vm_end - vma->vm_start) > total_size) {
853                 qib_devinfo(dd->pcidev,
854                         "FAIL on egr bufs: reqlen %lx > actual %lx\n",
855                          vma->vm_end - vma->vm_start,
856                          (unsigned long) total_size);
857                 ret = -EINVAL;
858                 goto bail;
859         }
860
861         if (vma->vm_flags & VM_WRITE) {
862                 qib_devinfo(dd->pcidev,
863                         "Can't map eager buffers as writable (flags=%lx)\n",
864                         vma->vm_flags);
865                 ret = -EPERM;
866                 goto bail;
867         }
868         /* don't allow them to later change to writeable with mprotect */
869         vma->vm_flags &= ~VM_MAYWRITE;
870
871         start = vma->vm_start;
872
873         for (i = 0; i < rcd->rcvegrbuf_chunks; i++, start += size) {
874                 pfn = virt_to_phys(rcd->rcvegrbuf[i]) >> PAGE_SHIFT;
875                 ret = remap_pfn_range(vma, start, pfn, size,
876                                       vma->vm_page_prot);
877                 if (ret < 0)
878                         goto bail;
879         }
880         ret = 0;
881
882 bail:
883         return ret;
884 }
885
886 /*
887  * qib_file_vma_fault - handle a VMA page fault.
888  */
889 static int qib_file_vma_fault(struct vm_fault *vmf)
890 {
891         struct page *page;
892
893         page = vmalloc_to_page((void *)(vmf->pgoff << PAGE_SHIFT));
894         if (!page)
895                 return VM_FAULT_SIGBUS;
896
897         get_page(page);
898         vmf->page = page;
899
900         return 0;
901 }
902
903 static const struct vm_operations_struct qib_file_vm_ops = {
904         .fault = qib_file_vma_fault,
905 };
906
907 static int mmap_kvaddr(struct vm_area_struct *vma, u64 pgaddr,
908                        struct qib_ctxtdata *rcd, unsigned subctxt)
909 {
910         struct qib_devdata *dd = rcd->dd;
911         unsigned subctxt_cnt;
912         unsigned long len;
913         void *addr;
914         size_t size;
915         int ret = 0;
916
917         subctxt_cnt = rcd->subctxt_cnt;
918         size = rcd->rcvegrbuf_chunks * rcd->rcvegrbuf_size;
919
920         /*
921          * Each process has all the subctxt uregbase, rcvhdrq, and
922          * rcvegrbufs mmapped - as an array for all the processes,
923          * and also separately for this process.
924          */
925         if (pgaddr == cvt_kvaddr(rcd->subctxt_uregbase)) {
926                 addr = rcd->subctxt_uregbase;
927                 size = PAGE_SIZE * subctxt_cnt;
928         } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvhdr_base)) {
929                 addr = rcd->subctxt_rcvhdr_base;
930                 size = rcd->rcvhdrq_size * subctxt_cnt;
931         } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvegrbuf)) {
932                 addr = rcd->subctxt_rcvegrbuf;
933                 size *= subctxt_cnt;
934         } else if (pgaddr == cvt_kvaddr(rcd->subctxt_uregbase +
935                                         PAGE_SIZE * subctxt)) {
936                 addr = rcd->subctxt_uregbase + PAGE_SIZE * subctxt;
937                 size = PAGE_SIZE;
938         } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvhdr_base +
939                                         rcd->rcvhdrq_size * subctxt)) {
940                 addr = rcd->subctxt_rcvhdr_base +
941                         rcd->rcvhdrq_size * subctxt;
942                 size = rcd->rcvhdrq_size;
943         } else if (pgaddr == cvt_kvaddr(&rcd->user_event_mask[subctxt])) {
944                 addr = rcd->user_event_mask;
945                 size = PAGE_SIZE;
946         } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvegrbuf +
947                                         size * subctxt)) {
948                 addr = rcd->subctxt_rcvegrbuf + size * subctxt;
949                 /* rcvegrbufs are read-only on the slave */
950                 if (vma->vm_flags & VM_WRITE) {
951                         qib_devinfo(dd->pcidev,
952                                  "Can't map eager buffers as writable (flags=%lx)\n",
953                                  vma->vm_flags);
954                         ret = -EPERM;
955                         goto bail;
956                 }
957                 /*
958                  * Don't allow permission to later change to writeable
959                  * with mprotect.
960                  */
961                 vma->vm_flags &= ~VM_MAYWRITE;
962         } else
963                 goto bail;
964         len = vma->vm_end - vma->vm_start;
965         if (len > size) {
966                 ret = -EINVAL;
967                 goto bail;
968         }
969
970         vma->vm_pgoff = (unsigned long) addr >> PAGE_SHIFT;
971         vma->vm_ops = &qib_file_vm_ops;
972         vma->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP;
973         ret = 1;
974
975 bail:
976         return ret;
977 }
978
979 /**
980  * qib_mmapf - mmap various structures into user space
981  * @fp: the file pointer
982  * @vma: the VM area
983  *
984  * We use this to have a shared buffer between the kernel and the user code
985  * for the rcvhdr queue, egr buffers, and the per-context user regs and pio
986  * buffers in the chip.  We have the open and close entries so we can bump
987  * the ref count and keep the driver from being unloaded while still mapped.
988  */
989 static int qib_mmapf(struct file *fp, struct vm_area_struct *vma)
990 {
991         struct qib_ctxtdata *rcd;
992         struct qib_devdata *dd;
993         u64 pgaddr, ureg;
994         unsigned piobufs, piocnt;
995         int ret, match = 1;
996
997         rcd = ctxt_fp(fp);
998         if (!rcd || !(vma->vm_flags & VM_SHARED)) {
999                 ret = -EINVAL;
1000                 goto bail;
1001         }
1002         dd = rcd->dd;
1003
1004         /*
1005          * This is the qib_do_user_init() code, mapping the shared buffers
1006          * and per-context user registers into the user process. The address
1007          * referred to by vm_pgoff is the file offset passed via mmap().
1008          * For shared contexts, this is the kernel vmalloc() address of the
1009          * pages to share with the master.
1010          * For non-shared or master ctxts, this is a physical address.
1011          * We only do one mmap for each space mapped.
1012          */
1013         pgaddr = vma->vm_pgoff << PAGE_SHIFT;
1014
1015         /*
1016          * Check for 0 in case one of the allocations failed, but user
1017          * called mmap anyway.
1018          */
1019         if (!pgaddr)  {
1020                 ret = -EINVAL;
1021                 goto bail;
1022         }
1023
1024         /*
1025          * Physical addresses must fit in 40 bits for our hardware.
1026          * Check for kernel virtual addresses first, anything else must
1027          * match a HW or memory address.
1028          */
1029         ret = mmap_kvaddr(vma, pgaddr, rcd, subctxt_fp(fp));
1030         if (ret) {
1031                 if (ret > 0)
1032                         ret = 0;
1033                 goto bail;
1034         }
1035
1036         ureg = dd->uregbase + dd->ureg_align * rcd->ctxt;
1037         if (!rcd->subctxt_cnt) {
1038                 /* ctxt is not shared */
1039                 piocnt = rcd->piocnt;
1040                 piobufs = rcd->piobufs;
1041         } else if (!subctxt_fp(fp)) {
1042                 /* caller is the master */
1043                 piocnt = (rcd->piocnt / rcd->subctxt_cnt) +
1044                          (rcd->piocnt % rcd->subctxt_cnt);
1045                 piobufs = rcd->piobufs +
1046                         dd->palign * (rcd->piocnt - piocnt);
1047         } else {
1048                 unsigned slave = subctxt_fp(fp) - 1;
1049
1050                 /* caller is a slave */
1051                 piocnt = rcd->piocnt / rcd->subctxt_cnt;
1052                 piobufs = rcd->piobufs + dd->palign * piocnt * slave;
1053         }
1054
1055         if (pgaddr == ureg)
1056                 ret = mmap_ureg(vma, dd, ureg);
1057         else if (pgaddr == piobufs)
1058                 ret = mmap_piobufs(vma, dd, rcd, piobufs, piocnt);
1059         else if (pgaddr == dd->pioavailregs_phys)
1060                 /* in-memory copy of pioavail registers */
1061                 ret = qib_mmap_mem(vma, rcd, PAGE_SIZE,
1062                                    (void *) dd->pioavailregs_dma, 0,
1063                                    "pioavail registers");
1064         else if (pgaddr == rcd->rcvegr_phys)
1065                 ret = mmap_rcvegrbufs(vma, rcd);
1066         else if (pgaddr == (u64) rcd->rcvhdrq_phys)
1067                 /*
1068                  * The rcvhdrq itself; multiple pages, contiguous
1069                  * from an i/o perspective.  Shared contexts need
1070                  * to map r/w, so we allow writing.
1071                  */
1072                 ret = qib_mmap_mem(vma, rcd, rcd->rcvhdrq_size,
1073                                    rcd->rcvhdrq, 1, "rcvhdrq");
1074         else if (pgaddr == (u64) rcd->rcvhdrqtailaddr_phys)
1075                 /* in-memory copy of rcvhdrq tail register */
1076                 ret = qib_mmap_mem(vma, rcd, PAGE_SIZE,
1077                                    rcd->rcvhdrtail_kvaddr, 0,
1078                                    "rcvhdrq tail");
1079         else
1080                 match = 0;
1081         if (!match)
1082                 ret = -EINVAL;
1083
1084         vma->vm_private_data = NULL;
1085
1086         if (ret < 0)
1087                 qib_devinfo(dd->pcidev,
1088                          "mmap Failure %d: off %llx len %lx\n",
1089                          -ret, (unsigned long long)pgaddr,
1090                          vma->vm_end - vma->vm_start);
1091 bail:
1092         return ret;
1093 }
1094
1095 static unsigned int qib_poll_urgent(struct qib_ctxtdata *rcd,
1096                                     struct file *fp,
1097                                     struct poll_table_struct *pt)
1098 {
1099         struct qib_devdata *dd = rcd->dd;
1100         unsigned pollflag;
1101
1102         poll_wait(fp, &rcd->wait, pt);
1103
1104         spin_lock_irq(&dd->uctxt_lock);
1105         if (rcd->urgent != rcd->urgent_poll) {
1106                 pollflag = POLLIN | POLLRDNORM;
1107                 rcd->urgent_poll = rcd->urgent;
1108         } else {
1109                 pollflag = 0;
1110                 set_bit(QIB_CTXT_WAITING_URG, &rcd->flag);
1111         }
1112         spin_unlock_irq(&dd->uctxt_lock);
1113
1114         return pollflag;
1115 }
1116
1117 static unsigned int qib_poll_next(struct qib_ctxtdata *rcd,
1118                                   struct file *fp,
1119                                   struct poll_table_struct *pt)
1120 {
1121         struct qib_devdata *dd = rcd->dd;
1122         unsigned pollflag;
1123
1124         poll_wait(fp, &rcd->wait, pt);
1125
1126         spin_lock_irq(&dd->uctxt_lock);
1127         if (dd->f_hdrqempty(rcd)) {
1128                 set_bit(QIB_CTXT_WAITING_RCV, &rcd->flag);
1129                 dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_INTRAVAIL_ENB, rcd->ctxt);
1130                 pollflag = 0;
1131         } else
1132                 pollflag = POLLIN | POLLRDNORM;
1133         spin_unlock_irq(&dd->uctxt_lock);
1134
1135         return pollflag;
1136 }
1137
1138 static unsigned int qib_poll(struct file *fp, struct poll_table_struct *pt)
1139 {
1140         struct qib_ctxtdata *rcd;
1141         unsigned pollflag;
1142
1143         rcd = ctxt_fp(fp);
1144         if (!rcd)
1145                 pollflag = POLLERR;
1146         else if (rcd->poll_type == QIB_POLL_TYPE_URGENT)
1147                 pollflag = qib_poll_urgent(rcd, fp, pt);
1148         else  if (rcd->poll_type == QIB_POLL_TYPE_ANYRCV)
1149                 pollflag = qib_poll_next(rcd, fp, pt);
1150         else /* invalid */
1151                 pollflag = POLLERR;
1152
1153         return pollflag;
1154 }
1155
1156 static void assign_ctxt_affinity(struct file *fp, struct qib_devdata *dd)
1157 {
1158         struct qib_filedata *fd = fp->private_data;
1159         const unsigned int weight = cpumask_weight(&current->cpus_allowed);
1160         const struct cpumask *local_mask = cpumask_of_pcibus(dd->pcidev->bus);
1161         int local_cpu;
1162
1163         /*
1164          * If process has NOT already set it's affinity, select and
1165          * reserve a processor for it on the local NUMA node.
1166          */
1167         if ((weight >= qib_cpulist_count) &&
1168                 (cpumask_weight(local_mask) <= qib_cpulist_count)) {
1169                 for_each_cpu(local_cpu, local_mask)
1170                         if (!test_and_set_bit(local_cpu, qib_cpulist)) {
1171                                 fd->rec_cpu_num = local_cpu;
1172                                 return;
1173                         }
1174         }
1175
1176         /*
1177          * If process has NOT already set it's affinity, select and
1178          * reserve a processor for it, as a rendevous for all
1179          * users of the driver.  If they don't actually later
1180          * set affinity to this cpu, or set it to some other cpu,
1181          * it just means that sooner or later we don't recommend
1182          * a cpu, and let the scheduler do it's best.
1183          */
1184         if (weight >= qib_cpulist_count) {
1185                 int cpu;
1186
1187                 cpu = find_first_zero_bit(qib_cpulist,
1188                                           qib_cpulist_count);
1189                 if (cpu == qib_cpulist_count)
1190                         qib_dev_err(dd,
1191                         "no cpus avail for affinity PID %u\n",
1192                         current->pid);
1193                 else {
1194                         __set_bit(cpu, qib_cpulist);
1195                         fd->rec_cpu_num = cpu;
1196                 }
1197         }
1198 }
1199
1200 /*
1201  * Check that userland and driver are compatible for subcontexts.
1202  */
1203 static int qib_compatible_subctxts(int user_swmajor, int user_swminor)
1204 {
1205         /* this code is written long-hand for clarity */
1206         if (QIB_USER_SWMAJOR != user_swmajor) {
1207                 /* no promise of compatibility if major mismatch */
1208                 return 0;
1209         }
1210         if (QIB_USER_SWMAJOR == 1) {
1211                 switch (QIB_USER_SWMINOR) {
1212                 case 0:
1213                 case 1:
1214                 case 2:
1215                         /* no subctxt implementation so cannot be compatible */
1216                         return 0;
1217                 case 3:
1218                         /* 3 is only compatible with itself */
1219                         return user_swminor == 3;
1220                 default:
1221                         /* >= 4 are compatible (or are expected to be) */
1222                         return user_swminor <= QIB_USER_SWMINOR;
1223                 }
1224         }
1225         /* make no promises yet for future major versions */
1226         return 0;
1227 }
1228
1229 static int init_subctxts(struct qib_devdata *dd,
1230                          struct qib_ctxtdata *rcd,
1231                          const struct qib_user_info *uinfo)
1232 {
1233         int ret = 0;
1234         unsigned num_subctxts;
1235         size_t size;
1236
1237         /*
1238          * If the user is requesting zero subctxts,
1239          * skip the subctxt allocation.
1240          */
1241         if (uinfo->spu_subctxt_cnt <= 0)
1242                 goto bail;
1243         num_subctxts = uinfo->spu_subctxt_cnt;
1244
1245         /* Check for subctxt compatibility */
1246         if (!qib_compatible_subctxts(uinfo->spu_userversion >> 16,
1247                 uinfo->spu_userversion & 0xffff)) {
1248                 qib_devinfo(dd->pcidev,
1249                          "Mismatched user version (%d.%d) and driver version (%d.%d) while context sharing. Ensure that driver and library are from the same release.\n",
1250                          (int) (uinfo->spu_userversion >> 16),
1251                          (int) (uinfo->spu_userversion & 0xffff),
1252                          QIB_USER_SWMAJOR, QIB_USER_SWMINOR);
1253                 goto bail;
1254         }
1255         if (num_subctxts > QLOGIC_IB_MAX_SUBCTXT) {
1256                 ret = -EINVAL;
1257                 goto bail;
1258         }
1259
1260         rcd->subctxt_uregbase = vmalloc_user(PAGE_SIZE * num_subctxts);
1261         if (!rcd->subctxt_uregbase) {
1262                 ret = -ENOMEM;
1263                 goto bail;
1264         }
1265         /* Note: rcd->rcvhdrq_size isn't initialized yet. */
1266         size = ALIGN(dd->rcvhdrcnt * dd->rcvhdrentsize *
1267                      sizeof(u32), PAGE_SIZE) * num_subctxts;
1268         rcd->subctxt_rcvhdr_base = vmalloc_user(size);
1269         if (!rcd->subctxt_rcvhdr_base) {
1270                 ret = -ENOMEM;
1271                 goto bail_ureg;
1272         }
1273
1274         rcd->subctxt_rcvegrbuf = vmalloc_user(rcd->rcvegrbuf_chunks *
1275                                               rcd->rcvegrbuf_size *
1276                                               num_subctxts);
1277         if (!rcd->subctxt_rcvegrbuf) {
1278                 ret = -ENOMEM;
1279                 goto bail_rhdr;
1280         }
1281
1282         rcd->subctxt_cnt = uinfo->spu_subctxt_cnt;
1283         rcd->subctxt_id = uinfo->spu_subctxt_id;
1284         rcd->active_slaves = 1;
1285         rcd->redirect_seq_cnt = 1;
1286         set_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag);
1287         goto bail;
1288
1289 bail_rhdr:
1290         vfree(rcd->subctxt_rcvhdr_base);
1291 bail_ureg:
1292         vfree(rcd->subctxt_uregbase);
1293         rcd->subctxt_uregbase = NULL;
1294 bail:
1295         return ret;
1296 }
1297
1298 static int setup_ctxt(struct qib_pportdata *ppd, int ctxt,
1299                       struct file *fp, const struct qib_user_info *uinfo)
1300 {
1301         struct qib_filedata *fd = fp->private_data;
1302         struct qib_devdata *dd = ppd->dd;
1303         struct qib_ctxtdata *rcd;
1304         void *ptmp = NULL;
1305         int ret;
1306         int numa_id;
1307
1308         assign_ctxt_affinity(fp, dd);
1309
1310         numa_id = qib_numa_aware ? ((fd->rec_cpu_num != -1) ?
1311                 cpu_to_node(fd->rec_cpu_num) :
1312                 numa_node_id()) : dd->assigned_node_id;
1313
1314         rcd = qib_create_ctxtdata(ppd, ctxt, numa_id);
1315
1316         /*
1317          * Allocate memory for use in qib_tid_update() at open to
1318          * reduce cost of expected send setup per message segment
1319          */
1320         if (rcd)
1321                 ptmp = kmalloc(dd->rcvtidcnt * sizeof(u16) +
1322                                dd->rcvtidcnt * sizeof(struct page **),
1323                                GFP_KERNEL);
1324
1325         if (!rcd || !ptmp) {
1326                 qib_dev_err(dd,
1327                         "Unable to allocate ctxtdata memory, failing open\n");
1328                 ret = -ENOMEM;
1329                 goto bailerr;
1330         }
1331         rcd->userversion = uinfo->spu_userversion;
1332         ret = init_subctxts(dd, rcd, uinfo);
1333         if (ret)
1334                 goto bailerr;
1335         rcd->tid_pg_list = ptmp;
1336         rcd->pid = current->pid;
1337         init_waitqueue_head(&dd->rcd[ctxt]->wait);
1338         strlcpy(rcd->comm, current->comm, sizeof(rcd->comm));
1339         ctxt_fp(fp) = rcd;
1340         qib_stats.sps_ctxts++;
1341         dd->freectxts--;
1342         ret = 0;
1343         goto bail;
1344
1345 bailerr:
1346         if (fd->rec_cpu_num != -1)
1347                 __clear_bit(fd->rec_cpu_num, qib_cpulist);
1348
1349         dd->rcd[ctxt] = NULL;
1350         kfree(rcd);
1351         kfree(ptmp);
1352 bail:
1353         return ret;
1354 }
1355
1356 static inline int usable(struct qib_pportdata *ppd)
1357 {
1358         struct qib_devdata *dd = ppd->dd;
1359
1360         return dd && (dd->flags & QIB_PRESENT) && dd->kregbase && ppd->lid &&
1361                 (ppd->lflags & QIBL_LINKACTIVE);
1362 }
1363
1364 /*
1365  * Select a context on the given device, either using a requested port
1366  * or the port based on the context number.
1367  */
1368 static int choose_port_ctxt(struct file *fp, struct qib_devdata *dd, u32 port,
1369                             const struct qib_user_info *uinfo)
1370 {
1371         struct qib_pportdata *ppd = NULL;
1372         int ret, ctxt;
1373
1374         if (port) {
1375                 if (!usable(dd->pport + port - 1)) {
1376                         ret = -ENETDOWN;
1377                         goto done;
1378                 } else
1379                         ppd = dd->pport + port - 1;
1380         }
1381         for (ctxt = dd->first_user_ctxt; ctxt < dd->cfgctxts && dd->rcd[ctxt];
1382              ctxt++)
1383                 ;
1384         if (ctxt == dd->cfgctxts) {
1385                 ret = -EBUSY;
1386                 goto done;
1387         }
1388         if (!ppd) {
1389                 u32 pidx = ctxt % dd->num_pports;
1390
1391                 if (usable(dd->pport + pidx))
1392                         ppd = dd->pport + pidx;
1393                 else {
1394                         for (pidx = 0; pidx < dd->num_pports && !ppd;
1395                              pidx++)
1396                                 if (usable(dd->pport + pidx))
1397                                         ppd = dd->pport + pidx;
1398                 }
1399         }
1400         ret = ppd ? setup_ctxt(ppd, ctxt, fp, uinfo) : -ENETDOWN;
1401 done:
1402         return ret;
1403 }
1404
1405 static int find_free_ctxt(int unit, struct file *fp,
1406                           const struct qib_user_info *uinfo)
1407 {
1408         struct qib_devdata *dd = qib_lookup(unit);
1409         int ret;
1410
1411         if (!dd || (uinfo->spu_port && uinfo->spu_port > dd->num_pports))
1412                 ret = -ENODEV;
1413         else
1414                 ret = choose_port_ctxt(fp, dd, uinfo->spu_port, uinfo);
1415
1416         return ret;
1417 }
1418
1419 static int get_a_ctxt(struct file *fp, const struct qib_user_info *uinfo,
1420                       unsigned alg)
1421 {
1422         struct qib_devdata *udd = NULL;
1423         int ret = 0, devmax, npresent, nup, ndev, dusable = 0, i;
1424         u32 port = uinfo->spu_port, ctxt;
1425
1426         devmax = qib_count_units(&npresent, &nup);
1427         if (!npresent) {
1428                 ret = -ENXIO;
1429                 goto done;
1430         }
1431         if (nup == 0) {
1432                 ret = -ENETDOWN;
1433                 goto done;
1434         }
1435
1436         if (alg == QIB_PORT_ALG_ACROSS) {
1437                 unsigned inuse = ~0U;
1438
1439                 /* find device (with ACTIVE ports) with fewest ctxts in use */
1440                 for (ndev = 0; ndev < devmax; ndev++) {
1441                         struct qib_devdata *dd = qib_lookup(ndev);
1442                         unsigned cused = 0, cfree = 0, pusable = 0;
1443
1444                         if (!dd)
1445                                 continue;
1446                         if (port && port <= dd->num_pports &&
1447                             usable(dd->pport + port - 1))
1448                                 pusable = 1;
1449                         else
1450                                 for (i = 0; i < dd->num_pports; i++)
1451                                         if (usable(dd->pport + i))
1452                                                 pusable++;
1453                         if (!pusable)
1454                                 continue;
1455                         for (ctxt = dd->first_user_ctxt; ctxt < dd->cfgctxts;
1456                              ctxt++)
1457                                 if (dd->rcd[ctxt])
1458                                         cused++;
1459                                 else
1460                                         cfree++;
1461                         if (cfree && cused < inuse) {
1462                                 udd = dd;
1463                                 inuse = cused;
1464                         }
1465                 }
1466                 if (udd) {
1467                         ret = choose_port_ctxt(fp, udd, port, uinfo);
1468                         goto done;
1469                 }
1470         } else {
1471                 for (ndev = 0; ndev < devmax; ndev++) {
1472                         struct qib_devdata *dd = qib_lookup(ndev);
1473
1474                         if (dd) {
1475                                 ret = choose_port_ctxt(fp, dd, port, uinfo);
1476                                 if (!ret)
1477                                         goto done;
1478                                 if (ret == -EBUSY)
1479                                         dusable++;
1480                         }
1481                 }
1482         }
1483         ret = dusable ? -EBUSY : -ENETDOWN;
1484
1485 done:
1486         return ret;
1487 }
1488
1489 static int find_shared_ctxt(struct file *fp,
1490                             const struct qib_user_info *uinfo)
1491 {
1492         int devmax, ndev, i;
1493         int ret = 0;
1494
1495         devmax = qib_count_units(NULL, NULL);
1496
1497         for (ndev = 0; ndev < devmax; ndev++) {
1498                 struct qib_devdata *dd = qib_lookup(ndev);
1499
1500                 /* device portion of usable() */
1501                 if (!(dd && (dd->flags & QIB_PRESENT) && dd->kregbase))
1502                         continue;
1503                 for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) {
1504                         struct qib_ctxtdata *rcd = dd->rcd[i];
1505
1506                         /* Skip ctxts which are not yet open */
1507                         if (!rcd || !rcd->cnt)
1508                                 continue;
1509                         /* Skip ctxt if it doesn't match the requested one */
1510                         if (rcd->subctxt_id != uinfo->spu_subctxt_id)
1511                                 continue;
1512                         /* Verify the sharing process matches the master */
1513                         if (rcd->subctxt_cnt != uinfo->spu_subctxt_cnt ||
1514                             rcd->userversion != uinfo->spu_userversion ||
1515                             rcd->cnt >= rcd->subctxt_cnt) {
1516                                 ret = -EINVAL;
1517                                 goto done;
1518                         }
1519                         ctxt_fp(fp) = rcd;
1520                         subctxt_fp(fp) = rcd->cnt++;
1521                         rcd->subpid[subctxt_fp(fp)] = current->pid;
1522                         tidcursor_fp(fp) = 0;
1523                         rcd->active_slaves |= 1 << subctxt_fp(fp);
1524                         ret = 1;
1525                         goto done;
1526                 }
1527         }
1528
1529 done:
1530         return ret;
1531 }
1532
1533 static int qib_open(struct inode *in, struct file *fp)
1534 {
1535         /* The real work is performed later in qib_assign_ctxt() */
1536         fp->private_data = kzalloc(sizeof(struct qib_filedata), GFP_KERNEL);
1537         if (fp->private_data) /* no cpu affinity by default */
1538                 ((struct qib_filedata *)fp->private_data)->rec_cpu_num = -1;
1539         return fp->private_data ? 0 : -ENOMEM;
1540 }
1541
1542 static int find_hca(unsigned int cpu, int *unit)
1543 {
1544         int ret = 0, devmax, npresent, nup, ndev;
1545
1546         *unit = -1;
1547
1548         devmax = qib_count_units(&npresent, &nup);
1549         if (!npresent) {
1550                 ret = -ENXIO;
1551                 goto done;
1552         }
1553         if (!nup) {
1554                 ret = -ENETDOWN;
1555                 goto done;
1556         }
1557         for (ndev = 0; ndev < devmax; ndev++) {
1558                 struct qib_devdata *dd = qib_lookup(ndev);
1559
1560                 if (dd) {
1561                         if (pcibus_to_node(dd->pcidev->bus) < 0) {
1562                                 ret = -EINVAL;
1563                                 goto done;
1564                         }
1565                         if (cpu_to_node(cpu) ==
1566                                 pcibus_to_node(dd->pcidev->bus)) {
1567                                 *unit = ndev;
1568                                 goto done;
1569                         }
1570                 }
1571         }
1572 done:
1573         return ret;
1574 }
1575
1576 static int do_qib_user_sdma_queue_create(struct file *fp)
1577 {
1578         struct qib_filedata *fd = fp->private_data;
1579         struct qib_ctxtdata *rcd = fd->rcd;
1580         struct qib_devdata *dd = rcd->dd;
1581
1582         if (dd->flags & QIB_HAS_SEND_DMA) {
1583
1584                 fd->pq = qib_user_sdma_queue_create(&dd->pcidev->dev,
1585                                                     dd->unit,
1586                                                     rcd->ctxt,
1587                                                     fd->subctxt);
1588                 if (!fd->pq)
1589                         return -ENOMEM;
1590         }
1591
1592         return 0;
1593 }
1594
1595 /*
1596  * Get ctxt early, so can set affinity prior to memory allocation.
1597  */
1598 static int qib_assign_ctxt(struct file *fp, const struct qib_user_info *uinfo)
1599 {
1600         int ret;
1601         int i_minor;
1602         unsigned swmajor, swminor, alg = QIB_PORT_ALG_ACROSS;
1603
1604         /* Check to be sure we haven't already initialized this file */
1605         if (ctxt_fp(fp)) {
1606                 ret = -EINVAL;
1607                 goto done;
1608         }
1609
1610         /* for now, if major version is different, bail */
1611         swmajor = uinfo->spu_userversion >> 16;
1612         if (swmajor != QIB_USER_SWMAJOR) {
1613                 ret = -ENODEV;
1614                 goto done;
1615         }
1616
1617         swminor = uinfo->spu_userversion & 0xffff;
1618
1619         if (swminor >= 11 && uinfo->spu_port_alg < QIB_PORT_ALG_COUNT)
1620                 alg = uinfo->spu_port_alg;
1621
1622         mutex_lock(&qib_mutex);
1623
1624         if (qib_compatible_subctxts(swmajor, swminor) &&
1625             uinfo->spu_subctxt_cnt) {
1626                 ret = find_shared_ctxt(fp, uinfo);
1627                 if (ret > 0) {
1628                         ret = do_qib_user_sdma_queue_create(fp);
1629                         if (!ret)
1630                                 assign_ctxt_affinity(fp, (ctxt_fp(fp))->dd);
1631                         goto done_ok;
1632                 }
1633         }
1634
1635         i_minor = iminor(file_inode(fp)) - QIB_USER_MINOR_BASE;
1636         if (i_minor)
1637                 ret = find_free_ctxt(i_minor - 1, fp, uinfo);
1638         else {
1639                 int unit;
1640                 const unsigned int cpu = cpumask_first(&current->cpus_allowed);
1641                 const unsigned int weight =
1642                         cpumask_weight(&current->cpus_allowed);
1643
1644                 if (weight == 1 && !test_bit(cpu, qib_cpulist))
1645                         if (!find_hca(cpu, &unit) && unit >= 0)
1646                                 if (!find_free_ctxt(unit, fp, uinfo)) {
1647                                         ret = 0;
1648                                         goto done_chk_sdma;
1649                                 }
1650                 ret = get_a_ctxt(fp, uinfo, alg);
1651         }
1652
1653 done_chk_sdma:
1654         if (!ret)
1655                 ret = do_qib_user_sdma_queue_create(fp);
1656 done_ok:
1657         mutex_unlock(&qib_mutex);
1658
1659 done:
1660         return ret;
1661 }
1662
1663
1664 static int qib_do_user_init(struct file *fp,
1665                             const struct qib_user_info *uinfo)
1666 {
1667         int ret;
1668         struct qib_ctxtdata *rcd = ctxt_fp(fp);
1669         struct qib_devdata *dd;
1670         unsigned uctxt;
1671
1672         /* Subctxts don't need to initialize anything since master did it. */
1673         if (subctxt_fp(fp)) {
1674                 ret = wait_event_interruptible(rcd->wait,
1675                         !test_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag));
1676                 goto bail;
1677         }
1678
1679         dd = rcd->dd;
1680
1681         /* some ctxts may get extra buffers, calculate that here */
1682         uctxt = rcd->ctxt - dd->first_user_ctxt;
1683         if (uctxt < dd->ctxts_extrabuf) {
1684                 rcd->piocnt = dd->pbufsctxt + 1;
1685                 rcd->pio_base = rcd->piocnt * uctxt;
1686         } else {
1687                 rcd->piocnt = dd->pbufsctxt;
1688                 rcd->pio_base = rcd->piocnt * uctxt +
1689                         dd->ctxts_extrabuf;
1690         }
1691
1692         /*
1693          * All user buffers are 2KB buffers.  If we ever support
1694          * giving 4KB buffers to user processes, this will need some
1695          * work.  Can't use piobufbase directly, because it has
1696          * both 2K and 4K buffer base values.  So check and handle.
1697          */
1698         if ((rcd->pio_base + rcd->piocnt) > dd->piobcnt2k) {
1699                 if (rcd->pio_base >= dd->piobcnt2k) {
1700                         qib_dev_err(dd,
1701                                     "%u:ctxt%u: no 2KB buffers available\n",
1702                                     dd->unit, rcd->ctxt);
1703                         ret = -ENOBUFS;
1704                         goto bail;
1705                 }
1706                 rcd->piocnt = dd->piobcnt2k - rcd->pio_base;
1707                 qib_dev_err(dd, "Ctxt%u: would use 4KB bufs, using %u\n",
1708                             rcd->ctxt, rcd->piocnt);
1709         }
1710
1711         rcd->piobufs = dd->pio2k_bufbase + rcd->pio_base * dd->palign;
1712         qib_chg_pioavailkernel(dd, rcd->pio_base, rcd->piocnt,
1713                                TXCHK_CHG_TYPE_USER, rcd);
1714         /*
1715          * try to ensure that processes start up with consistent avail update
1716          * for their own range, at least.   If system very quiet, it might
1717          * have the in-memory copy out of date at startup for this range of
1718          * buffers, when a context gets re-used.  Do after the chg_pioavail
1719          * and before the rest of setup, so it's "almost certain" the dma
1720          * will have occurred (can't 100% guarantee, but should be many
1721          * decimals of 9s, with this ordering), given how much else happens
1722          * after this.
1723          */
1724         dd->f_sendctrl(dd->pport, QIB_SENDCTRL_AVAIL_BLIP);
1725
1726         /*
1727          * Now allocate the rcvhdr Q and eager TIDs; skip the TID
1728          * array for time being.  If rcd->ctxt > chip-supported,
1729          * we need to do extra stuff here to handle by handling overflow
1730          * through ctxt 0, someday
1731          */
1732         ret = qib_create_rcvhdrq(dd, rcd);
1733         if (!ret)
1734                 ret = qib_setup_eagerbufs(rcd);
1735         if (ret)
1736                 goto bail_pio;
1737
1738         rcd->tidcursor = 0; /* start at beginning after open */
1739
1740         /* initialize poll variables... */
1741         rcd->urgent = 0;
1742         rcd->urgent_poll = 0;
1743
1744         /*
1745          * Now enable the ctxt for receive.
1746          * For chips that are set to DMA the tail register to memory
1747          * when they change (and when the update bit transitions from
1748          * 0 to 1.  So for those chips, we turn it off and then back on.
1749          * This will (very briefly) affect any other open ctxts, but the
1750          * duration is very short, and therefore isn't an issue.  We
1751          * explicitly set the in-memory tail copy to 0 beforehand, so we
1752          * don't have to wait to be sure the DMA update has happened
1753          * (chip resets head/tail to 0 on transition to enable).
1754          */
1755         if (rcd->rcvhdrtail_kvaddr)
1756                 qib_clear_rcvhdrtail(rcd);
1757
1758         dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_CTXT_ENB | QIB_RCVCTRL_TIDFLOW_ENB,
1759                       rcd->ctxt);
1760
1761         /* Notify any waiting slaves */
1762         if (rcd->subctxt_cnt) {
1763                 clear_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag);
1764                 wake_up(&rcd->wait);
1765         }
1766         return 0;
1767
1768 bail_pio:
1769         qib_chg_pioavailkernel(dd, rcd->pio_base, rcd->piocnt,
1770                                TXCHK_CHG_TYPE_KERN, rcd);
1771 bail:
1772         return ret;
1773 }
1774
1775 /**
1776  * unlock_exptid - unlock any expected TID entries context still had in use
1777  * @rcd: ctxt
1778  *
1779  * We don't actually update the chip here, because we do a bulk update
1780  * below, using f_clear_tids.
1781  */
1782 static void unlock_expected_tids(struct qib_ctxtdata *rcd)
1783 {
1784         struct qib_devdata *dd = rcd->dd;
1785         int ctxt_tidbase = rcd->ctxt * dd->rcvtidcnt;
1786         int i, cnt = 0, maxtid = ctxt_tidbase + dd->rcvtidcnt;
1787
1788         for (i = ctxt_tidbase; i < maxtid; i++) {
1789                 struct page *p = dd->pageshadow[i];
1790                 dma_addr_t phys;
1791
1792                 if (!p)
1793                         continue;
1794
1795                 phys = dd->physshadow[i];
1796                 dd->physshadow[i] = dd->tidinvalid;
1797                 dd->pageshadow[i] = NULL;
1798                 pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
1799                                PCI_DMA_FROMDEVICE);
1800                 qib_release_user_pages(&p, 1);
1801                 cnt++;
1802         }
1803 }
1804
1805 static int qib_close(struct inode *in, struct file *fp)
1806 {
1807         int ret = 0;
1808         struct qib_filedata *fd;
1809         struct qib_ctxtdata *rcd;
1810         struct qib_devdata *dd;
1811         unsigned long flags;
1812         unsigned ctxt;
1813
1814         mutex_lock(&qib_mutex);
1815
1816         fd = fp->private_data;
1817         fp->private_data = NULL;
1818         rcd = fd->rcd;
1819         if (!rcd) {
1820                 mutex_unlock(&qib_mutex);
1821                 goto bail;
1822         }
1823
1824         dd = rcd->dd;
1825
1826         /* ensure all pio buffer writes in progress are flushed */
1827         qib_flush_wc();
1828
1829         /* drain user sdma queue */
1830         if (fd->pq) {
1831                 qib_user_sdma_queue_drain(rcd->ppd, fd->pq);
1832                 qib_user_sdma_queue_destroy(fd->pq);
1833         }
1834
1835         if (fd->rec_cpu_num != -1)
1836                 __clear_bit(fd->rec_cpu_num, qib_cpulist);
1837
1838         if (--rcd->cnt) {
1839                 /*
1840                  * XXX If the master closes the context before the slave(s),
1841                  * revoke the mmap for the eager receive queue so
1842                  * the slave(s) don't wait for receive data forever.
1843                  */
1844                 rcd->active_slaves &= ~(1 << fd->subctxt);
1845                 rcd->subpid[fd->subctxt] = 0;
1846                 mutex_unlock(&qib_mutex);
1847                 goto bail;
1848         }
1849
1850         /* early; no interrupt users after this */
1851         spin_lock_irqsave(&dd->uctxt_lock, flags);
1852         ctxt = rcd->ctxt;
1853         dd->rcd[ctxt] = NULL;
1854         rcd->pid = 0;
1855         spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1856
1857         if (rcd->rcvwait_to || rcd->piowait_to ||
1858             rcd->rcvnowait || rcd->pionowait) {
1859                 rcd->rcvwait_to = 0;
1860                 rcd->piowait_to = 0;
1861                 rcd->rcvnowait = 0;
1862                 rcd->pionowait = 0;
1863         }
1864         if (rcd->flag)
1865                 rcd->flag = 0;
1866
1867         if (dd->kregbase) {
1868                 /* atomically clear receive enable ctxt and intr avail. */
1869                 dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_CTXT_DIS |
1870                                   QIB_RCVCTRL_INTRAVAIL_DIS, ctxt);
1871
1872                 /* clean up the pkeys for this ctxt user */
1873                 qib_clean_part_key(rcd, dd);
1874                 qib_disarm_piobufs(dd, rcd->pio_base, rcd->piocnt);
1875                 qib_chg_pioavailkernel(dd, rcd->pio_base,
1876                                        rcd->piocnt, TXCHK_CHG_TYPE_KERN, NULL);
1877
1878                 dd->f_clear_tids(dd, rcd);
1879
1880                 if (dd->pageshadow)
1881                         unlock_expected_tids(rcd);
1882                 qib_stats.sps_ctxts--;
1883                 dd->freectxts++;
1884         }
1885
1886         mutex_unlock(&qib_mutex);
1887         qib_free_ctxtdata(dd, rcd); /* after releasing the mutex */
1888
1889 bail:
1890         kfree(fd);
1891         return ret;
1892 }
1893
1894 static int qib_ctxt_info(struct file *fp, struct qib_ctxt_info __user *uinfo)
1895 {
1896         struct qib_ctxt_info info;
1897         int ret;
1898         size_t sz;
1899         struct qib_ctxtdata *rcd = ctxt_fp(fp);
1900         struct qib_filedata *fd;
1901
1902         fd = fp->private_data;
1903
1904         info.num_active = qib_count_active_units();
1905         info.unit = rcd->dd->unit;
1906         info.port = rcd->ppd->port;
1907         info.ctxt = rcd->ctxt;
1908         info.subctxt =  subctxt_fp(fp);
1909         /* Number of user ctxts available for this device. */
1910         info.num_ctxts = rcd->dd->cfgctxts - rcd->dd->first_user_ctxt;
1911         info.num_subctxts = rcd->subctxt_cnt;
1912         info.rec_cpu = fd->rec_cpu_num;
1913         sz = sizeof(info);
1914
1915         if (copy_to_user(uinfo, &info, sz)) {
1916                 ret = -EFAULT;
1917                 goto bail;
1918         }
1919         ret = 0;
1920
1921 bail:
1922         return ret;
1923 }
1924
1925 static int qib_sdma_get_inflight(struct qib_user_sdma_queue *pq,
1926                                  u32 __user *inflightp)
1927 {
1928         const u32 val = qib_user_sdma_inflight_counter(pq);
1929
1930         if (put_user(val, inflightp))
1931                 return -EFAULT;
1932
1933         return 0;
1934 }
1935
1936 static int qib_sdma_get_complete(struct qib_pportdata *ppd,
1937                                  struct qib_user_sdma_queue *pq,
1938                                  u32 __user *completep)
1939 {
1940         u32 val;
1941         int err;
1942
1943         if (!pq)
1944                 return -EINVAL;
1945
1946         err = qib_user_sdma_make_progress(ppd, pq);
1947         if (err < 0)
1948                 return err;
1949
1950         val = qib_user_sdma_complete_counter(pq);
1951         if (put_user(val, completep))
1952                 return -EFAULT;
1953
1954         return 0;
1955 }
1956
1957 static int disarm_req_delay(struct qib_ctxtdata *rcd)
1958 {
1959         int ret = 0;
1960
1961         if (!usable(rcd->ppd)) {
1962                 int i;
1963                 /*
1964                  * if link is down, or otherwise not usable, delay
1965                  * the caller up to 30 seconds, so we don't thrash
1966                  * in trying to get the chip back to ACTIVE, and
1967                  * set flag so they make the call again.
1968                  */
1969                 if (rcd->user_event_mask) {
1970                         /*
1971                          * subctxt_cnt is 0 if not shared, so do base
1972                          * separately, first, then remaining subctxt, if any
1973                          */
1974                         set_bit(_QIB_EVENT_DISARM_BUFS_BIT,
1975                                 &rcd->user_event_mask[0]);
1976                         for (i = 1; i < rcd->subctxt_cnt; i++)
1977                                 set_bit(_QIB_EVENT_DISARM_BUFS_BIT,
1978                                         &rcd->user_event_mask[i]);
1979                 }
1980                 for (i = 0; !usable(rcd->ppd) && i < 300; i++)
1981                         msleep(100);
1982                 ret = -ENETDOWN;
1983         }
1984         return ret;
1985 }
1986
1987 /*
1988  * Find all user contexts in use, and set the specified bit in their
1989  * event mask.
1990  * See also find_ctxt() for a similar use, that is specific to send buffers.
1991  */
1992 int qib_set_uevent_bits(struct qib_pportdata *ppd, const int evtbit)
1993 {
1994         struct qib_ctxtdata *rcd;
1995         unsigned ctxt;
1996         int ret = 0;
1997         unsigned long flags;
1998
1999         spin_lock_irqsave(&ppd->dd->uctxt_lock, flags);
2000         for (ctxt = ppd->dd->first_user_ctxt; ctxt < ppd->dd->cfgctxts;
2001              ctxt++) {
2002                 rcd = ppd->dd->rcd[ctxt];
2003                 if (!rcd)
2004                         continue;
2005                 if (rcd->user_event_mask) {
2006                         int i;
2007                         /*
2008                          * subctxt_cnt is 0 if not shared, so do base
2009                          * separately, first, then remaining subctxt, if any
2010                          */
2011                         set_bit(evtbit, &rcd->user_event_mask[0]);
2012                         for (i = 1; i < rcd->subctxt_cnt; i++)
2013                                 set_bit(evtbit, &rcd->user_event_mask[i]);
2014                 }
2015                 ret = 1;
2016                 break;
2017         }
2018         spin_unlock_irqrestore(&ppd->dd->uctxt_lock, flags);
2019
2020         return ret;
2021 }
2022
2023 /*
2024  * clear the event notifier events for this context.
2025  * For the DISARM_BUFS case, we also take action (this obsoletes
2026  * the older QIB_CMD_DISARM_BUFS, but we keep it for backwards
2027  * compatibility.
2028  * Other bits don't currently require actions, just atomically clear.
2029  * User process then performs actions appropriate to bit having been
2030  * set, if desired, and checks again in future.
2031  */
2032 static int qib_user_event_ack(struct qib_ctxtdata *rcd, int subctxt,
2033                               unsigned long events)
2034 {
2035         int ret = 0, i;
2036
2037         for (i = 0; i <= _QIB_MAX_EVENT_BIT; i++) {
2038                 if (!test_bit(i, &events))
2039                         continue;
2040                 if (i == _QIB_EVENT_DISARM_BUFS_BIT) {
2041                         (void)qib_disarm_piobufs_ifneeded(rcd);
2042                         ret = disarm_req_delay(rcd);
2043                 } else
2044                         clear_bit(i, &rcd->user_event_mask[subctxt]);
2045         }
2046         return ret;
2047 }
2048
2049 static ssize_t qib_write(struct file *fp, const char __user *data,
2050                          size_t count, loff_t *off)
2051 {
2052         const struct qib_cmd __user *ucmd;
2053         struct qib_ctxtdata *rcd;
2054         const void __user *src;
2055         size_t consumed, copy = 0;
2056         struct qib_cmd cmd;
2057         ssize_t ret = 0;
2058         void *dest;
2059
2060         if (!ib_safe_file_access(fp)) {
2061                 pr_err_once("qib_write: process %d (%s) changed security contexts after opening file descriptor, this is not allowed.\n",
2062                             task_tgid_vnr(current), current->comm);
2063                 return -EACCES;
2064         }
2065
2066         if (count < sizeof(cmd.type)) {
2067                 ret = -EINVAL;
2068                 goto bail;
2069         }
2070
2071         ucmd = (const struct qib_cmd __user *) data;
2072
2073         if (copy_from_user(&cmd.type, &ucmd->type, sizeof(cmd.type))) {
2074                 ret = -EFAULT;
2075                 goto bail;
2076         }
2077
2078         consumed = sizeof(cmd.type);
2079
2080         switch (cmd.type) {
2081         case QIB_CMD_ASSIGN_CTXT:
2082         case QIB_CMD_USER_INIT:
2083                 copy = sizeof(cmd.cmd.user_info);
2084                 dest = &cmd.cmd.user_info;
2085                 src = &ucmd->cmd.user_info;
2086                 break;
2087
2088         case QIB_CMD_RECV_CTRL:
2089                 copy = sizeof(cmd.cmd.recv_ctrl);
2090                 dest = &cmd.cmd.recv_ctrl;
2091                 src = &ucmd->cmd.recv_ctrl;
2092                 break;
2093
2094         case QIB_CMD_CTXT_INFO:
2095                 copy = sizeof(cmd.cmd.ctxt_info);
2096                 dest = &cmd.cmd.ctxt_info;
2097                 src = &ucmd->cmd.ctxt_info;
2098                 break;
2099
2100         case QIB_CMD_TID_UPDATE:
2101         case QIB_CMD_TID_FREE:
2102                 copy = sizeof(cmd.cmd.tid_info);
2103                 dest = &cmd.cmd.tid_info;
2104                 src = &ucmd->cmd.tid_info;
2105                 break;
2106
2107         case QIB_CMD_SET_PART_KEY:
2108                 copy = sizeof(cmd.cmd.part_key);
2109                 dest = &cmd.cmd.part_key;
2110                 src = &ucmd->cmd.part_key;
2111                 break;
2112
2113         case QIB_CMD_DISARM_BUFS:
2114         case QIB_CMD_PIOAVAILUPD: /* force an update of PIOAvail reg */
2115                 copy = 0;
2116                 src = NULL;
2117                 dest = NULL;
2118                 break;
2119
2120         case QIB_CMD_POLL_TYPE:
2121                 copy = sizeof(cmd.cmd.poll_type);
2122                 dest = &cmd.cmd.poll_type;
2123                 src = &ucmd->cmd.poll_type;
2124                 break;
2125
2126         case QIB_CMD_ARMLAUNCH_CTRL:
2127                 copy = sizeof(cmd.cmd.armlaunch_ctrl);
2128                 dest = &cmd.cmd.armlaunch_ctrl;
2129                 src = &ucmd->cmd.armlaunch_ctrl;
2130                 break;
2131
2132         case QIB_CMD_SDMA_INFLIGHT:
2133                 copy = sizeof(cmd.cmd.sdma_inflight);
2134                 dest = &cmd.cmd.sdma_inflight;
2135                 src = &ucmd->cmd.sdma_inflight;
2136                 break;
2137
2138         case QIB_CMD_SDMA_COMPLETE:
2139                 copy = sizeof(cmd.cmd.sdma_complete);
2140                 dest = &cmd.cmd.sdma_complete;
2141                 src = &ucmd->cmd.sdma_complete;
2142                 break;
2143
2144         case QIB_CMD_ACK_EVENT:
2145                 copy = sizeof(cmd.cmd.event_mask);
2146                 dest = &cmd.cmd.event_mask;
2147                 src = &ucmd->cmd.event_mask;
2148                 break;
2149
2150         default:
2151                 ret = -EINVAL;
2152                 goto bail;
2153         }
2154
2155         if (copy) {
2156                 if ((count - consumed) < copy) {
2157                         ret = -EINVAL;
2158                         goto bail;
2159                 }
2160                 if (copy_from_user(dest, src, copy)) {
2161                         ret = -EFAULT;
2162                         goto bail;
2163                 }
2164                 consumed += copy;
2165         }
2166
2167         rcd = ctxt_fp(fp);
2168         if (!rcd && cmd.type != QIB_CMD_ASSIGN_CTXT) {
2169                 ret = -EINVAL;
2170                 goto bail;
2171         }
2172
2173         switch (cmd.type) {
2174         case QIB_CMD_ASSIGN_CTXT:
2175                 if (rcd) {
2176                         ret = -EINVAL;
2177                         goto bail;
2178                 }
2179
2180                 ret = qib_assign_ctxt(fp, &cmd.cmd.user_info);
2181                 if (ret)
2182                         goto bail;
2183                 break;
2184
2185         case QIB_CMD_USER_INIT:
2186                 ret = qib_do_user_init(fp, &cmd.cmd.user_info);
2187                 if (ret)
2188                         goto bail;
2189                 ret = qib_get_base_info(fp, (void __user *) (unsigned long)
2190                                         cmd.cmd.user_info.spu_base_info,
2191                                         cmd.cmd.user_info.spu_base_info_size);
2192                 break;
2193
2194         case QIB_CMD_RECV_CTRL:
2195                 ret = qib_manage_rcvq(rcd, subctxt_fp(fp), cmd.cmd.recv_ctrl);
2196                 break;
2197
2198         case QIB_CMD_CTXT_INFO:
2199                 ret = qib_ctxt_info(fp, (struct qib_ctxt_info __user *)
2200                                     (unsigned long) cmd.cmd.ctxt_info);
2201                 break;
2202
2203         case QIB_CMD_TID_UPDATE:
2204                 ret = qib_tid_update(rcd, fp, &cmd.cmd.tid_info);
2205                 break;
2206
2207         case QIB_CMD_TID_FREE:
2208                 ret = qib_tid_free(rcd, subctxt_fp(fp), &cmd.cmd.tid_info);
2209                 break;
2210
2211         case QIB_CMD_SET_PART_KEY:
2212                 ret = qib_set_part_key(rcd, cmd.cmd.part_key);
2213                 break;
2214
2215         case QIB_CMD_DISARM_BUFS:
2216                 (void)qib_disarm_piobufs_ifneeded(rcd);
2217                 ret = disarm_req_delay(rcd);
2218                 break;
2219
2220         case QIB_CMD_PIOAVAILUPD:
2221                 qib_force_pio_avail_update(rcd->dd);
2222                 break;
2223
2224         case QIB_CMD_POLL_TYPE:
2225                 rcd->poll_type = cmd.cmd.poll_type;
2226                 break;
2227
2228         case QIB_CMD_ARMLAUNCH_CTRL:
2229                 rcd->dd->f_set_armlaunch(rcd->dd, cmd.cmd.armlaunch_ctrl);
2230                 break;
2231
2232         case QIB_CMD_SDMA_INFLIGHT:
2233                 ret = qib_sdma_get_inflight(user_sdma_queue_fp(fp),
2234                                             (u32 __user *) (unsigned long)
2235                                             cmd.cmd.sdma_inflight);
2236                 break;
2237
2238         case QIB_CMD_SDMA_COMPLETE:
2239                 ret = qib_sdma_get_complete(rcd->ppd,
2240                                             user_sdma_queue_fp(fp),
2241                                             (u32 __user *) (unsigned long)
2242                                             cmd.cmd.sdma_complete);
2243                 break;
2244
2245         case QIB_CMD_ACK_EVENT:
2246                 ret = qib_user_event_ack(rcd, subctxt_fp(fp),
2247                                          cmd.cmd.event_mask);
2248                 break;
2249         }
2250
2251         if (ret >= 0)
2252                 ret = consumed;
2253
2254 bail:
2255         return ret;
2256 }
2257
2258 static ssize_t qib_write_iter(struct kiocb *iocb, struct iov_iter *from)
2259 {
2260         struct qib_filedata *fp = iocb->ki_filp->private_data;
2261         struct qib_ctxtdata *rcd = ctxt_fp(iocb->ki_filp);
2262         struct qib_user_sdma_queue *pq = fp->pq;
2263
2264         if (!iter_is_iovec(from) || !from->nr_segs || !pq)
2265                 return -EINVAL;
2266                          
2267         return qib_user_sdma_writev(rcd, pq, from->iov, from->nr_segs);
2268 }
2269
2270 static struct class *qib_class;
2271 static dev_t qib_dev;
2272
2273 int qib_cdev_init(int minor, const char *name,
2274                   const struct file_operations *fops,
2275                   struct cdev **cdevp, struct device **devp)
2276 {
2277         const dev_t dev = MKDEV(MAJOR(qib_dev), minor);
2278         struct cdev *cdev;
2279         struct device *device = NULL;
2280         int ret;
2281
2282         cdev = cdev_alloc();
2283         if (!cdev) {
2284                 pr_err("Could not allocate cdev for minor %d, %s\n",
2285                        minor, name);
2286                 ret = -ENOMEM;
2287                 goto done;
2288         }
2289
2290         cdev->owner = THIS_MODULE;
2291         cdev->ops = fops;
2292         kobject_set_name(&cdev->kobj, name);
2293
2294         ret = cdev_add(cdev, dev, 1);
2295         if (ret < 0) {
2296                 pr_err("Could not add cdev for minor %d, %s (err %d)\n",
2297                        minor, name, -ret);
2298                 goto err_cdev;
2299         }
2300
2301         device = device_create(qib_class, NULL, dev, NULL, "%s", name);
2302         if (!IS_ERR(device))
2303                 goto done;
2304         ret = PTR_ERR(device);
2305         device = NULL;
2306         pr_err("Could not create device for minor %d, %s (err %d)\n",
2307                minor, name, -ret);
2308 err_cdev:
2309         cdev_del(cdev);
2310         cdev = NULL;
2311 done:
2312         *cdevp = cdev;
2313         *devp = device;
2314         return ret;
2315 }
2316
2317 void qib_cdev_cleanup(struct cdev **cdevp, struct device **devp)
2318 {
2319         struct device *device = *devp;
2320
2321         if (device) {
2322                 device_unregister(device);
2323                 *devp = NULL;
2324         }
2325
2326         if (*cdevp) {
2327                 cdev_del(*cdevp);
2328                 *cdevp = NULL;
2329         }
2330 }
2331
2332 static struct cdev *wildcard_cdev;
2333 static struct device *wildcard_device;
2334
2335 int __init qib_dev_init(void)
2336 {
2337         int ret;
2338
2339         ret = alloc_chrdev_region(&qib_dev, 0, QIB_NMINORS, QIB_DRV_NAME);
2340         if (ret < 0) {
2341                 pr_err("Could not allocate chrdev region (err %d)\n", -ret);
2342                 goto done;
2343         }
2344
2345         qib_class = class_create(THIS_MODULE, "ipath");
2346         if (IS_ERR(qib_class)) {
2347                 ret = PTR_ERR(qib_class);
2348                 pr_err("Could not create device class (err %d)\n", -ret);
2349                 unregister_chrdev_region(qib_dev, QIB_NMINORS);
2350         }
2351
2352 done:
2353         return ret;
2354 }
2355
2356 void qib_dev_cleanup(void)
2357 {
2358         if (qib_class) {
2359                 class_destroy(qib_class);
2360                 qib_class = NULL;
2361         }
2362
2363         unregister_chrdev_region(qib_dev, QIB_NMINORS);
2364 }
2365
2366 static atomic_t user_count = ATOMIC_INIT(0);
2367
2368 static void qib_user_remove(struct qib_devdata *dd)
2369 {
2370         if (atomic_dec_return(&user_count) == 0)
2371                 qib_cdev_cleanup(&wildcard_cdev, &wildcard_device);
2372
2373         qib_cdev_cleanup(&dd->user_cdev, &dd->user_device);
2374 }
2375
2376 static int qib_user_add(struct qib_devdata *dd)
2377 {
2378         char name[10];
2379         int ret;
2380
2381         if (atomic_inc_return(&user_count) == 1) {
2382                 ret = qib_cdev_init(0, "ipath", &qib_file_ops,
2383                                     &wildcard_cdev, &wildcard_device);
2384                 if (ret)
2385                         goto done;
2386         }
2387
2388         snprintf(name, sizeof(name), "ipath%d", dd->unit);
2389         ret = qib_cdev_init(dd->unit + 1, name, &qib_file_ops,
2390                             &dd->user_cdev, &dd->user_device);
2391         if (ret)
2392                 qib_user_remove(dd);
2393 done:
2394         return ret;
2395 }
2396
2397 /*
2398  * Create per-unit files in /dev
2399  */
2400 int qib_device_create(struct qib_devdata *dd)
2401 {
2402         int r, ret;
2403
2404         r = qib_user_add(dd);
2405         ret = qib_diag_add(dd);
2406         if (r && !ret)
2407                 ret = r;
2408         return ret;
2409 }
2410
2411 /*
2412  * Remove per-unit files in /dev
2413  * void, core kernel returns no errors for this stuff
2414  */
2415 void qib_device_remove(struct qib_devdata *dd)
2416 {
2417         qib_user_remove(dd);
2418         qib_diag_remove(dd);
2419 }
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