drivers/gpu/drm/imx/ipuv3-crtc.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * i.MX IPUv3 Graphics driver
   4  *
   5  * Copyright (C) 2011 Sascha Hauer, Pengutronix
   6  */
   7
   8 #include <linux/clk.h>
   9 #include <linux/component.h>
  10 #include <linux/device.h>
  11 #include <linux/dma-mapping.h>
  12 #include <linux/errno.h>
  13 #include <linux/export.h>
  14 #include <linux/module.h>
  15 #include <linux/platform_device.h>
  16
  17 #include <video/imx-ipu-v3.h>
  18
  19 #include <drm/drm_atomic.h>
  20 #include <drm/drm_atomic_helper.h>
  21 #include <drm/drm_fb_cma_helper.h>
  22 #include <drm/drm_gem_cma_helper.h>
  23 #include <drm/drm_probe_helper.h>
  24 #include <drm/drm_vblank.h>
  25
  26 #include "imx-drm.h"
  27 #include "ipuv3-plane.h"
  28
  29 #define DRIVER_DESC             "i.MX IPUv3 Graphics"
  30
  31 struct ipu_crtc {
  32         struct device           *dev;
  33         struct drm_crtc         base;
  34
  35         /* plane[0] is the full plane, plane[1] is the partial plane */
  36         struct ipu_plane        *plane[2];
  37
  38         struct ipu_dc           *dc;
  39         struct ipu_di           *di;
  40         int                     irq;
  41         struct drm_pending_vblank_event *event;
  42 };
  43
  44 static inline struct ipu_crtc *to_ipu_crtc(struct drm_crtc *crtc)
  45 {
  46         return container_of(crtc, struct ipu_crtc, base);
  47 }
  48
  49 static void ipu_crtc_atomic_enable(struct drm_crtc *crtc,
  50                                    struct drm_atomic_state *state)
  51 {
  52         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
  53         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
  54
  55         ipu_prg_enable(ipu);
  56         ipu_dc_enable(ipu);
  57         ipu_dc_enable_channel(ipu_crtc->dc);
  58         ipu_di_enable(ipu_crtc->di);
  59 }
  60
  61 static void ipu_crtc_disable_planes(struct ipu_crtc *ipu_crtc,
  62                                     struct drm_crtc_state *old_crtc_state)
  63 {
  64         bool disable_partial = false;
  65         bool disable_full = false;
  66         struct drm_plane *plane;
  67
  68         drm_atomic_crtc_state_for_each_plane(plane, old_crtc_state) {
  69                 if (plane == &ipu_crtc->plane[0]->base)
  70                         disable_full = true;
  71                 if (&ipu_crtc->plane[1] && plane == &ipu_crtc->plane[1]->base)
  72                         disable_partial = true;
  73         }
  74
  75         if (disable_partial)
  76                 ipu_plane_disable(ipu_crtc->plane[1], true);
  77         if (disable_full)
  78                 ipu_plane_disable(ipu_crtc->plane[0], true);
  79 }
  80
  81 static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,
  82                                     struct drm_atomic_state *state)
  83 {
  84         struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state,
  85                                                                               crtc);
  86         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
  87         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
  88
  89         ipu_dc_disable_channel(ipu_crtc->dc);
  90         ipu_di_disable(ipu_crtc->di);
  91         /*
  92          * Planes must be disabled before DC clock is removed, as otherwise the
  93          * attached IDMACs will be left in undefined state, possibly hanging
  94          * the IPU or even system.
  95          */
  96         ipu_crtc_disable_planes(ipu_crtc, old_crtc_state);
  97         ipu_dc_disable(ipu);
  98         ipu_prg_disable(ipu);
  99
 100         drm_crtc_vblank_off(crtc);
 101
 102         spin_lock_irq(&crtc->dev->event_lock);
 103         if (crtc->state->event && !crtc->state->active) {
 104                 drm_crtc_send_vblank_event(crtc, crtc->state->event);
 105                 crtc->state->event = NULL;
 106         }
 107         spin_unlock_irq(&crtc->dev->event_lock);
 108 }
 109
 110 static void imx_drm_crtc_reset(struct drm_crtc *crtc)
 111 {
 112         struct imx_crtc_state *state;
 113
 114         if (crtc->state)
 115                 __drm_atomic_helper_crtc_destroy_state(crtc->state);
 116
 117         kfree(to_imx_crtc_state(crtc->state));
 118         crtc->state = NULL;
 119
 120         state = kzalloc(sizeof(*state), GFP_KERNEL);
 121         if (state)
 122                 __drm_atomic_helper_crtc_reset(crtc, &state->base);
 123 }
 124
 125 static struct drm_crtc_state *imx_drm_crtc_duplicate_state(struct drm_crtc *crtc)
 126 {
 127         struct imx_crtc_state *state;
 128
 129         state = kzalloc(sizeof(*state), GFP_KERNEL);
 130         if (!state)
 131                 return NULL;
 132
 133         __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
 134
 135         WARN_ON(state->base.crtc != crtc);
 136         state->base.crtc = crtc;
 137
 138         return &state->base;
 139 }
 140
 141 static void imx_drm_crtc_destroy_state(struct drm_crtc *crtc,
 142                                        struct drm_crtc_state *state)
 143 {
 144         __drm_atomic_helper_crtc_destroy_state(state);
 145         kfree(to_imx_crtc_state(state));
 146 }
 147
 148 static int ipu_enable_vblank(struct drm_crtc *crtc)
 149 {
 150         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 151
 152         enable_irq(ipu_crtc->irq);
 153
 154         return 0;
 155 }
 156
 157 static void ipu_disable_vblank(struct drm_crtc *crtc)
 158 {
 159         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 160
 161         disable_irq_nosync(ipu_crtc->irq);
 162 }
 163
 164 static const struct drm_crtc_funcs ipu_crtc_funcs = {
 165         .set_config = drm_atomic_helper_set_config,
 166         .destroy = drm_crtc_cleanup,
 167         .page_flip = drm_atomic_helper_page_flip,
 168         .reset = imx_drm_crtc_reset,
 169         .atomic_duplicate_state = imx_drm_crtc_duplicate_state,
 170         .atomic_destroy_state = imx_drm_crtc_destroy_state,
 171         .enable_vblank = ipu_enable_vblank,
 172         .disable_vblank = ipu_disable_vblank,
 173 };
 174
 175 static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
 176 {
 177         struct ipu_crtc *ipu_crtc = dev_id;
 178         struct drm_crtc *crtc = &ipu_crtc->base;
 179         unsigned long flags;
 180         int i;
 181
 182         drm_crtc_handle_vblank(crtc);
 183
 184         if (ipu_crtc->event) {
 185                 for (i = 0; i < ARRAY_SIZE(ipu_crtc->plane); i++) {
 186                         struct ipu_plane *plane = ipu_crtc->plane[i];
 187
 188                         if (!plane)
 189                                 continue;
 190
 191                         if (ipu_plane_atomic_update_pending(&plane->base))
 192                                 break;
 193                 }
 194
 195                 if (i == ARRAY_SIZE(ipu_crtc->plane)) {
 196                         spin_lock_irqsave(&crtc->dev->event_lock, flags);
 197                         drm_crtc_send_vblank_event(crtc, ipu_crtc->event);
 198                         ipu_crtc->event = NULL;
 199                         drm_crtc_vblank_put(crtc);
 200                         spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
 201                 }
 202         }
 203
 204         return IRQ_HANDLED;
 205 }
 206
 207 static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
 208                                   const struct drm_display_mode *mode,
 209                                   struct drm_display_mode *adjusted_mode)
 210 {
 211         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 212         struct videomode vm;
 213         int ret;
 214
 215         drm_display_mode_to_videomode(adjusted_mode, &vm);
 216
 217         ret = ipu_di_adjust_videomode(ipu_crtc->di, &vm);
 218         if (ret)
 219                 return false;
 220
 221         if ((vm.vsync_len == 0) || (vm.hsync_len == 0))
 222                 return false;
 223
 224         drm_display_mode_from_videomode(&vm, adjusted_mode);
 225
 226         return true;
 227 }
 228
 229 static int ipu_crtc_atomic_check(struct drm_crtc *crtc,
 230                                  struct drm_atomic_state *state)
 231 {
 232         struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
 233                                                                           crtc);
 234         u32 primary_plane_mask = drm_plane_mask(crtc->primary);
 235
 236         if (crtc_state->active && (primary_plane_mask & crtc_state->plane_mask) == 0)
 237                 return -EINVAL;
 238
 239         return 0;
 240 }
 241
 242 static void ipu_crtc_atomic_begin(struct drm_crtc *crtc,
 243                                   struct drm_atomic_state *state)
 244 {
 245         drm_crtc_vblank_on(crtc);
 246 }
 247
 248 static void ipu_crtc_atomic_flush(struct drm_crtc *crtc,
 249                                   struct drm_atomic_state *state)
 250 {
 251         spin_lock_irq(&crtc->dev->event_lock);
 252         if (crtc->state->event) {
 253                 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 254
 255                 WARN_ON(drm_crtc_vblank_get(crtc));
 256                 ipu_crtc->event = crtc->state->event;
 257                 crtc->state->event = NULL;
 258         }
 259         spin_unlock_irq(&crtc->dev->event_lock);
 260 }
 261
 262 static void ipu_crtc_mode_set_nofb(struct drm_crtc *crtc)
 263 {
 264         struct drm_device *dev = crtc->dev;
 265         struct drm_encoder *encoder;
 266         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 267         struct drm_display_mode *mode = &crtc->state->adjusted_mode;
 268         struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc->state);
 269         struct ipu_di_signal_cfg sig_cfg = {};
 270         unsigned long encoder_types = 0;
 271
 272         dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__,
 273                         mode->hdisplay);
 274         dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__,
 275                         mode->vdisplay);
 276
 277         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
 278                 if (encoder->crtc == crtc)
 279                         encoder_types |= BIT(encoder->encoder_type);
 280         }
 281
 282         dev_dbg(ipu_crtc->dev, "%s: attached to encoder types 0x%lx\n",
 283                 __func__, encoder_types);
 284
 285         /*
 286          * If we have DAC or LDB, then we need the IPU DI clock to be
 287          * the same as the LDB DI clock. For TVDAC, derive the IPU DI
 288          * clock from 27 MHz TVE_DI clock, but allow to divide it.
 289          */
 290         if (encoder_types & (BIT(DRM_MODE_ENCODER_DAC) |
 291                              BIT(DRM_MODE_ENCODER_LVDS)))
 292                 sig_cfg.clkflags = IPU_DI_CLKMODE_SYNC | IPU_DI_CLKMODE_EXT;
 293         else if (encoder_types & BIT(DRM_MODE_ENCODER_TVDAC))
 294                 sig_cfg.clkflags = IPU_DI_CLKMODE_EXT;
 295         else
 296                 sig_cfg.clkflags = 0;
 297
 298         sig_cfg.enable_pol = !(imx_crtc_state->bus_flags & DRM_BUS_FLAG_DE_LOW);
 299         /* Default to driving pixel data on negative clock edges */
 300         sig_cfg.clk_pol = !!(imx_crtc_state->bus_flags &
 301                              DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE);
 302         sig_cfg.bus_format = imx_crtc_state->bus_format;
 303         sig_cfg.v_to_h_sync = 0;
 304         sig_cfg.hsync_pin = imx_crtc_state->di_hsync_pin;
 305         sig_cfg.vsync_pin = imx_crtc_state->di_vsync_pin;
 306
 307         drm_display_mode_to_videomode(mode, &sig_cfg.mode);
 308
 309         ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di,
 310                          mode->flags & DRM_MODE_FLAG_INTERLACE,
 311                          imx_crtc_state->bus_format, mode->hdisplay);
 312         ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
 313 }
 314
 315 static const struct drm_crtc_helper_funcs ipu_helper_funcs = {
 316         .mode_fixup = ipu_crtc_mode_fixup,
 317         .mode_set_nofb = ipu_crtc_mode_set_nofb,
 318         .atomic_check = ipu_crtc_atomic_check,
 319         .atomic_begin = ipu_crtc_atomic_begin,
 320         .atomic_flush = ipu_crtc_atomic_flush,
 321         .atomic_disable = ipu_crtc_atomic_disable,
 322         .atomic_enable = ipu_crtc_atomic_enable,
 323 };
 324
 325 static void ipu_put_resources(struct ipu_crtc *ipu_crtc)
 326 {
 327         if (!IS_ERR_OR_NULL(ipu_crtc->dc))
 328                 ipu_dc_put(ipu_crtc->dc);
 329         if (!IS_ERR_OR_NULL(ipu_crtc->di))
 330                 ipu_di_put(ipu_crtc->di);
 331 }
 332
 333 static int ipu_get_resources(struct ipu_crtc *ipu_crtc,
 334                 struct ipu_client_platformdata *pdata)
 335 {
 336         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
 337         int ret;
 338
 339         ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc);
 340         if (IS_ERR(ipu_crtc->dc)) {
 341                 ret = PTR_ERR(ipu_crtc->dc);
 342                 goto err_out;
 343         }
 344
 345         ipu_crtc->di = ipu_di_get(ipu, pdata->di);
 346         if (IS_ERR(ipu_crtc->di)) {
 347                 ret = PTR_ERR(ipu_crtc->di);
 348                 goto err_out;
 349         }
 350
 351         return 0;
 352 err_out:
 353         ipu_put_resources(ipu_crtc);
 354
 355         return ret;
 356 }
 357
 358 static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
 359         struct ipu_client_platformdata *pdata, struct drm_device *drm)
 360 {
 361         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
 362         struct drm_crtc *crtc = &ipu_crtc->base;
 363         int dp = -EINVAL;
 364         int ret;
 365
 366         ret = ipu_get_resources(ipu_crtc, pdata);
 367         if (ret) {
 368                 dev_err(ipu_crtc->dev, "getting resources failed with %d.\n",
 369                                 ret);
 370                 return ret;
 371         }
 372
 373         if (pdata->dp >= 0)
 374                 dp = IPU_DP_FLOW_SYNC_BG;
 375         ipu_crtc->plane[0] = ipu_plane_init(drm, ipu, pdata->dma[0], dp, 0,
 376                                             DRM_PLANE_TYPE_PRIMARY);
 377         if (IS_ERR(ipu_crtc->plane[0])) {
 378                 ret = PTR_ERR(ipu_crtc->plane[0]);
 379                 goto err_put_resources;
 380         }
 381
 382         crtc->port = pdata->of_node;
 383         drm_crtc_helper_add(crtc, &ipu_helper_funcs);
 384         drm_crtc_init_with_planes(drm, crtc, &ipu_crtc->plane[0]->base, NULL,
 385                                   &ipu_crtc_funcs, NULL);
 386
 387         ret = ipu_plane_get_resources(ipu_crtc->plane[0]);
 388         if (ret) {
 389                 dev_err(ipu_crtc->dev, "getting plane 0 resources failed with %d.\n",
 390                         ret);
 391                 goto err_put_resources;
 392         }
 393
 394         /* If this crtc is using the DP, add an overlay plane */
 395         if (pdata->dp >= 0 && pdata->dma[1] > 0) {
 396                 ipu_crtc->plane[1] = ipu_plane_init(drm, ipu, pdata->dma[1],
 397                                                 IPU_DP_FLOW_SYNC_FG,
 398                                                 drm_crtc_mask(&ipu_crtc->base),
 399                                                 DRM_PLANE_TYPE_OVERLAY);
 400                 if (IS_ERR(ipu_crtc->plane[1])) {
 401                         ipu_crtc->plane[1] = NULL;
 402                 } else {
 403                         ret = ipu_plane_get_resources(ipu_crtc->plane[1]);
 404                         if (ret) {
 405                                 dev_err(ipu_crtc->dev, "getting plane 1 "
 406                                         "resources failed with %d.\n", ret);
 407                                 goto err_put_plane0_res;
 408                         }
 409                 }
 410         }
 411
 412         ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]);
 413         ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0,
 414                         "imx_drm", ipu_crtc);
 415         if (ret < 0) {
 416                 dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret);
 417                 goto err_put_plane1_res;
 418         }
 419         /* Only enable IRQ when we actually need it to trigger work. */
 420         disable_irq(ipu_crtc->irq);
 421
 422         return 0;
 423
 424 err_put_plane1_res:
 425         if (ipu_crtc->plane[1])
 426                 ipu_plane_put_resources(ipu_crtc->plane[1]);
 427 err_put_plane0_res:
 428         ipu_plane_put_resources(ipu_crtc->plane[0]);
 429 err_put_resources:
 430         ipu_put_resources(ipu_crtc);
 431
 432         return ret;
 433 }
 434
 435 static int ipu_drm_bind(struct device *dev, struct device *master, void *data)
 436 {
 437         struct ipu_client_platformdata *pdata = dev->platform_data;
 438         struct drm_device *drm = data;
 439         struct ipu_crtc *ipu_crtc;
 440
 441         ipu_crtc = dev_get_drvdata(dev);
 442         memset(ipu_crtc, 0, sizeof(*ipu_crtc));
 443
 444         ipu_crtc->dev = dev;
 445
 446         return ipu_crtc_init(ipu_crtc, pdata, drm);
 447 }
 448
 449 static void ipu_drm_unbind(struct device *dev, struct device *master,
 450         void *data)
 451 {
 452         struct ipu_crtc *ipu_crtc = dev_get_drvdata(dev);
 453
 454         ipu_put_resources(ipu_crtc);
 455         if (ipu_crtc->plane[1])
 456                 ipu_plane_put_resources(ipu_crtc->plane[1]);
 457         ipu_plane_put_resources(ipu_crtc->plane[0]);
 458 }
 459
 460 static const struct component_ops ipu_crtc_ops = {
 461         .bind = ipu_drm_bind,
 462         .unbind = ipu_drm_unbind,
 463 };
 464
 465 static int ipu_drm_probe(struct platform_device *pdev)
 466 {
 467         struct device *dev = &pdev->dev;
 468         struct ipu_crtc *ipu_crtc;
 469         int ret;
 470
 471         if (!dev->platform_data)
 472                 return -EINVAL;
 473
 474         ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
 475         if (ret)
 476                 return ret;
 477
 478         ipu_crtc = devm_kzalloc(dev, sizeof(*ipu_crtc), GFP_KERNEL);
 479         if (!ipu_crtc)
 480                 return -ENOMEM;
 481
 482         dev_set_drvdata(dev, ipu_crtc);
 483
 484         return component_add(dev, &ipu_crtc_ops);
 485 }
 486
 487 static int ipu_drm_remove(struct platform_device *pdev)
 488 {
 489         component_del(&pdev->dev, &ipu_crtc_ops);
 490         return 0;
 491 }
 492
 493 struct platform_driver ipu_drm_driver = {
 494         .driver = {
 495                 .name = "imx-ipuv3-crtc",
 496         },
 497         .probe = ipu_drm_probe,
 498         .remove = ipu_drm_remove,
 499 };