drivers/gpu/drm/vmwgfx/vmwgfx_surface.c

   1 // SPDX-License-Identifier: GPL-2.0 OR MIT
   2 /**************************************************************************
   3  *
   4  * Copyright 2009-2015 VMware, Inc., Palo Alto, CA., USA
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #include <drm/ttm/ttm_placement.h>
  29
  30 #include "vmwgfx_drv.h"
  31 #include "vmwgfx_resource_priv.h"
  32 #include "vmwgfx_so.h"
  33 #include "vmwgfx_binding.h"
  34 #include "device_include/svga3d_surfacedefs.h"
  35
  36 #define SVGA3D_FLAGS_64(upper32, lower32) (((uint64_t)upper32 << 32) | lower32)
  37 #define SVGA3D_FLAGS_UPPER_32(svga3d_flags) (svga3d_flags >> 32)
  38 #define SVGA3D_FLAGS_LOWER_32(svga3d_flags) \
  39         (svga3d_flags & ((uint64_t)U32_MAX))
  40
  41 /**
  42  * struct vmw_user_surface - User-space visible surface resource
  43  *
  44  * @base:           The TTM base object handling user-space visibility.
  45  * @srf:            The surface metadata.
  46  * @size:           TTM accounting size for the surface.
  47  * @master: master of the creating client. Used for security check.
  48  */
  49 struct vmw_user_surface {
  50         struct ttm_prime_object prime;
  51         struct vmw_surface srf;
  52         uint32_t size;
  53         struct drm_master *master;
  54         struct ttm_base_object *backup_base;
  55 };
  56
  57 /**
  58  * struct vmw_surface_offset - Backing store mip level offset info
  59  *
  60  * @face:           Surface face.
  61  * @mip:            Mip level.
  62  * @bo_offset:      Offset into backing store of this mip level.
  63  *
  64  */
  65 struct vmw_surface_offset {
  66         uint32_t face;
  67         uint32_t mip;
  68         uint32_t bo_offset;
  69 };
  70
  71 /**
  72  * vmw_surface_dirty - Surface dirty-tracker
  73  * @cache: Cached layout information of the surface.
  74  * @size: Accounting size for the struct vmw_surface_dirty.
  75  * @num_subres: Number of subresources.
  76  * @boxes: Array of SVGA3dBoxes indicating dirty regions. One per subresource.
  77  */
  78 struct vmw_surface_dirty {
  79         struct svga3dsurface_cache cache;
  80         size_t size;
  81         u32 num_subres;
  82         SVGA3dBox boxes[0];
  83 };
  84
  85 static void vmw_user_surface_free(struct vmw_resource *res);
  86 static struct vmw_resource *
  87 vmw_user_surface_base_to_res(struct ttm_base_object *base);
  88 static int vmw_legacy_srf_bind(struct vmw_resource *res,
  89                                struct ttm_validate_buffer *val_buf);
  90 static int vmw_legacy_srf_unbind(struct vmw_resource *res,
  91                                  bool readback,
  92                                  struct ttm_validate_buffer *val_buf);
  93 static int vmw_legacy_srf_create(struct vmw_resource *res);
  94 static int vmw_legacy_srf_destroy(struct vmw_resource *res);
  95 static int vmw_gb_surface_create(struct vmw_resource *res);
  96 static int vmw_gb_surface_bind(struct vmw_resource *res,
  97                                struct ttm_validate_buffer *val_buf);
  98 static int vmw_gb_surface_unbind(struct vmw_resource *res,
  99                                  bool readback,
 100                                  struct ttm_validate_buffer *val_buf);
 101 static int vmw_gb_surface_destroy(struct vmw_resource *res);
 102 static int
 103 vmw_gb_surface_define_internal(struct drm_device *dev,
 104                                struct drm_vmw_gb_surface_create_ext_req *req,
 105                                struct drm_vmw_gb_surface_create_rep *rep,
 106                                struct drm_file *file_priv);
 107 static int
 108 vmw_gb_surface_reference_internal(struct drm_device *dev,
 109                                   struct drm_vmw_surface_arg *req,
 110                                   struct drm_vmw_gb_surface_ref_ext_rep *rep,
 111                                   struct drm_file *file_priv);
 112
 113 static void vmw_surface_dirty_free(struct vmw_resource *res);
 114 static int vmw_surface_dirty_alloc(struct vmw_resource *res);
 115 static int vmw_surface_dirty_sync(struct vmw_resource *res);
 116 static void vmw_surface_dirty_range_add(struct vmw_resource *res, size_t start,
 117                                         size_t end);
 118 static int vmw_surface_clean(struct vmw_resource *res);
 119
 120 static const struct vmw_user_resource_conv user_surface_conv = {
 121         .object_type = VMW_RES_SURFACE,
 122         .base_obj_to_res = vmw_user_surface_base_to_res,
 123         .res_free = vmw_user_surface_free
 124 };
 125
 126 const struct vmw_user_resource_conv *user_surface_converter =
 127         &user_surface_conv;
 128
 129
 130 static uint64_t vmw_user_surface_size;
 131
 132 static const struct vmw_res_func vmw_legacy_surface_func = {
 133         .res_type = vmw_res_surface,
 134         .needs_backup = false,
 135         .may_evict = true,
 136         .prio = 1,
 137         .dirty_prio = 1,
 138         .type_name = "legacy surfaces",
 139         .backup_placement = &vmw_srf_placement,
 140         .create = &vmw_legacy_srf_create,
 141         .destroy = &vmw_legacy_srf_destroy,
 142         .bind = &vmw_legacy_srf_bind,
 143         .unbind = &vmw_legacy_srf_unbind
 144 };
 145
 146 static const struct vmw_res_func vmw_gb_surface_func = {
 147         .res_type = vmw_res_surface,
 148         .needs_backup = true,
 149         .may_evict = true,
 150         .prio = 1,
 151         .dirty_prio = 2,
 152         .type_name = "guest backed surfaces",
 153         .backup_placement = &vmw_mob_placement,
 154         .create = vmw_gb_surface_create,
 155         .destroy = vmw_gb_surface_destroy,
 156         .bind = vmw_gb_surface_bind,
 157         .unbind = vmw_gb_surface_unbind,
 158         .dirty_alloc = vmw_surface_dirty_alloc,
 159         .dirty_free = vmw_surface_dirty_free,
 160         .dirty_sync = vmw_surface_dirty_sync,
 161         .dirty_range_add = vmw_surface_dirty_range_add,
 162         .clean = vmw_surface_clean,
 163 };
 164
 165 /**
 166  * struct vmw_surface_dma - SVGA3D DMA command
 167  */
 168 struct vmw_surface_dma {
 169         SVGA3dCmdHeader header;
 170         SVGA3dCmdSurfaceDMA body;
 171         SVGA3dCopyBox cb;
 172         SVGA3dCmdSurfaceDMASuffix suffix;
 173 };
 174
 175 /**
 176  * struct vmw_surface_define - SVGA3D Surface Define command
 177  */
 178 struct vmw_surface_define {
 179         SVGA3dCmdHeader header;
 180         SVGA3dCmdDefineSurface body;
 181 };
 182
 183 /**
 184  * struct vmw_surface_destroy - SVGA3D Surface Destroy command
 185  */
 186 struct vmw_surface_destroy {
 187         SVGA3dCmdHeader header;
 188         SVGA3dCmdDestroySurface body;
 189 };
 190
 191
 192 /**
 193  * vmw_surface_dma_size - Compute fifo size for a dma command.
 194  *
 195  * @srf: Pointer to a struct vmw_surface
 196  *
 197  * Computes the required size for a surface dma command for backup or
 198  * restoration of the surface represented by @srf.
 199  */
 200 static inline uint32_t vmw_surface_dma_size(const struct vmw_surface *srf)
 201 {
 202         return srf->num_sizes * sizeof(struct vmw_surface_dma);
 203 }
 204
 205
 206 /**
 207  * vmw_surface_define_size - Compute fifo size for a surface define command.
 208  *
 209  * @srf: Pointer to a struct vmw_surface
 210  *
 211  * Computes the required size for a surface define command for the definition
 212  * of the surface represented by @srf.
 213  */
 214 static inline uint32_t vmw_surface_define_size(const struct vmw_surface *srf)
 215 {
 216         return sizeof(struct vmw_surface_define) + srf->num_sizes *
 217                 sizeof(SVGA3dSize);
 218 }
 219
 220
 221 /**
 222  * vmw_surface_destroy_size - Compute fifo size for a surface destroy command.
 223  *
 224  * Computes the required size for a surface destroy command for the destruction
 225  * of a hw surface.
 226  */
 227 static inline uint32_t vmw_surface_destroy_size(void)
 228 {
 229         return sizeof(struct vmw_surface_destroy);
 230 }
 231
 232 /**
 233  * vmw_surface_destroy_encode - Encode a surface_destroy command.
 234  *
 235  * @id: The surface id
 236  * @cmd_space: Pointer to memory area in which the commands should be encoded.
 237  */
 238 static void vmw_surface_destroy_encode(uint32_t id,
 239                                        void *cmd_space)
 240 {
 241         struct vmw_surface_destroy *cmd = (struct vmw_surface_destroy *)
 242                 cmd_space;
 243
 244         cmd->header.id = SVGA_3D_CMD_SURFACE_DESTROY;
 245         cmd->header.size = sizeof(cmd->body);
 246         cmd->body.sid = id;
 247 }
 248
 249 /**
 250  * vmw_surface_define_encode - Encode a surface_define command.
 251  *
 252  * @srf: Pointer to a struct vmw_surface object.
 253  * @cmd_space: Pointer to memory area in which the commands should be encoded.
 254  */
 255 static void vmw_surface_define_encode(const struct vmw_surface *srf,
 256                                       void *cmd_space)
 257 {
 258         struct vmw_surface_define *cmd = (struct vmw_surface_define *)
 259                 cmd_space;
 260         struct drm_vmw_size *src_size;
 261         SVGA3dSize *cmd_size;
 262         uint32_t cmd_len;
 263         int i;
 264
 265         cmd_len = sizeof(cmd->body) + srf->num_sizes * sizeof(SVGA3dSize);
 266
 267         cmd->header.id = SVGA_3D_CMD_SURFACE_DEFINE;
 268         cmd->header.size = cmd_len;
 269         cmd->body.sid = srf->res.id;
 270         /*
 271          * Downcast of surfaceFlags, was upcasted when received from user-space,
 272          * since driver internally stores as 64 bit.
 273          * For legacy surface define only 32 bit flag is supported.
 274          */
 275         cmd->body.surfaceFlags = (SVGA3dSurface1Flags)srf->flags;
 276         cmd->body.format = srf->format;
 277         for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i)
 278                 cmd->body.face[i].numMipLevels = srf->mip_levels[i];
 279
 280         cmd += 1;
 281         cmd_size = (SVGA3dSize *) cmd;
 282         src_size = srf->sizes;
 283
 284         for (i = 0; i < srf->num_sizes; ++i, cmd_size++, src_size++) {
 285                 cmd_size->width = src_size->width;
 286                 cmd_size->height = src_size->height;
 287                 cmd_size->depth = src_size->depth;
 288         }
 289 }
 290
 291 /**
 292  * vmw_surface_dma_encode - Encode a surface_dma command.
 293  *
 294  * @srf: Pointer to a struct vmw_surface object.
 295  * @cmd_space: Pointer to memory area in which the commands should be encoded.
 296  * @ptr: Pointer to an SVGAGuestPtr indicating where the surface contents
 297  * should be placed or read from.
 298  * @to_surface: Boolean whether to DMA to the surface or from the surface.
 299  */
 300 static void vmw_surface_dma_encode(struct vmw_surface *srf,
 301                                    void *cmd_space,
 302                                    const SVGAGuestPtr *ptr,
 303                                    bool to_surface)
 304 {
 305         uint32_t i;
 306         struct vmw_surface_dma *cmd = (struct vmw_surface_dma *)cmd_space;
 307         const struct svga3d_surface_desc *desc =
 308                 svga3dsurface_get_desc(srf->format);
 309
 310         for (i = 0; i < srf->num_sizes; ++i) {
 311                 SVGA3dCmdHeader *header = &cmd->header;
 312                 SVGA3dCmdSurfaceDMA *body = &cmd->body;
 313                 SVGA3dCopyBox *cb = &cmd->cb;
 314                 SVGA3dCmdSurfaceDMASuffix *suffix = &cmd->suffix;
 315                 const struct vmw_surface_offset *cur_offset = &srf->offsets[i];
 316                 const struct drm_vmw_size *cur_size = &srf->sizes[i];
 317
 318                 header->id = SVGA_3D_CMD_SURFACE_DMA;
 319                 header->size = sizeof(*body) + sizeof(*cb) + sizeof(*suffix);
 320
 321                 body->guest.ptr = *ptr;
 322                 body->guest.ptr.offset += cur_offset->bo_offset;
 323                 body->guest.pitch = svga3dsurface_calculate_pitch(desc,
 324                                                                   cur_size);
 325                 body->host.sid = srf->res.id;
 326                 body->host.face = cur_offset->face;
 327                 body->host.mipmap = cur_offset->mip;
 328                 body->transfer = ((to_surface) ?  SVGA3D_WRITE_HOST_VRAM :
 329                                   SVGA3D_READ_HOST_VRAM);
 330                 cb->x = 0;
 331                 cb->y = 0;
 332                 cb->z = 0;
 333                 cb->srcx = 0;
 334                 cb->srcy = 0;
 335                 cb->srcz = 0;
 336                 cb->w = cur_size->width;
 337                 cb->h = cur_size->height;
 338                 cb->d = cur_size->depth;
 339
 340                 suffix->suffixSize = sizeof(*suffix);
 341                 suffix->maximumOffset =
 342                         svga3dsurface_get_image_buffer_size(desc, cur_size,
 343                                                             body->guest.pitch);
 344                 suffix->flags.discard = 0;
 345                 suffix->flags.unsynchronized = 0;
 346                 suffix->flags.reserved = 0;
 347                 ++cmd;
 348         }
 349 };
 350
 351
 352 /**
 353  * vmw_hw_surface_destroy - destroy a Device surface
 354  *
 355  * @res:        Pointer to a struct vmw_resource embedded in a struct
 356  *              vmw_surface.
 357  *
 358  * Destroys a the device surface associated with a struct vmw_surface if
 359  * any, and adjusts accounting and resource count accordingly.
 360  */
 361 static void vmw_hw_surface_destroy(struct vmw_resource *res)
 362 {
 363
 364         struct vmw_private *dev_priv = res->dev_priv;
 365         void *cmd;
 366
 367         if (res->func->destroy == vmw_gb_surface_destroy) {
 368                 (void) vmw_gb_surface_destroy(res);
 369                 return;
 370         }
 371
 372         if (res->id != -1) {
 373
 374                 cmd = VMW_FIFO_RESERVE(dev_priv, vmw_surface_destroy_size());
 375                 if (unlikely(!cmd))
 376                         return;
 377
 378                 vmw_surface_destroy_encode(res->id, cmd);
 379                 vmw_fifo_commit(dev_priv, vmw_surface_destroy_size());
 380
 381                 /*
 382                  * used_memory_size_atomic, or separate lock
 383                  * to avoid taking dev_priv::cmdbuf_mutex in
 384                  * the destroy path.
 385                  */
 386
 387                 mutex_lock(&dev_priv->cmdbuf_mutex);
 388                 dev_priv->used_memory_size -= res->backup_size;
 389                 mutex_unlock(&dev_priv->cmdbuf_mutex);
 390         }
 391 }
 392
 393 /**
 394  * vmw_legacy_srf_create - Create a device surface as part of the
 395  * resource validation process.
 396  *
 397  * @res: Pointer to a struct vmw_surface.
 398  *
 399  * If the surface doesn't have a hw id.
 400  *
 401  * Returns -EBUSY if there wasn't sufficient device resources to
 402  * complete the validation. Retry after freeing up resources.
 403  *
 404  * May return other errors if the kernel is out of guest resources.
 405  */
 406 static int vmw_legacy_srf_create(struct vmw_resource *res)
 407 {
 408         struct vmw_private *dev_priv = res->dev_priv;
 409         struct vmw_surface *srf;
 410         uint32_t submit_size;
 411         uint8_t *cmd;
 412         int ret;
 413
 414         if (likely(res->id != -1))
 415                 return 0;
 416
 417         srf = vmw_res_to_srf(res);
 418         if (unlikely(dev_priv->used_memory_size + res->backup_size >=
 419                      dev_priv->memory_size))
 420                 return -EBUSY;
 421
 422         /*
 423          * Alloc id for the resource.
 424          */
 425
 426         ret = vmw_resource_alloc_id(res);
 427         if (unlikely(ret != 0)) {
 428                 DRM_ERROR("Failed to allocate a surface id.\n");
 429                 goto out_no_id;
 430         }
 431
 432         if (unlikely(res->id >= SVGA3D_MAX_SURFACE_IDS)) {
 433                 ret = -EBUSY;
 434                 goto out_no_fifo;
 435         }
 436
 437         /*
 438          * Encode surface define- commands.
 439          */
 440
 441         submit_size = vmw_surface_define_size(srf);
 442         cmd = VMW_FIFO_RESERVE(dev_priv, submit_size);
 443         if (unlikely(!cmd)) {
 444                 ret = -ENOMEM;
 445                 goto out_no_fifo;
 446         }
 447
 448         vmw_surface_define_encode(srf, cmd);
 449         vmw_fifo_commit(dev_priv, submit_size);
 450         vmw_fifo_resource_inc(dev_priv);
 451
 452         /*
 453          * Surface memory usage accounting.
 454          */
 455
 456         dev_priv->used_memory_size += res->backup_size;
 457         return 0;
 458
 459 out_no_fifo:
 460         vmw_resource_release_id(res);
 461 out_no_id:
 462         return ret;
 463 }
 464
 465 /**
 466  * vmw_legacy_srf_dma - Copy backup data to or from a legacy surface.
 467  *
 468  * @res:            Pointer to a struct vmw_res embedded in a struct
 469  *                  vmw_surface.
 470  * @val_buf:        Pointer to a struct ttm_validate_buffer containing
 471  *                  information about the backup buffer.
 472  * @bind:           Boolean wether to DMA to the surface.
 473  *
 474  * Transfer backup data to or from a legacy surface as part of the
 475  * validation process.
 476  * May return other errors if the kernel is out of guest resources.
 477  * The backup buffer will be fenced or idle upon successful completion,
 478  * and if the surface needs persistent backup storage, the backup buffer
 479  * will also be returned reserved iff @bind is true.
 480  */
 481 static int vmw_legacy_srf_dma(struct vmw_resource *res,
 482                               struct ttm_validate_buffer *val_buf,
 483                               bool bind)
 484 {
 485         SVGAGuestPtr ptr;
 486         struct vmw_fence_obj *fence;
 487         uint32_t submit_size;
 488         struct vmw_surface *srf = vmw_res_to_srf(res);
 489         uint8_t *cmd;
 490         struct vmw_private *dev_priv = res->dev_priv;
 491
 492         BUG_ON(!val_buf->bo);
 493         submit_size = vmw_surface_dma_size(srf);
 494         cmd = VMW_FIFO_RESERVE(dev_priv, submit_size);
 495         if (unlikely(!cmd))
 496                 return -ENOMEM;
 497
 498         vmw_bo_get_guest_ptr(val_buf->bo, &ptr);
 499         vmw_surface_dma_encode(srf, cmd, &ptr, bind);
 500
 501         vmw_fifo_commit(dev_priv, submit_size);
 502
 503         /*
 504          * Create a fence object and fence the backup buffer.
 505          */
 506
 507         (void) vmw_execbuf_fence_commands(NULL, dev_priv,
 508                                           &fence, NULL);
 509
 510         vmw_bo_fence_single(val_buf->bo, fence);
 511
 512         if (likely(fence != NULL))
 513                 vmw_fence_obj_unreference(&fence);
 514
 515         return 0;
 516 }
 517
 518 /**
 519  * vmw_legacy_srf_bind - Perform a legacy surface bind as part of the
 520  *                       surface validation process.
 521  *
 522  * @res:            Pointer to a struct vmw_res embedded in a struct
 523  *                  vmw_surface.
 524  * @val_buf:        Pointer to a struct ttm_validate_buffer containing
 525  *                  information about the backup buffer.
 526  *
 527  * This function will copy backup data to the surface if the
 528  * backup buffer is dirty.
 529  */
 530 static int vmw_legacy_srf_bind(struct vmw_resource *res,
 531                                struct ttm_validate_buffer *val_buf)
 532 {
 533         if (!res->backup_dirty)
 534                 return 0;
 535
 536         return vmw_legacy_srf_dma(res, val_buf, true);
 537 }
 538
 539
 540 /**
 541  * vmw_legacy_srf_unbind - Perform a legacy surface unbind as part of the
 542  *                         surface eviction process.
 543  *
 544  * @res:            Pointer to a struct vmw_res embedded in a struct
 545  *                  vmw_surface.
 546  * @val_buf:        Pointer to a struct ttm_validate_buffer containing
 547  *                  information about the backup buffer.
 548  *
 549  * This function will copy backup data from the surface.
 550  */
 551 static int vmw_legacy_srf_unbind(struct vmw_resource *res,
 552                                  bool readback,
 553                                  struct ttm_validate_buffer *val_buf)
 554 {
 555         if (unlikely(readback))
 556                 return vmw_legacy_srf_dma(res, val_buf, false);
 557         return 0;
 558 }
 559
 560 /**
 561  * vmw_legacy_srf_destroy - Destroy a device surface as part of a
 562  *                          resource eviction process.
 563  *
 564  * @res:            Pointer to a struct vmw_res embedded in a struct
 565  *                  vmw_surface.
 566  */
 567 static int vmw_legacy_srf_destroy(struct vmw_resource *res)
 568 {
 569         struct vmw_private *dev_priv = res->dev_priv;
 570         uint32_t submit_size;
 571         uint8_t *cmd;
 572
 573         BUG_ON(res->id == -1);
 574
 575         /*
 576          * Encode the dma- and surface destroy commands.
 577          */
 578
 579         submit_size = vmw_surface_destroy_size();
 580         cmd = VMW_FIFO_RESERVE(dev_priv, submit_size);
 581         if (unlikely(!cmd))
 582                 return -ENOMEM;
 583
 584         vmw_surface_destroy_encode(res->id, cmd);
 585         vmw_fifo_commit(dev_priv, submit_size);
 586
 587         /*
 588          * Surface memory usage accounting.
 589          */
 590
 591         dev_priv->used_memory_size -= res->backup_size;
 592
 593         /*
 594          * Release the surface ID.
 595          */
 596
 597         vmw_resource_release_id(res);
 598         vmw_fifo_resource_dec(dev_priv);
 599
 600         return 0;
 601 }
 602
 603
 604 /**
 605  * vmw_surface_init - initialize a struct vmw_surface
 606  *
 607  * @dev_priv:       Pointer to a device private struct.
 608  * @srf:            Pointer to the struct vmw_surface to initialize.
 609  * @res_free:       Pointer to a resource destructor used to free
 610  *                  the object.
 611  */
 612 static int vmw_surface_init(struct vmw_private *dev_priv,
 613                             struct vmw_surface *srf,
 614                             void (*res_free) (struct vmw_resource *res))
 615 {
 616         int ret;
 617         struct vmw_resource *res = &srf->res;
 618
 619         BUG_ON(!res_free);
 620         ret = vmw_resource_init(dev_priv, res, true, res_free,
 621                                 (dev_priv->has_mob) ? &vmw_gb_surface_func :
 622                                 &vmw_legacy_surface_func);
 623
 624         if (unlikely(ret != 0)) {
 625                 res_free(res);
 626                 return ret;
 627         }
 628
 629         /*
 630          * The surface won't be visible to hardware until a
 631          * surface validate.
 632          */
 633
 634         INIT_LIST_HEAD(&srf->view_list);
 635         res->hw_destroy = vmw_hw_surface_destroy;
 636         return ret;
 637 }
 638
 639 /**
 640  * vmw_user_surface_base_to_res - TTM base object to resource converter for
 641  *                                user visible surfaces
 642  *
 643  * @base:           Pointer to a TTM base object
 644  *
 645  * Returns the struct vmw_resource embedded in a struct vmw_surface
 646  * for the user-visible object identified by the TTM base object @base.
 647  */
 648 static struct vmw_resource *
 649 vmw_user_surface_base_to_res(struct ttm_base_object *base)
 650 {
 651         return &(container_of(base, struct vmw_user_surface,
 652                               prime.base)->srf.res);
 653 }
 654
 655 /**
 656  * vmw_user_surface_free - User visible surface resource destructor
 657  *
 658  * @res:            A struct vmw_resource embedded in a struct vmw_surface.
 659  */
 660 static void vmw_user_surface_free(struct vmw_resource *res)
 661 {
 662         struct vmw_surface *srf = vmw_res_to_srf(res);
 663         struct vmw_user_surface *user_srf =
 664             container_of(srf, struct vmw_user_surface, srf);
 665         struct vmw_private *dev_priv = srf->res.dev_priv;
 666         uint32_t size = user_srf->size;
 667
 668         WARN_ON_ONCE(res->dirty);
 669         if (user_srf->master)
 670                 drm_master_put(&user_srf->master);
 671         kfree(srf->offsets);
 672         kfree(srf->sizes);
 673         kfree(srf->snooper.image);
 674         ttm_prime_object_kfree(user_srf, prime);
 675         ttm_mem_global_free(vmw_mem_glob(dev_priv), size);
 676 }
 677
 678 /**
 679  * vmw_user_surface_free - User visible surface TTM base object destructor
 680  *
 681  * @p_base:         Pointer to a pointer to a TTM base object
 682  *                  embedded in a struct vmw_user_surface.
 683  *
 684  * Drops the base object's reference on its resource, and the
 685  * pointer pointed to by *p_base is set to NULL.
 686  */
 687 static void vmw_user_surface_base_release(struct ttm_base_object **p_base)
 688 {
 689         struct ttm_base_object *base = *p_base;
 690         struct vmw_user_surface *user_srf =
 691             container_of(base, struct vmw_user_surface, prime.base);
 692         struct vmw_resource *res = &user_srf->srf.res;
 693
 694         *p_base = NULL;
 695         if (user_srf->backup_base)
 696                 ttm_base_object_unref(&user_srf->backup_base);
 697         vmw_resource_unreference(&res);
 698 }
 699
 700 /**
 701  * vmw_user_surface_destroy_ioctl - Ioctl function implementing
 702  *                                  the user surface destroy functionality.
 703  *
 704  * @dev:            Pointer to a struct drm_device.
 705  * @data:           Pointer to data copied from / to user-space.
 706  * @file_priv:      Pointer to a drm file private structure.
 707  */
 708 int vmw_surface_destroy_ioctl(struct drm_device *dev, void *data,
 709                               struct drm_file *file_priv)
 710 {
 711         struct drm_vmw_surface_arg *arg = (struct drm_vmw_surface_arg *)data;
 712         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
 713
 714         return ttm_ref_object_base_unref(tfile, arg->sid, TTM_REF_USAGE);
 715 }
 716
 717 /**
 718  * vmw_user_surface_define_ioctl - Ioctl function implementing
 719  *                                  the user surface define functionality.
 720  *
 721  * @dev:            Pointer to a struct drm_device.
 722  * @data:           Pointer to data copied from / to user-space.
 723  * @file_priv:      Pointer to a drm file private structure.
 724  */
 725 int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
 726                              struct drm_file *file_priv)
 727 {
 728         struct vmw_private *dev_priv = vmw_priv(dev);
 729         struct vmw_user_surface *user_srf;
 730         struct vmw_surface *srf;
 731         struct vmw_resource *res;
 732         struct vmw_resource *tmp;
 733         union drm_vmw_surface_create_arg *arg =
 734             (union drm_vmw_surface_create_arg *)data;
 735         struct drm_vmw_surface_create_req *req = &arg->req;
 736         struct drm_vmw_surface_arg *rep = &arg->rep;
 737         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
 738         struct ttm_operation_ctx ctx = {
 739                 .interruptible = true,
 740                 .no_wait_gpu = false
 741         };
 742         int ret;
 743         int i, j;
 744         uint32_t cur_bo_offset;
 745         struct drm_vmw_size *cur_size;
 746         struct vmw_surface_offset *cur_offset;
 747         uint32_t num_sizes;
 748         uint32_t size;
 749         const struct svga3d_surface_desc *desc;
 750
 751         if (unlikely(vmw_user_surface_size == 0))
 752                 vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) +
 753                         VMW_IDA_ACC_SIZE + TTM_OBJ_EXTRA_SIZE;
 754
 755         num_sizes = 0;
 756         for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
 757                 if (req->mip_levels[i] > DRM_VMW_MAX_MIP_LEVELS)
 758                         return -EINVAL;
 759                 num_sizes += req->mip_levels[i];
 760         }
 761
 762         if (num_sizes > DRM_VMW_MAX_SURFACE_FACES * DRM_VMW_MAX_MIP_LEVELS ||
 763             num_sizes == 0)
 764                 return -EINVAL;
 765
 766         size = vmw_user_surface_size +
 767                 ttm_round_pot(num_sizes * sizeof(struct drm_vmw_size)) +
 768                 ttm_round_pot(num_sizes * sizeof(struct vmw_surface_offset));
 769
 770         desc = svga3dsurface_get_desc(req->format);
 771         if (unlikely(desc->block_desc == SVGA3DBLOCKDESC_NONE)) {
 772                 VMW_DEBUG_USER("Invalid format %d for surface creation.\n",
 773                                req->format);
 774                 return -EINVAL;
 775         }
 776
 777         ret = ttm_read_lock(&dev_priv->reservation_sem, true);
 778         if (unlikely(ret != 0))
 779                 return ret;
 780
 781         ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
 782                                    size, &ctx);
 783         if (unlikely(ret != 0)) {
 784                 if (ret != -ERESTARTSYS)
 785                         DRM_ERROR("Out of graphics memory for surface.\n");
 786                 goto out_unlock;
 787         }
 788
 789         user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
 790         if (unlikely(!user_srf)) {
 791                 ret = -ENOMEM;
 792                 goto out_no_user_srf;
 793         }
 794
 795         srf = &user_srf->srf;
 796         res = &srf->res;
 797
 798         /* Driver internally stores as 64-bit flags */
 799         srf->flags = (SVGA3dSurfaceAllFlags)req->flags;
 800         srf->format = req->format;
 801         srf->scanout = req->scanout;
 802
 803         memcpy(srf->mip_levels, req->mip_levels, sizeof(srf->mip_levels));
 804         srf->num_sizes = num_sizes;
 805         user_srf->size = size;
 806         srf->sizes = memdup_user((struct drm_vmw_size __user *)(unsigned long)
 807                                  req->size_addr,
 808                                  sizeof(*srf->sizes) * srf->num_sizes);
 809         if (IS_ERR(srf->sizes)) {
 810                 ret = PTR_ERR(srf->sizes);
 811                 goto out_no_sizes;
 812         }
 813         srf->offsets = kmalloc_array(srf->num_sizes,
 814                                      sizeof(*srf->offsets),
 815                                      GFP_KERNEL);
 816         if (unlikely(!srf->offsets)) {
 817                 ret = -ENOMEM;
 818                 goto out_no_offsets;
 819         }
 820
 821         srf->base_size = *srf->sizes;
 822         srf->autogen_filter = SVGA3D_TEX_FILTER_NONE;
 823         srf->multisample_count = 0;
 824         srf->multisample_pattern = SVGA3D_MS_PATTERN_NONE;
 825         srf->quality_level = SVGA3D_MS_QUALITY_NONE;
 826
 827         cur_bo_offset = 0;
 828         cur_offset = srf->offsets;
 829         cur_size = srf->sizes;
 830
 831         for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
 832                 for (j = 0; j < srf->mip_levels[i]; ++j) {
 833                         uint32_t stride = svga3dsurface_calculate_pitch
 834                                 (desc, cur_size);
 835
 836                         cur_offset->face = i;
 837                         cur_offset->mip = j;
 838                         cur_offset->bo_offset = cur_bo_offset;
 839                         cur_bo_offset += svga3dsurface_get_image_buffer_size
 840                                 (desc, cur_size, stride);
 841                         ++cur_offset;
 842                         ++cur_size;
 843                 }
 844         }
 845         res->backup_size = cur_bo_offset;
 846         if (srf->scanout &&
 847             srf->num_sizes == 1 &&
 848             srf->sizes[0].width == 64 &&
 849             srf->sizes[0].height == 64 &&
 850             srf->format == SVGA3D_A8R8G8B8) {
 851
 852                 srf->snooper.image = kzalloc(64 * 64 * 4, GFP_KERNEL);
 853                 if (!srf->snooper.image) {
 854                         DRM_ERROR("Failed to allocate cursor_image\n");
 855                         ret = -ENOMEM;
 856                         goto out_no_copy;
 857                 }
 858         } else {
 859                 srf->snooper.image = NULL;
 860         }
 861
 862         user_srf->prime.base.shareable = false;
 863         user_srf->prime.base.tfile = NULL;
 864         if (drm_is_primary_client(file_priv))
 865                 user_srf->master = drm_master_get(file_priv->master);
 866
 867         /**
 868          * From this point, the generic resource management functions
 869          * destroy the object on failure.
 870          */
 871
 872         ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
 873         if (unlikely(ret != 0))
 874                 goto out_unlock;
 875
 876         /*
 877          * A gb-aware client referencing a shared surface will
 878          * expect a backup buffer to be present.
 879          */
 880         if (dev_priv->has_mob && req->shareable) {
 881                 uint32_t backup_handle;
 882
 883                 ret = vmw_user_bo_alloc(dev_priv, tfile,
 884                                         res->backup_size,
 885                                         true,
 886                                         &backup_handle,
 887                                         &res->backup,
 888                                         &user_srf->backup_base);
 889                 if (unlikely(ret != 0)) {
 890                         vmw_resource_unreference(&res);
 891                         goto out_unlock;
 892                 }
 893         }
 894
 895         tmp = vmw_resource_reference(&srf->res);
 896         ret = ttm_prime_object_init(tfile, res->backup_size, &user_srf->prime,
 897                                     req->shareable, VMW_RES_SURFACE,
 898                                     &vmw_user_surface_base_release, NULL);
 899
 900         if (unlikely(ret != 0)) {
 901                 vmw_resource_unreference(&tmp);
 902                 vmw_resource_unreference(&res);
 903                 goto out_unlock;
 904         }
 905
 906         rep->sid = user_srf->prime.base.handle;
 907         vmw_resource_unreference(&res);
 908
 909         ttm_read_unlock(&dev_priv->reservation_sem);
 910         return 0;
 911 out_no_copy:
 912         kfree(srf->offsets);
 913 out_no_offsets:
 914         kfree(srf->sizes);
 915 out_no_sizes:
 916         ttm_prime_object_kfree(user_srf, prime);
 917 out_no_user_srf:
 918         ttm_mem_global_free(vmw_mem_glob(dev_priv), size);
 919 out_unlock:
 920         ttm_read_unlock(&dev_priv->reservation_sem);
 921         return ret;
 922 }
 923
 924
 925 static int
 926 vmw_surface_handle_reference(struct vmw_private *dev_priv,
 927                              struct drm_file *file_priv,
 928                              uint32_t u_handle,
 929                              enum drm_vmw_handle_type handle_type,
 930                              struct ttm_base_object **base_p)
 931 {
 932         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
 933         struct vmw_user_surface *user_srf;
 934         uint32_t handle;
 935         struct ttm_base_object *base;
 936         int ret;
 937         bool require_exist = false;
 938
 939         if (handle_type == DRM_VMW_HANDLE_PRIME) {
 940                 ret = ttm_prime_fd_to_handle(tfile, u_handle, &handle);
 941                 if (unlikely(ret != 0))
 942                         return ret;
 943         } else {
 944                 if (unlikely(drm_is_render_client(file_priv)))
 945                         require_exist = true;
 946
 947                 handle = u_handle;
 948         }
 949
 950         ret = -EINVAL;
 951         base = ttm_base_object_lookup_for_ref(dev_priv->tdev, handle);
 952         if (unlikely(!base)) {
 953                 VMW_DEBUG_USER("Could not find surface to reference.\n");
 954                 goto out_no_lookup;
 955         }
 956
 957         if (unlikely(ttm_base_object_type(base) != VMW_RES_SURFACE)) {
 958                 VMW_DEBUG_USER("Referenced object is not a surface.\n");
 959                 goto out_bad_resource;
 960         }
 961
 962         if (handle_type != DRM_VMW_HANDLE_PRIME) {
 963                 user_srf = container_of(base, struct vmw_user_surface,
 964                                         prime.base);
 965
 966                 /*
 967                  * Make sure the surface creator has the same
 968                  * authenticating master, or is already registered with us.
 969                  */
 970                 if (drm_is_primary_client(file_priv) &&
 971                     user_srf->master != file_priv->master)
 972                         require_exist = true;
 973
 974                 ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL,
 975                                          require_exist);
 976                 if (unlikely(ret != 0)) {
 977                         DRM_ERROR("Could not add a reference to a surface.\n");
 978                         goto out_bad_resource;
 979                 }
 980         }
 981
 982         *base_p = base;
 983         return 0;
 984
 985 out_bad_resource:
 986         ttm_base_object_unref(&base);
 987 out_no_lookup:
 988         if (handle_type == DRM_VMW_HANDLE_PRIME)
 989                 (void) ttm_ref_object_base_unref(tfile, handle, TTM_REF_USAGE);
 990
 991         return ret;
 992 }
 993
 994 /**
 995  * vmw_user_surface_define_ioctl - Ioctl function implementing
 996  *                                  the user surface reference functionality.
 997  *
 998  * @dev:            Pointer to a struct drm_device.
 999  * @data:           Pointer to data copied from / to user-space.
1000  * @file_priv:      Pointer to a drm file private structure.
1001  */
1002 int vmw_surface_reference_ioctl(struct drm_device *dev, void *data,
1003                                 struct drm_file *file_priv)
1004 {
1005         struct vmw_private *dev_priv = vmw_priv(dev);
1006         union drm_vmw_surface_reference_arg *arg =
1007             (union drm_vmw_surface_reference_arg *)data;
1008         struct drm_vmw_surface_arg *req = &arg->req;
1009         struct drm_vmw_surface_create_req *rep = &arg->rep;
1010         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1011         struct vmw_surface *srf;
1012         struct vmw_user_surface *user_srf;
1013         struct drm_vmw_size __user *user_sizes;
1014         struct ttm_base_object *base;
1015         int ret;
1016
1017         ret = vmw_surface_handle_reference(dev_priv, file_priv, req->sid,
1018                                            req->handle_type, &base);
1019         if (unlikely(ret != 0))
1020                 return ret;
1021
1022         user_srf = container_of(base, struct vmw_user_surface, prime.base);
1023         srf = &user_srf->srf;
1024
1025         /* Downcast of flags when sending back to user space */
1026         rep->flags = (uint32_t)srf->flags;
1027         rep->format = srf->format;
1028         memcpy(rep->mip_levels, srf->mip_levels, sizeof(srf->mip_levels));
1029         user_sizes = (struct drm_vmw_size __user *)(unsigned long)
1030             rep->size_addr;
1031
1032         if (user_sizes)
1033                 ret = copy_to_user(user_sizes, &srf->base_size,
1034                                    sizeof(srf->base_size));
1035         if (unlikely(ret != 0)) {
1036                 VMW_DEBUG_USER("copy_to_user failed %p %u\n", user_sizes,
1037                                srf->num_sizes);
1038                 ttm_ref_object_base_unref(tfile, base->handle, TTM_REF_USAGE);
1039                 ret = -EFAULT;
1040         }
1041
1042         ttm_base_object_unref(&base);
1043
1044         return ret;
1045 }
1046
1047 /**
1048  * vmw_surface_define_encode - Encode a surface_define command.
1049  *
1050  * @srf: Pointer to a struct vmw_surface object.
1051  * @cmd_space: Pointer to memory area in which the commands should be encoded.
1052  */
1053 static int vmw_gb_surface_create(struct vmw_resource *res)
1054 {
1055         struct vmw_private *dev_priv = res->dev_priv;
1056         struct vmw_surface *srf = vmw_res_to_srf(res);
1057         uint32_t cmd_len, cmd_id, submit_len;
1058         int ret;
1059         struct {
1060                 SVGA3dCmdHeader header;
1061                 SVGA3dCmdDefineGBSurface body;
1062         } *cmd;
1063         struct {
1064                 SVGA3dCmdHeader header;
1065                 SVGA3dCmdDefineGBSurface_v2 body;
1066         } *cmd2;
1067         struct {
1068                 SVGA3dCmdHeader header;
1069                 SVGA3dCmdDefineGBSurface_v3 body;
1070         } *cmd3;
1071
1072         if (likely(res->id != -1))
1073                 return 0;
1074
1075         vmw_fifo_resource_inc(dev_priv);
1076         ret = vmw_resource_alloc_id(res);
1077         if (unlikely(ret != 0)) {
1078                 DRM_ERROR("Failed to allocate a surface id.\n");
1079                 goto out_no_id;
1080         }
1081
1082         if (unlikely(res->id >= VMWGFX_NUM_GB_SURFACE)) {
1083                 ret = -EBUSY;
1084                 goto out_no_fifo;
1085         }
1086
1087         if (dev_priv->has_sm4_1 && srf->array_size > 0) {
1088                 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V3;
1089                 cmd_len = sizeof(cmd3->body);
1090                 submit_len = sizeof(*cmd3);
1091         } else if (srf->array_size > 0) {
1092                 /* has_dx checked on creation time. */
1093                 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V2;
1094                 cmd_len = sizeof(cmd2->body);
1095                 submit_len = sizeof(*cmd2);
1096         } else {
1097                 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE;
1098                 cmd_len = sizeof(cmd->body);
1099                 submit_len = sizeof(*cmd);
1100         }
1101
1102         cmd = VMW_FIFO_RESERVE(dev_priv, submit_len);
1103         cmd2 = (typeof(cmd2))cmd;
1104         cmd3 = (typeof(cmd3))cmd;
1105         if (unlikely(!cmd)) {
1106                 ret = -ENOMEM;
1107                 goto out_no_fifo;
1108         }
1109
1110         if (dev_priv->has_sm4_1 && srf->array_size > 0) {
1111                 cmd3->header.id = cmd_id;
1112                 cmd3->header.size = cmd_len;
1113                 cmd3->body.sid = srf->res.id;
1114                 cmd3->body.surfaceFlags = srf->flags;
1115                 cmd3->body.format = srf->format;
1116                 cmd3->body.numMipLevels = srf->mip_levels[0];
1117                 cmd3->body.multisampleCount = srf->multisample_count;
1118                 cmd3->body.multisamplePattern = srf->multisample_pattern;
1119                 cmd3->body.qualityLevel = srf->quality_level;
1120                 cmd3->body.autogenFilter = srf->autogen_filter;
1121                 cmd3->body.size.width = srf->base_size.width;
1122                 cmd3->body.size.height = srf->base_size.height;
1123                 cmd3->body.size.depth = srf->base_size.depth;
1124                 cmd3->body.arraySize = srf->array_size;
1125         } else if (srf->array_size > 0) {
1126                 cmd2->header.id = cmd_id;
1127                 cmd2->header.size = cmd_len;
1128                 cmd2->body.sid = srf->res.id;
1129                 cmd2->body.surfaceFlags = srf->flags;
1130                 cmd2->body.format = srf->format;
1131                 cmd2->body.numMipLevels = srf->mip_levels[0];
1132                 cmd2->body.multisampleCount = srf->multisample_count;
1133                 cmd2->body.autogenFilter = srf->autogen_filter;
1134                 cmd2->body.size.width = srf->base_size.width;
1135                 cmd2->body.size.height = srf->base_size.height;
1136                 cmd2->body.size.depth = srf->base_size.depth;
1137                 cmd2->body.arraySize = srf->array_size;
1138         } else {
1139                 cmd->header.id = cmd_id;
1140                 cmd->header.size = cmd_len;
1141                 cmd->body.sid = srf->res.id;
1142                 cmd->body.surfaceFlags = srf->flags;
1143                 cmd->body.format = srf->format;
1144                 cmd->body.numMipLevels = srf->mip_levels[0];
1145                 cmd->body.multisampleCount = srf->multisample_count;
1146                 cmd->body.autogenFilter = srf->autogen_filter;
1147                 cmd->body.size.width = srf->base_size.width;
1148                 cmd->body.size.height = srf->base_size.height;
1149                 cmd->body.size.depth = srf->base_size.depth;
1150         }
1151
1152         vmw_fifo_commit(dev_priv, submit_len);
1153
1154         return 0;
1155
1156 out_no_fifo:
1157         vmw_resource_release_id(res);
1158 out_no_id:
1159         vmw_fifo_resource_dec(dev_priv);
1160         return ret;
1161 }
1162
1163
1164 static int vmw_gb_surface_bind(struct vmw_resource *res,
1165                                struct ttm_validate_buffer *val_buf)
1166 {
1167         struct vmw_private *dev_priv = res->dev_priv;
1168         struct {
1169                 SVGA3dCmdHeader header;
1170                 SVGA3dCmdBindGBSurface body;
1171         } *cmd1;
1172         struct {
1173                 SVGA3dCmdHeader header;
1174                 SVGA3dCmdUpdateGBSurface body;
1175         } *cmd2;
1176         uint32_t submit_size;
1177         struct ttm_buffer_object *bo = val_buf->bo;
1178
1179         BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
1180
1181         submit_size = sizeof(*cmd1) + (res->backup_dirty ? sizeof(*cmd2) : 0);
1182
1183         cmd1 = VMW_FIFO_RESERVE(dev_priv, submit_size);
1184         if (unlikely(!cmd1))
1185                 return -ENOMEM;
1186
1187         cmd1->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
1188         cmd1->header.size = sizeof(cmd1->body);
1189         cmd1->body.sid = res->id;
1190         cmd1->body.mobid = bo->mem.start;
1191         if (res->backup_dirty) {
1192                 cmd2 = (void *) &cmd1[1];
1193                 cmd2->header.id = SVGA_3D_CMD_UPDATE_GB_SURFACE;
1194                 cmd2->header.size = sizeof(cmd2->body);
1195                 cmd2->body.sid = res->id;
1196         }
1197         vmw_fifo_commit(dev_priv, submit_size);
1198
1199         if (res->backup->dirty && res->backup_dirty) {
1200                 /* We've just made a full upload. Cear dirty regions. */
1201                 vmw_bo_dirty_clear_res(res);
1202         }
1203
1204         res->backup_dirty = false;
1205
1206         return 0;
1207 }
1208
1209 static int vmw_gb_surface_unbind(struct vmw_resource *res,
1210                                  bool readback,
1211                                  struct ttm_validate_buffer *val_buf)
1212 {
1213         struct vmw_private *dev_priv = res->dev_priv;
1214         struct ttm_buffer_object *bo = val_buf->bo;
1215         struct vmw_fence_obj *fence;
1216
1217         struct {
1218                 SVGA3dCmdHeader header;
1219                 SVGA3dCmdReadbackGBSurface body;
1220         } *cmd1;
1221         struct {
1222                 SVGA3dCmdHeader header;
1223                 SVGA3dCmdInvalidateGBSurface body;
1224         } *cmd2;
1225         struct {
1226                 SVGA3dCmdHeader header;
1227                 SVGA3dCmdBindGBSurface body;
1228         } *cmd3;
1229         uint32_t submit_size;
1230         uint8_t *cmd;
1231
1232
1233         BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
1234
1235         submit_size = sizeof(*cmd3) + (readback ? sizeof(*cmd1) : sizeof(*cmd2));
1236         cmd = VMW_FIFO_RESERVE(dev_priv, submit_size);
1237         if (unlikely(!cmd))
1238                 return -ENOMEM;
1239
1240         if (readback) {
1241                 cmd1 = (void *) cmd;
1242                 cmd1->header.id = SVGA_3D_CMD_READBACK_GB_SURFACE;
1243                 cmd1->header.size = sizeof(cmd1->body);
1244                 cmd1->body.sid = res->id;
1245                 cmd3 = (void *) &cmd1[1];
1246         } else {
1247                 cmd2 = (void *) cmd;
1248                 cmd2->header.id = SVGA_3D_CMD_INVALIDATE_GB_SURFACE;
1249                 cmd2->header.size = sizeof(cmd2->body);
1250                 cmd2->body.sid = res->id;
1251                 cmd3 = (void *) &cmd2[1];
1252         }
1253
1254         cmd3->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
1255         cmd3->header.size = sizeof(cmd3->body);
1256         cmd3->body.sid = res->id;
1257         cmd3->body.mobid = SVGA3D_INVALID_ID;
1258
1259         vmw_fifo_commit(dev_priv, submit_size);
1260
1261         /*
1262          * Create a fence object and fence the backup buffer.
1263          */
1264
1265         (void) vmw_execbuf_fence_commands(NULL, dev_priv,
1266                                           &fence, NULL);
1267
1268         vmw_bo_fence_single(val_buf->bo, fence);
1269
1270         if (likely(fence != NULL))
1271                 vmw_fence_obj_unreference(&fence);
1272
1273         return 0;
1274 }
1275
1276 static int vmw_gb_surface_destroy(struct vmw_resource *res)
1277 {
1278         struct vmw_private *dev_priv = res->dev_priv;
1279         struct vmw_surface *srf = vmw_res_to_srf(res);
1280         struct {
1281                 SVGA3dCmdHeader header;
1282                 SVGA3dCmdDestroyGBSurface body;
1283         } *cmd;
1284
1285         if (likely(res->id == -1))
1286                 return 0;
1287
1288         mutex_lock(&dev_priv->binding_mutex);
1289         vmw_view_surface_list_destroy(dev_priv, &srf->view_list);
1290         vmw_binding_res_list_scrub(&res->binding_head);
1291
1292         cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
1293         if (unlikely(!cmd)) {
1294                 mutex_unlock(&dev_priv->binding_mutex);
1295                 return -ENOMEM;
1296         }
1297
1298         cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SURFACE;
1299         cmd->header.size = sizeof(cmd->body);
1300         cmd->body.sid = res->id;
1301         vmw_fifo_commit(dev_priv, sizeof(*cmd));
1302         mutex_unlock(&dev_priv->binding_mutex);
1303         vmw_resource_release_id(res);
1304         vmw_fifo_resource_dec(dev_priv);
1305
1306         return 0;
1307 }
1308
1309
1310 /**
1311  * vmw_gb_surface_define_ioctl - Ioctl function implementing
1312  * the user surface define functionality.
1313  *
1314  * @dev: Pointer to a struct drm_device.
1315  * @data: Pointer to data copied from / to user-space.
1316  * @file_priv: Pointer to a drm file private structure.
1317  */
1318 int vmw_gb_surface_define_ioctl(struct drm_device *dev, void *data,
1319                                 struct drm_file *file_priv)
1320 {
1321         union drm_vmw_gb_surface_create_arg *arg =
1322             (union drm_vmw_gb_surface_create_arg *)data;
1323         struct drm_vmw_gb_surface_create_rep *rep = &arg->rep;
1324         struct drm_vmw_gb_surface_create_ext_req req_ext;
1325
1326         req_ext.base = arg->req;
1327         req_ext.version = drm_vmw_gb_surface_v1;
1328         req_ext.svga3d_flags_upper_32_bits = 0;
1329         req_ext.multisample_pattern = SVGA3D_MS_PATTERN_NONE;
1330         req_ext.quality_level = SVGA3D_MS_QUALITY_NONE;
1331         req_ext.must_be_zero = 0;
1332
1333         return vmw_gb_surface_define_internal(dev, &req_ext, rep, file_priv);
1334 }
1335
1336 /**
1337  * vmw_gb_surface_reference_ioctl - Ioctl function implementing
1338  * the user surface reference functionality.
1339  *
1340  * @dev: Pointer to a struct drm_device.
1341  * @data: Pointer to data copied from / to user-space.
1342  * @file_priv: Pointer to a drm file private structure.
1343  */
1344 int vmw_gb_surface_reference_ioctl(struct drm_device *dev, void *data,
1345                                    struct drm_file *file_priv)
1346 {
1347         union drm_vmw_gb_surface_reference_arg *arg =
1348             (union drm_vmw_gb_surface_reference_arg *)data;
1349         struct drm_vmw_surface_arg *req = &arg->req;
1350         struct drm_vmw_gb_surface_ref_rep *rep = &arg->rep;
1351         struct drm_vmw_gb_surface_ref_ext_rep rep_ext;
1352         int ret;
1353
1354         ret = vmw_gb_surface_reference_internal(dev, req, &rep_ext, file_priv);
1355
1356         if (unlikely(ret != 0))
1357                 return ret;
1358
1359         rep->creq = rep_ext.creq.base;
1360         rep->crep = rep_ext.crep;
1361
1362         return ret;
1363 }
1364
1365 /**
1366  * vmw_surface_gb_priv_define - Define a private GB surface
1367  *
1368  * @dev:  Pointer to a struct drm_device
1369  * @user_accounting_size:  Used to track user-space memory usage, set
1370  *                         to 0 for kernel mode only memory
1371  * @svga3d_flags: SVGA3d surface flags for the device
1372  * @format: requested surface format
1373  * @for_scanout: true if inteded to be used for scanout buffer
1374  * @num_mip_levels:  number of MIP levels
1375  * @multisample_count:
1376  * @array_size: Surface array size.
1377  * @size: width, heigh, depth of the surface requested
1378  * @multisample_pattern: Multisampling pattern when msaa is supported
1379  * @quality_level: Precision settings
1380  * @user_srf_out: allocated user_srf.  Set to NULL on failure.
1381  *
1382  * GB surfaces allocated by this function will not have a user mode handle, and
1383  * thus will only be visible to vmwgfx.  For optimization reasons the
1384  * surface may later be given a user mode handle by another function to make
1385  * it available to user mode drivers.
1386  */
1387 int vmw_surface_gb_priv_define(struct drm_device *dev,
1388                                uint32_t user_accounting_size,
1389                                SVGA3dSurfaceAllFlags svga3d_flags,
1390                                SVGA3dSurfaceFormat format,
1391                                bool for_scanout,
1392                                uint32_t num_mip_levels,
1393                                uint32_t multisample_count,
1394                                uint32_t array_size,
1395                                struct drm_vmw_size size,
1396                                SVGA3dMSPattern multisample_pattern,
1397                                SVGA3dMSQualityLevel quality_level,
1398                                struct vmw_surface **srf_out)
1399 {
1400         struct vmw_private *dev_priv = vmw_priv(dev);
1401         struct vmw_user_surface *user_srf;
1402         struct ttm_operation_ctx ctx = {
1403                 .interruptible = true,
1404                 .no_wait_gpu = false
1405         };
1406         struct vmw_surface *srf;
1407         int ret;
1408         u32 num_layers = 1;
1409         u32 sample_count = 1;
1410
1411         *srf_out = NULL;
1412
1413         if (for_scanout) {
1414                 if (!svga3dsurface_is_screen_target_format(format)) {
1415                         VMW_DEBUG_USER("Invalid Screen Target surface format.");
1416                         return -EINVAL;
1417                 }
1418
1419                 if (size.width > dev_priv->texture_max_width ||
1420                     size.height > dev_priv->texture_max_height) {
1421                         VMW_DEBUG_USER("%ux%u\n, exceeds max surface size %ux%u",
1422                                        size.width, size.height,
1423                                        dev_priv->texture_max_width,
1424                                        dev_priv->texture_max_height);
1425                         return -EINVAL;
1426                 }
1427         } else {
1428                 const struct svga3d_surface_desc *desc;
1429
1430                 desc = svga3dsurface_get_desc(format);
1431                 if (unlikely(desc->block_desc == SVGA3DBLOCKDESC_NONE)) {
1432                         VMW_DEBUG_USER("Invalid surface format.\n");
1433                         return -EINVAL;
1434                 }
1435         }
1436
1437         /* array_size must be null for non-GL3 host. */
1438         if (array_size > 0 && !dev_priv->has_dx) {
1439                 VMW_DEBUG_USER("Tried to create DX surface on non-DX host.\n");
1440                 return -EINVAL;
1441         }
1442
1443         ret = ttm_read_lock(&dev_priv->reservation_sem, true);
1444         if (unlikely(ret != 0))
1445                 return ret;
1446
1447         ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
1448                                    user_accounting_size, &ctx);
1449         if (unlikely(ret != 0)) {
1450                 if (ret != -ERESTARTSYS)
1451                         DRM_ERROR("Out of graphics memory for surface"
1452                                   " creation.\n");
1453                 goto out_unlock;
1454         }
1455
1456         user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
1457         if (unlikely(!user_srf)) {
1458                 ret = -ENOMEM;
1459                 goto out_no_user_srf;
1460         }
1461
1462         *srf_out  = &user_srf->srf;
1463         user_srf->size = user_accounting_size;
1464         user_srf->prime.base.shareable = false;
1465         user_srf->prime.base.tfile     = NULL;
1466
1467         srf = &user_srf->srf;
1468         srf->flags             = svga3d_flags;
1469         srf->format            = format;
1470         srf->scanout           = for_scanout;
1471         srf->mip_levels[0]     = num_mip_levels;
1472         srf->num_sizes         = 1;
1473         srf->sizes             = NULL;
1474         srf->offsets           = NULL;
1475         srf->base_size         = size;
1476         srf->autogen_filter    = SVGA3D_TEX_FILTER_NONE;
1477         srf->array_size        = array_size;
1478         srf->multisample_count = multisample_count;
1479         srf->multisample_pattern = multisample_pattern;
1480         srf->quality_level = quality_level;
1481
1482         if (array_size)
1483                 num_layers = array_size;
1484         else if (svga3d_flags & SVGA3D_SURFACE_CUBEMAP)
1485                 num_layers = SVGA3D_MAX_SURFACE_FACES;
1486
1487         if (srf->flags & SVGA3D_SURFACE_MULTISAMPLE)
1488                 sample_count = srf->multisample_count;
1489
1490         srf->res.backup_size   =
1491                 svga3dsurface_get_serialized_size_extended(srf->format,
1492                                                            srf->base_size,
1493                                                            srf->mip_levels[0],
1494                                                            num_layers,
1495                                                            sample_count);
1496
1497         if (srf->flags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT)
1498                 srf->res.backup_size += sizeof(SVGA3dDXSOState);
1499
1500         /*
1501          * Don't set SVGA3D_SURFACE_SCREENTARGET flag for a scanout surface with
1502          * size greater than STDU max width/height. This is really a workaround
1503          * to support creation of big framebuffer requested by some user-space
1504          * for whole topology. That big framebuffer won't really be used for
1505          * binding with screen target as during prepare_fb a separate surface is
1506          * created so it's safe to ignore SVGA3D_SURFACE_SCREENTARGET flag.
1507          */
1508         if (dev_priv->active_display_unit == vmw_du_screen_target &&
1509             for_scanout && size.width <= dev_priv->stdu_max_width &&
1510             size.height <= dev_priv->stdu_max_height)
1511                 srf->flags |= SVGA3D_SURFACE_SCREENTARGET;
1512
1513         /*
1514          * From this point, the generic resource management functions
1515          * destroy the object on failure.
1516          */
1517         ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
1518
1519         ttm_read_unlock(&dev_priv->reservation_sem);
1520         return ret;
1521
1522 out_no_user_srf:
1523         ttm_mem_global_free(vmw_mem_glob(dev_priv), user_accounting_size);
1524
1525 out_unlock:
1526         ttm_read_unlock(&dev_priv->reservation_sem);
1527         return ret;
1528 }
1529
1530 /**
1531  * vmw_gb_surface_define_ext_ioctl - Ioctl function implementing
1532  * the user surface define functionality.
1533  *
1534  * @dev: Pointer to a struct drm_device.
1535  * @data: Pointer to data copied from / to user-space.
1536  * @file_priv: Pointer to a drm file private structure.
1537  */
1538 int vmw_gb_surface_define_ext_ioctl(struct drm_device *dev, void *data,
1539                                 struct drm_file *file_priv)
1540 {
1541         union drm_vmw_gb_surface_create_ext_arg *arg =
1542             (union drm_vmw_gb_surface_create_ext_arg *)data;
1543         struct drm_vmw_gb_surface_create_ext_req *req = &arg->req;
1544         struct drm_vmw_gb_surface_create_rep *rep = &arg->rep;
1545
1546         return vmw_gb_surface_define_internal(dev, req, rep, file_priv);
1547 }
1548
1549 /**
1550  * vmw_gb_surface_reference_ext_ioctl - Ioctl function implementing
1551  * the user surface reference functionality.
1552  *
1553  * @dev: Pointer to a struct drm_device.
1554  * @data: Pointer to data copied from / to user-space.
1555  * @file_priv: Pointer to a drm file private structure.
1556  */
1557 int vmw_gb_surface_reference_ext_ioctl(struct drm_device *dev, void *data,
1558                                    struct drm_file *file_priv)
1559 {
1560         union drm_vmw_gb_surface_reference_ext_arg *arg =
1561             (union drm_vmw_gb_surface_reference_ext_arg *)data;
1562         struct drm_vmw_surface_arg *req = &arg->req;
1563         struct drm_vmw_gb_surface_ref_ext_rep *rep = &arg->rep;
1564
1565         return vmw_gb_surface_reference_internal(dev, req, rep, file_priv);
1566 }
1567
1568 /**
1569  * vmw_gb_surface_define_internal - Ioctl function implementing
1570  * the user surface define functionality.
1571  *
1572  * @dev: Pointer to a struct drm_device.
1573  * @req: Request argument from user-space.
1574  * @rep: Response argument to user-space.
1575  * @file_priv: Pointer to a drm file private structure.
1576  */
1577 static int
1578 vmw_gb_surface_define_internal(struct drm_device *dev,
1579                                struct drm_vmw_gb_surface_create_ext_req *req,
1580                                struct drm_vmw_gb_surface_create_rep *rep,
1581                                struct drm_file *file_priv)
1582 {
1583         struct vmw_private *dev_priv = vmw_priv(dev);
1584         struct vmw_user_surface *user_srf;
1585         struct vmw_surface *srf;
1586         struct vmw_resource *res;
1587         struct vmw_resource *tmp;
1588         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1589         int ret;
1590         uint32_t size;
1591         uint32_t backup_handle = 0;
1592         SVGA3dSurfaceAllFlags svga3d_flags_64 =
1593                 SVGA3D_FLAGS_64(req->svga3d_flags_upper_32_bits,
1594                                 req->base.svga3d_flags);
1595
1596         if (!dev_priv->has_sm4_1) {
1597                 /*
1598                  * If SM4_1 is not support then cannot send 64-bit flag to
1599                  * device.
1600                  */
1601                 if (req->svga3d_flags_upper_32_bits != 0)
1602                         return -EINVAL;
1603
1604                 if (req->base.multisample_count != 0)
1605                         return -EINVAL;
1606
1607                 if (req->multisample_pattern != SVGA3D_MS_PATTERN_NONE)
1608                         return -EINVAL;
1609
1610                 if (req->quality_level != SVGA3D_MS_QUALITY_NONE)
1611                         return -EINVAL;
1612         }
1613
1614         if ((svga3d_flags_64 & SVGA3D_SURFACE_MULTISAMPLE) &&
1615             req->base.multisample_count == 0)
1616                 return -EINVAL;
1617
1618         if (req->base.mip_levels > DRM_VMW_MAX_MIP_LEVELS)
1619                 return -EINVAL;
1620
1621         if (unlikely(vmw_user_surface_size == 0))
1622                 vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) +
1623                         VMW_IDA_ACC_SIZE + TTM_OBJ_EXTRA_SIZE;
1624
1625         size = vmw_user_surface_size;
1626
1627         /* Define a surface based on the parameters. */
1628         ret = vmw_surface_gb_priv_define(dev,
1629                                          size,
1630                                          svga3d_flags_64,
1631                                          req->base.format,
1632                                          req->base.drm_surface_flags &
1633                                          drm_vmw_surface_flag_scanout,
1634                                          req->base.mip_levels,
1635                                          req->base.multisample_count,
1636                                          req->base.array_size,
1637                                          req->base.base_size,
1638                                          req->multisample_pattern,
1639                                          req->quality_level,
1640                                          &srf);
1641         if (unlikely(ret != 0))
1642                 return ret;
1643
1644         user_srf = container_of(srf, struct vmw_user_surface, srf);
1645         if (drm_is_primary_client(file_priv))
1646                 user_srf->master = drm_master_get(file_priv->master);
1647
1648         ret = ttm_read_lock(&dev_priv->reservation_sem, true);
1649         if (unlikely(ret != 0))
1650                 return ret;
1651
1652         res = &user_srf->srf.res;
1653
1654         if (req->base.buffer_handle != SVGA3D_INVALID_ID) {
1655                 ret = vmw_user_bo_lookup(tfile, req->base.buffer_handle,
1656                                          &res->backup,
1657                                          &user_srf->backup_base);
1658                 if (ret == 0) {
1659                         if (res->backup->base.num_pages * PAGE_SIZE <
1660                             res->backup_size) {
1661                                 VMW_DEBUG_USER("Surface backup buffer too small.\n");
1662                                 vmw_bo_unreference(&res->backup);
1663                                 ret = -EINVAL;
1664                                 goto out_unlock;
1665                         } else {
1666                                 backup_handle = req->base.buffer_handle;
1667                         }
1668                 }
1669         } else if (req->base.drm_surface_flags &
1670                    (drm_vmw_surface_flag_create_buffer |
1671                     drm_vmw_surface_flag_coherent))
1672                 ret = vmw_user_bo_alloc(dev_priv, tfile,
1673                                         res->backup_size,
1674                                         req->base.drm_surface_flags &
1675                                         drm_vmw_surface_flag_shareable,
1676                                         &backup_handle,
1677                                         &res->backup,
1678                                         &user_srf->backup_base);
1679
1680         if (unlikely(ret != 0)) {
1681                 vmw_resource_unreference(&res);
1682                 goto out_unlock;
1683         }
1684
1685         if (req->base.drm_surface_flags & drm_vmw_surface_flag_coherent) {
1686                 struct vmw_buffer_object *backup = res->backup;
1687
1688                 ttm_bo_reserve(&backup->base, false, false, NULL);
1689                 if (!res->func->dirty_alloc)
1690                         ret = -EINVAL;
1691                 if (!ret)
1692                         ret = vmw_bo_dirty_add(backup);
1693                 if (!ret) {
1694                         res->coherent = true;
1695                         ret = res->func->dirty_alloc(res);
1696                 }
1697                 ttm_bo_unreserve(&backup->base);
1698                 if (ret) {
1699                         vmw_resource_unreference(&res);
1700                         goto out_unlock;
1701                 }
1702
1703         }
1704
1705         tmp = vmw_resource_reference(res);
1706         ret = ttm_prime_object_init(tfile, res->backup_size, &user_srf->prime,
1707                                     req->base.drm_surface_flags &
1708                                     drm_vmw_surface_flag_shareable,
1709                                     VMW_RES_SURFACE,
1710                                     &vmw_user_surface_base_release, NULL);
1711
1712         if (unlikely(ret != 0)) {
1713                 vmw_resource_unreference(&tmp);
1714                 vmw_resource_unreference(&res);
1715                 goto out_unlock;
1716         }
1717
1718         rep->handle      = user_srf->prime.base.handle;
1719         rep->backup_size = res->backup_size;
1720         if (res->backup) {
1721                 rep->buffer_map_handle =
1722                         drm_vma_node_offset_addr(&res->backup->base.base.vma_node);
1723                 rep->buffer_size = res->backup->base.num_pages * PAGE_SIZE;
1724                 rep->buffer_handle = backup_handle;
1725         } else {
1726                 rep->buffer_map_handle = 0;
1727                 rep->buffer_size = 0;
1728                 rep->buffer_handle = SVGA3D_INVALID_ID;
1729         }
1730
1731         vmw_resource_unreference(&res);
1732
1733 out_unlock:
1734         ttm_read_unlock(&dev_priv->reservation_sem);
1735         return ret;
1736 }
1737
1738 /**
1739  * vmw_gb_surface_reference_internal - Ioctl function implementing
1740  * the user surface reference functionality.
1741  *
1742  * @dev: Pointer to a struct drm_device.
1743  * @req: Pointer to user-space request surface arg.
1744  * @rep: Pointer to response to user-space.
1745  * @file_priv: Pointer to a drm file private structure.
1746  */
1747 static int
1748 vmw_gb_surface_reference_internal(struct drm_device *dev,
1749                                   struct drm_vmw_surface_arg *req,
1750                                   struct drm_vmw_gb_surface_ref_ext_rep *rep,
1751                                   struct drm_file *file_priv)
1752 {
1753         struct vmw_private *dev_priv = vmw_priv(dev);
1754         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1755         struct vmw_surface *srf;
1756         struct vmw_user_surface *user_srf;
1757         struct ttm_base_object *base;
1758         uint32_t backup_handle;
1759         int ret = -EINVAL;
1760
1761         ret = vmw_surface_handle_reference(dev_priv, file_priv, req->sid,
1762                                            req->handle_type, &base);
1763         if (unlikely(ret != 0))
1764                 return ret;
1765
1766         user_srf = container_of(base, struct vmw_user_surface, prime.base);
1767         srf = &user_srf->srf;
1768         if (!srf->res.backup) {
1769                 DRM_ERROR("Shared GB surface is missing a backup buffer.\n");
1770                 goto out_bad_resource;
1771         }
1772
1773         mutex_lock(&dev_priv->cmdbuf_mutex); /* Protect res->backup */
1774         ret = vmw_user_bo_reference(tfile, srf->res.backup, &backup_handle);
1775         mutex_unlock(&dev_priv->cmdbuf_mutex);
1776
1777         if (unlikely(ret != 0)) {
1778                 DRM_ERROR("Could not add a reference to a GB surface "
1779                           "backup buffer.\n");
1780                 (void) ttm_ref_object_base_unref(tfile, base->handle,
1781                                                  TTM_REF_USAGE);
1782                 goto out_bad_resource;
1783         }
1784
1785         rep->creq.base.svga3d_flags = SVGA3D_FLAGS_LOWER_32(srf->flags);
1786         rep->creq.base.format = srf->format;
1787         rep->creq.base.mip_levels = srf->mip_levels[0];
1788         rep->creq.base.drm_surface_flags = 0;
1789         rep->creq.base.multisample_count = srf->multisample_count;
1790         rep->creq.base.autogen_filter = srf->autogen_filter;
1791         rep->creq.base.array_size = srf->array_size;
1792         rep->creq.base.buffer_handle = backup_handle;
1793         rep->creq.base.base_size = srf->base_size;
1794         rep->crep.handle = user_srf->prime.base.handle;
1795         rep->crep.backup_size = srf->res.backup_size;
1796         rep->crep.buffer_handle = backup_handle;
1797         rep->crep.buffer_map_handle =
1798                 drm_vma_node_offset_addr(&srf->res.backup->base.base.vma_node);
1799         rep->crep.buffer_size = srf->res.backup->base.num_pages * PAGE_SIZE;
1800
1801         rep->creq.version = drm_vmw_gb_surface_v1;
1802         rep->creq.svga3d_flags_upper_32_bits =
1803                 SVGA3D_FLAGS_UPPER_32(srf->flags);
1804         rep->creq.multisample_pattern = srf->multisample_pattern;
1805         rep->creq.quality_level = srf->quality_level;
1806         rep->creq.must_be_zero = 0;
1807
1808 out_bad_resource:
1809         ttm_base_object_unref(&base);
1810
1811         return ret;
1812 }
1813
1814 /**
1815  * vmw_subres_dirty_add - Add a dirty region to a subresource
1816  * @dirty: The surfaces's dirty tracker.
1817  * @loc_start: The location corresponding to the start of the region.
1818  * @loc_end: The location corresponding to the end of the region.
1819  *
1820  * As we are assuming that @loc_start and @loc_end represent a sequential
1821  * range of backing store memory, if the region spans multiple lines then
1822  * regardless of the x coordinate, the full lines are dirtied.
1823  * Correspondingly if the region spans multiple z slices, then full rather
1824  * than partial z slices are dirtied.
1825  */
1826 static void vmw_subres_dirty_add(struct vmw_surface_dirty *dirty,
1827                                  const struct svga3dsurface_loc *loc_start,
1828                                  const struct svga3dsurface_loc *loc_end)
1829 {
1830         const struct svga3dsurface_cache *cache = &dirty->cache;
1831         SVGA3dBox *box = &dirty->boxes[loc_start->sub_resource];
1832         u32 mip = loc_start->sub_resource % cache->num_mip_levels;
1833         const struct drm_vmw_size *size = &cache->mip[mip].size;
1834         u32 box_c2 = box->z + box->d;
1835
1836         if (WARN_ON(loc_start->sub_resource >= dirty->num_subres))
1837                 return;
1838
1839         if (box->d == 0 || box->z > loc_start->z)
1840                 box->z = loc_start->z;
1841         if (box_c2 < loc_end->z)
1842                 box->d = loc_end->z - box->z;
1843
1844         if (loc_start->z + 1 == loc_end->z) {
1845                 box_c2 = box->y + box->h;
1846                 if (box->h == 0 || box->y > loc_start->y)
1847                         box->y = loc_start->y;
1848                 if (box_c2 < loc_end->y)
1849                         box->h = loc_end->y - box->y;
1850
1851                 if (loc_start->y + 1 == loc_end->y) {
1852                         box_c2 = box->x + box->w;
1853                         if (box->w == 0 || box->x > loc_start->x)
1854                                 box->x = loc_start->x;
1855                         if (box_c2 < loc_end->x)
1856                                 box->w = loc_end->x - box->x;
1857                 } else {
1858                         box->x = 0;
1859                         box->w = size->width;
1860                 }
1861         } else {
1862                 box->y = 0;
1863                 box->h = size->height;
1864                 box->x = 0;
1865                 box->w = size->width;
1866         }
1867 }
1868
1869 /**
1870  * vmw_subres_dirty_full - Mark a full subresource as dirty
1871  * @dirty: The surface's dirty tracker.
1872  * @subres: The subresource
1873  */
1874 static void vmw_subres_dirty_full(struct vmw_surface_dirty *dirty, u32 subres)
1875 {
1876         const struct svga3dsurface_cache *cache = &dirty->cache;
1877         u32 mip = subres % cache->num_mip_levels;
1878         const struct drm_vmw_size *size = &cache->mip[mip].size;
1879         SVGA3dBox *box = &dirty->boxes[subres];
1880
1881         box->x = 0;
1882         box->y = 0;
1883         box->z = 0;
1884         box->w = size->width;
1885         box->h = size->height;
1886         box->d = size->depth;
1887 }
1888
1889 /*
1890  * vmw_surface_tex_dirty_add_range - The dirty_add_range callback for texture
1891  * surfaces.
1892  */
1893 static void vmw_surface_tex_dirty_range_add(struct vmw_resource *res,
1894                                             size_t start, size_t end)
1895 {
1896         struct vmw_surface_dirty *dirty =
1897                 (struct vmw_surface_dirty *) res->dirty;
1898         size_t backup_end = res->backup_offset + res->backup_size;
1899         struct svga3dsurface_loc loc1, loc2;
1900         const struct svga3dsurface_cache *cache;
1901
1902         start = max_t(size_t, start, res->backup_offset) - res->backup_offset;
1903         end = min(end, backup_end) - res->backup_offset;
1904         cache = &dirty->cache;
1905         svga3dsurface_get_loc(cache, &loc1, start);
1906         svga3dsurface_get_loc(cache, &loc2, end - 1);
1907         svga3dsurface_inc_loc(cache, &loc2);
1908
1909         if (loc1.sub_resource + 1 == loc2.sub_resource) {
1910                 /* Dirty range covers a single sub-resource */
1911                 vmw_subres_dirty_add(dirty, &loc1, &loc2);
1912         } else {
1913                 /* Dirty range covers multiple sub-resources */
1914                 struct svga3dsurface_loc loc_min, loc_max;
1915                 u32 sub_res;
1916
1917                 svga3dsurface_max_loc(cache, loc1.sub_resource, &loc_max);
1918                 vmw_subres_dirty_add(dirty, &loc1, &loc_max);
1919                 svga3dsurface_min_loc(cache, loc2.sub_resource - 1, &loc_min);
1920                 vmw_subres_dirty_add(dirty, &loc_min, &loc2);
1921                 for (sub_res = loc1.sub_resource + 1;
1922                      sub_res < loc2.sub_resource - 1; ++sub_res)
1923                         vmw_subres_dirty_full(dirty, sub_res);
1924         }
1925 }
1926
1927 /*
1928  * vmw_surface_tex_dirty_add_range - The dirty_add_range callback for buffer
1929  * surfaces.
1930  */
1931 static void vmw_surface_buf_dirty_range_add(struct vmw_resource *res,
1932                                             size_t start, size_t end)
1933 {
1934         struct vmw_surface_dirty *dirty =
1935                 (struct vmw_surface_dirty *) res->dirty;
1936         const struct svga3dsurface_cache *cache = &dirty->cache;
1937         size_t backup_end = res->backup_offset + cache->mip_chain_bytes;
1938         SVGA3dBox *box = &dirty->boxes[0];
1939         u32 box_c2;
1940
1941         box->h = box->d = 1;
1942         start = max_t(size_t, start, res->backup_offset) - res->backup_offset;
1943         end = min(end, backup_end) - res->backup_offset;
1944         box_c2 = box->x + box->w;
1945         if (box->w == 0 || box->x > start)
1946                 box->x = start;
1947         if (box_c2 < end)
1948                 box->w = end - box->x;
1949 }
1950
1951 /*
1952  * vmw_surface_tex_dirty_add_range - The dirty_add_range callback for surfaces
1953  */
1954 static void vmw_surface_dirty_range_add(struct vmw_resource *res, size_t start,
1955                                         size_t end)
1956 {
1957         struct vmw_surface *srf = vmw_res_to_srf(res);
1958
1959         if (WARN_ON(end <= res->backup_offset ||
1960                     start >= res->backup_offset + res->backup_size))
1961                 return;
1962
1963         if (srf->format == SVGA3D_BUFFER)
1964                 vmw_surface_buf_dirty_range_add(res, start, end);
1965         else
1966                 vmw_surface_tex_dirty_range_add(res, start, end);
1967 }
1968
1969 /*
1970  * vmw_surface_dirty_sync - The surface's dirty_sync callback.
1971  */
1972 static int vmw_surface_dirty_sync(struct vmw_resource *res)
1973 {
1974         struct vmw_private *dev_priv = res->dev_priv;
1975         bool has_dx = 0;
1976         u32 i, num_dirty;
1977         struct vmw_surface_dirty *dirty =
1978                 (struct vmw_surface_dirty *) res->dirty;
1979         size_t alloc_size;
1980         const struct svga3dsurface_cache *cache = &dirty->cache;
1981         struct {
1982                 SVGA3dCmdHeader header;
1983                 SVGA3dCmdDXUpdateSubResource body;
1984         } *cmd1;
1985         struct {
1986                 SVGA3dCmdHeader header;
1987                 SVGA3dCmdUpdateGBImage body;
1988         } *cmd2;
1989         void *cmd;
1990
1991         num_dirty = 0;
1992         for (i = 0; i < dirty->num_subres; ++i) {
1993                 const SVGA3dBox *box = &dirty->boxes[i];
1994
1995                 if (box->d)
1996                         num_dirty++;
1997         }
1998
1999         if (!num_dirty)
2000                 goto out;
2001
2002         alloc_size = num_dirty * ((has_dx) ? sizeof(*cmd1) : sizeof(*cmd2));
2003         cmd = VMW_FIFO_RESERVE(dev_priv, alloc_size);
2004         if (!cmd)
2005                 return -ENOMEM;
2006
2007         cmd1 = cmd;
2008         cmd2 = cmd;
2009
2010         for (i = 0; i < dirty->num_subres; ++i) {
2011                 const SVGA3dBox *box = &dirty->boxes[i];
2012
2013                 if (!box->d)
2014                         continue;
2015
2016                 /*
2017                  * DX_UPDATE_SUBRESOURCE is aware of array surfaces.
2018                  * UPDATE_GB_IMAGE is not.
2019                  */
2020                 if (has_dx) {
2021                         cmd1->header.id = SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE;
2022                         cmd1->header.size = sizeof(cmd1->body);
2023                         cmd1->body.sid = res->id;
2024                         cmd1->body.subResource = i;
2025                         cmd1->body.box = *box;
2026                         cmd1++;
2027                 } else {
2028                         cmd2->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
2029                         cmd2->header.size = sizeof(cmd2->body);
2030                         cmd2->body.image.sid = res->id;
2031                         cmd2->body.image.face = i / cache->num_mip_levels;
2032                         cmd2->body.image.mipmap = i -
2033                                 (cache->num_mip_levels * cmd2->body.image.face);
2034                         cmd2->body.box = *box;
2035                         cmd2++;
2036                 }
2037
2038         }
2039         vmw_fifo_commit(dev_priv, alloc_size);
2040  out:
2041         memset(&dirty->boxes[0], 0, sizeof(dirty->boxes[0]) *
2042                dirty->num_subres);
2043
2044         return 0;
2045 }
2046
2047 /*
2048  * vmw_surface_dirty_alloc - The surface's dirty_alloc callback.
2049  */
2050 static int vmw_surface_dirty_alloc(struct vmw_resource *res)
2051 {
2052         struct vmw_surface *srf = vmw_res_to_srf(res);
2053         struct vmw_surface_dirty *dirty;
2054         u32 num_layers = 1;
2055         u32 num_mip;
2056         u32 num_subres;
2057         u32 num_samples;
2058         size_t dirty_size, acc_size;
2059         static struct ttm_operation_ctx ctx = {
2060                 .interruptible = false,
2061                 .no_wait_gpu = false
2062         };
2063         int ret;
2064
2065         if (srf->array_size)
2066                 num_layers = srf->array_size;
2067         else if (srf->flags & SVGA3D_SURFACE_CUBEMAP)
2068                 num_layers *= SVGA3D_MAX_SURFACE_FACES;
2069
2070         num_mip = srf->mip_levels[0];
2071         if (!num_mip)
2072                 num_mip = 1;
2073
2074         num_subres = num_layers * num_mip;
2075         dirty_size = sizeof(*dirty) + num_subres * sizeof(dirty->boxes[0]);
2076         acc_size = ttm_round_pot(dirty_size);
2077         ret = ttm_mem_global_alloc(vmw_mem_glob(res->dev_priv),
2078                                    acc_size, &ctx);
2079         if (ret) {
2080                 VMW_DEBUG_USER("Out of graphics memory for surface "
2081                                "dirty tracker.\n");
2082                 return ret;
2083         }
2084
2085         dirty = kvzalloc(dirty_size, GFP_KERNEL);
2086         if (!dirty) {
2087                 ret = -ENOMEM;
2088                 goto out_no_dirty;
2089         }
2090
2091         num_samples = max_t(u32, 1, srf->multisample_count);
2092         ret = svga3dsurface_setup_cache(&srf->base_size, srf->format, num_mip,
2093                                         num_layers, num_samples, &dirty->cache);
2094         if (ret)
2095                 goto out_no_cache;
2096
2097         dirty->num_subres = num_subres;
2098         dirty->size = acc_size;
2099         res->dirty = (struct vmw_resource_dirty *) dirty;
2100
2101         return 0;
2102
2103 out_no_cache:
2104         kvfree(dirty);
2105 out_no_dirty:
2106         ttm_mem_global_free(vmw_mem_glob(res->dev_priv), acc_size);
2107         return ret;
2108 }
2109
2110 /*
2111  * vmw_surface_dirty_free - The surface's dirty_free callback
2112  */
2113 static void vmw_surface_dirty_free(struct vmw_resource *res)
2114 {
2115         struct vmw_surface_dirty *dirty =
2116                 (struct vmw_surface_dirty *) res->dirty;
2117         size_t acc_size = dirty->size;
2118
2119         kvfree(dirty);
2120         ttm_mem_global_free(vmw_mem_glob(res->dev_priv), acc_size);
2121         res->dirty = NULL;
2122 }
2123
2124 /*
2125  * vmw_surface_clean - The surface's clean callback
2126  */
2127 static int vmw_surface_clean(struct vmw_resource *res)
2128 {
2129         struct vmw_private *dev_priv = res->dev_priv;
2130         size_t alloc_size;
2131         struct {
2132                 SVGA3dCmdHeader header;
2133                 SVGA3dCmdReadbackGBSurface body;
2134         } *cmd;
2135
2136         alloc_size = sizeof(*cmd);
2137         cmd = VMW_FIFO_RESERVE(dev_priv, alloc_size);
2138         if (!cmd)
2139                 return -ENOMEM;
2140
2141         cmd->header.id = SVGA_3D_CMD_READBACK_GB_SURFACE;
2142         cmd->header.size = sizeof(cmd->body);
2143         cmd->body.sid = res->id;
2144         vmw_fifo_commit(dev_priv, alloc_size);
2145
2146         return 0;
2147 }