1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
6 * Purpose: driver entry for initial, open, close, tx and rx.
14 * vt6655_probe - module initial (insmod) driver entry
15 * vt6655_remove - module remove entry
16 * device_free_info - device structure resource free function
17 * device_print_info - print out resource
18 * device_rx_srv - rx service function
19 * device_alloc_rx_buf - rx buffer pre-allocated function
20 * device_free_rx_buf - free rx buffer function
21 * device_free_tx_buf - free tx buffer function
22 * device_init_rd0_ring - initial rd dma0 ring
23 * device_init_rd1_ring - initial rd dma1 ring
24 * device_init_td0_ring - initial tx dma0 ring buffer
25 * device_init_td1_ring - initial tx dma1 ring buffer
26 * device_init_registers - initial MAC & BBP & RF internal registers.
27 * device_init_rings - initial tx/rx ring buffer
28 * device_free_rings - free all allocated ring buffer
29 * device_tx_srv - tx interrupt service function
34 #include <linux/file.h>
44 #include <linux/delay.h>
45 #include <linux/kthread.h>
46 #include <linux/slab.h>
48 /*--------------------- Static Definitions -------------------------*/
50 * Define module options
53 MODULE_LICENSE("GPL");
54 MODULE_DESCRIPTION("VIA Networking Solomon-A/B/G Wireless LAN Adapter Driver");
56 #define DEVICE_PARAM(N, D)
58 #define RX_DESC_MIN0 16
59 #define RX_DESC_MAX0 128
60 #define RX_DESC_DEF0 32
61 DEVICE_PARAM(RxDescriptors0, "Number of receive descriptors0");
63 #define RX_DESC_MIN1 16
64 #define RX_DESC_MAX1 128
65 #define RX_DESC_DEF1 32
66 DEVICE_PARAM(RxDescriptors1, "Number of receive descriptors1");
68 #define TX_DESC_MIN0 16
69 #define TX_DESC_MAX0 128
70 #define TX_DESC_DEF0 32
71 DEVICE_PARAM(TxDescriptors0, "Number of transmit descriptors0");
73 #define TX_DESC_MIN1 16
74 #define TX_DESC_MAX1 128
75 #define TX_DESC_DEF1 64
76 DEVICE_PARAM(TxDescriptors1, "Number of transmit descriptors1");
78 #define INT_WORKS_DEF 20
79 #define INT_WORKS_MIN 10
80 #define INT_WORKS_MAX 64
82 DEVICE_PARAM(int_works, "Number of packets per interrupt services");
84 #define RTS_THRESH_DEF 2347
86 #define FRAG_THRESH_DEF 2346
88 #define SHORT_RETRY_MIN 0
89 #define SHORT_RETRY_MAX 31
90 #define SHORT_RETRY_DEF 8
92 DEVICE_PARAM(ShortRetryLimit, "Short frame retry limits");
94 #define LONG_RETRY_MIN 0
95 #define LONG_RETRY_MAX 15
96 #define LONG_RETRY_DEF 4
98 DEVICE_PARAM(LongRetryLimit, "long frame retry limits");
100 /* BasebandType[] baseband type selected
101 * 0: indicate 802.11a type
102 * 1: indicate 802.11b type
103 * 2: indicate 802.11g type
105 #define BBP_TYPE_MIN 0
106 #define BBP_TYPE_MAX 2
107 #define BBP_TYPE_DEF 2
109 DEVICE_PARAM(BasebandType, "baseband type");
112 * Static vars definitions
114 static const struct pci_device_id vt6655_pci_id_table[] = {
115 { PCI_VDEVICE(VIA, 0x3253) },
119 /*--------------------- Static Functions --------------------------*/
121 static int vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent);
122 static void device_free_info(struct vnt_private *priv);
123 static void device_print_info(struct vnt_private *priv);
125 static int device_init_rd0_ring(struct vnt_private *priv);
126 static int device_init_rd1_ring(struct vnt_private *priv);
127 static int device_init_td0_ring(struct vnt_private *priv);
128 static int device_init_td1_ring(struct vnt_private *priv);
130 static int device_rx_srv(struct vnt_private *priv, unsigned int idx);
131 static int device_tx_srv(struct vnt_private *priv, unsigned int idx);
132 static bool device_alloc_rx_buf(struct vnt_private *, struct vnt_rx_desc *);
133 static void device_free_rx_buf(struct vnt_private *priv,
134 struct vnt_rx_desc *rd);
135 static void device_init_registers(struct vnt_private *priv);
136 static void device_free_tx_buf(struct vnt_private *, struct vnt_tx_desc *);
137 static void device_free_td0_ring(struct vnt_private *priv);
138 static void device_free_td1_ring(struct vnt_private *priv);
139 static void device_free_rd0_ring(struct vnt_private *priv);
140 static void device_free_rd1_ring(struct vnt_private *priv);
141 static void device_free_rings(struct vnt_private *priv);
143 /*--------------------- Export Variables --------------------------*/
145 /*--------------------- Export Functions --------------------------*/
147 static void vt6655_remove(struct pci_dev *pcid)
149 struct vnt_private *priv = pci_get_drvdata(pcid);
153 device_free_info(priv);
156 static void device_get_options(struct vnt_private *priv)
158 struct vnt_options *opts = &priv->opts;
160 opts->rx_descs0 = RX_DESC_DEF0;
161 opts->rx_descs1 = RX_DESC_DEF1;
162 opts->tx_descs[0] = TX_DESC_DEF0;
163 opts->tx_descs[1] = TX_DESC_DEF1;
164 opts->int_works = INT_WORKS_DEF;
166 opts->short_retry = SHORT_RETRY_DEF;
167 opts->long_retry = LONG_RETRY_DEF;
168 opts->bbp_type = BBP_TYPE_DEF;
172 device_set_options(struct vnt_private *priv)
174 priv->byShortRetryLimit = priv->opts.short_retry;
175 priv->byLongRetryLimit = priv->opts.long_retry;
176 priv->byBBType = priv->opts.bbp_type;
177 priv->byPacketType = priv->byBBType;
178 priv->byAutoFBCtrl = AUTO_FB_0;
179 priv->bUpdateBBVGA = true;
180 priv->preamble_type = 0;
182 pr_debug(" byShortRetryLimit= %d\n", (int)priv->byShortRetryLimit);
183 pr_debug(" byLongRetryLimit= %d\n", (int)priv->byLongRetryLimit);
184 pr_debug(" preamble_type= %d\n", (int)priv->preamble_type);
185 pr_debug(" byShortPreamble= %d\n", (int)priv->byShortPreamble);
186 pr_debug(" byBBType= %d\n", (int)priv->byBBType);
190 * Initialisation of MAC & BBP registers
193 static void device_init_registers(struct vnt_private *priv)
197 unsigned char byValue;
198 unsigned char byCCKPwrdBm = 0;
199 unsigned char byOFDMPwrdBm = 0;
202 bb_software_reset(priv);
204 /* Do MACbSoftwareReset in MACvInitialize */
205 MACbSoftwareReset(priv);
209 /* Only used in 11g type, sync with ERP IE */
210 priv->bProtectMode = false;
212 priv->bNonERPPresent = false;
213 priv->bBarkerPreambleMd = false;
214 priv->wCurrentRate = RATE_1M;
215 priv->byTopOFDMBasicRate = RATE_24M;
216 priv->byTopCCKBasicRate = RATE_1M;
219 MACvInitialize(priv);
222 VNSvInPortB(priv->port_offset + MAC_REG_LOCALID, &priv->local_id);
224 spin_lock_irqsave(&priv->lock, flags);
226 SROMvReadAllContents(priv->port_offset, priv->abyEEPROM);
228 spin_unlock_irqrestore(&priv->lock, flags);
230 /* Get Channel range */
231 priv->byMinChannel = 1;
232 priv->byMaxChannel = CB_MAX_CHANNEL;
235 byValue = SROMbyReadEmbedded(priv->port_offset, EEP_OFS_ANTENNA);
236 if (byValue & EEP_ANTINV)
237 priv->bTxRxAntInv = true;
239 priv->bTxRxAntInv = false;
241 byValue &= (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
242 /* if not set default is All */
244 byValue = (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
246 if (byValue == (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN)) {
247 priv->byAntennaCount = 2;
248 priv->byTxAntennaMode = ANT_B;
249 priv->dwTxAntennaSel = 1;
250 priv->dwRxAntennaSel = 1;
252 if (priv->bTxRxAntInv)
253 priv->byRxAntennaMode = ANT_A;
255 priv->byRxAntennaMode = ANT_B;
257 priv->byAntennaCount = 1;
258 priv->dwTxAntennaSel = 0;
259 priv->dwRxAntennaSel = 0;
261 if (byValue & EEP_ANTENNA_AUX) {
262 priv->byTxAntennaMode = ANT_A;
264 if (priv->bTxRxAntInv)
265 priv->byRxAntennaMode = ANT_B;
267 priv->byRxAntennaMode = ANT_A;
269 priv->byTxAntennaMode = ANT_B;
271 if (priv->bTxRxAntInv)
272 priv->byRxAntennaMode = ANT_A;
274 priv->byRxAntennaMode = ANT_B;
278 /* Set initial antenna mode */
279 bb_set_tx_antenna_mode(priv, priv->byTxAntennaMode);
280 bb_set_rx_antenna_mode(priv, priv->byRxAntennaMode);
282 /* zonetype initial */
283 priv->byOriginalZonetype = priv->abyEEPROM[EEP_OFS_ZONETYPE];
285 if (!priv->bZoneRegExist)
286 priv->byZoneType = priv->abyEEPROM[EEP_OFS_ZONETYPE];
288 pr_debug("priv->byZoneType = %x\n", priv->byZoneType);
293 /* Get Desire Power Value */
294 priv->byCurPwr = 0xFF;
295 priv->byCCKPwr = SROMbyReadEmbedded(priv->port_offset, EEP_OFS_PWR_CCK);
296 priv->byOFDMPwrG = SROMbyReadEmbedded(priv->port_offset,
299 /* Load power Table */
300 for (ii = 0; ii < CB_MAX_CHANNEL_24G; ii++) {
301 priv->abyCCKPwrTbl[ii + 1] =
302 SROMbyReadEmbedded(priv->port_offset,
303 (unsigned char)(ii + EEP_OFS_CCK_PWR_TBL));
304 if (priv->abyCCKPwrTbl[ii + 1] == 0)
305 priv->abyCCKPwrTbl[ii + 1] = priv->byCCKPwr;
307 priv->abyOFDMPwrTbl[ii + 1] =
308 SROMbyReadEmbedded(priv->port_offset,
309 (unsigned char)(ii + EEP_OFS_OFDM_PWR_TBL));
310 if (priv->abyOFDMPwrTbl[ii + 1] == 0)
311 priv->abyOFDMPwrTbl[ii + 1] = priv->byOFDMPwrG;
313 priv->abyCCKDefaultPwr[ii + 1] = byCCKPwrdBm;
314 priv->abyOFDMDefaultPwr[ii + 1] = byOFDMPwrdBm;
317 /* recover 12,13 ,14channel for EUROPE by 11 channel */
318 for (ii = 11; ii < 14; ii++) {
319 priv->abyCCKPwrTbl[ii] = priv->abyCCKPwrTbl[10];
320 priv->abyOFDMPwrTbl[ii] = priv->abyOFDMPwrTbl[10];
323 /* Load OFDM A Power Table */
324 for (ii = 0; ii < CB_MAX_CHANNEL_5G; ii++) {
325 priv->abyOFDMPwrTbl[ii + CB_MAX_CHANNEL_24G + 1] =
326 SROMbyReadEmbedded(priv->port_offset,
327 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_TBL));
329 priv->abyOFDMDefaultPwr[ii + CB_MAX_CHANNEL_24G + 1] =
330 SROMbyReadEmbedded(priv->port_offset,
331 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_dBm));
334 if (priv->local_id > REV_ID_VT3253_B1) {
335 MACvSelectPage1(priv->port_offset);
337 VNSvOutPortB(priv->port_offset + MAC_REG_MSRCTL + 1,
338 (MSRCTL1_TXPWR | MSRCTL1_CSAPAREN));
340 MACvSelectPage0(priv->port_offset);
343 /* use relative tx timeout and 802.11i D4 */
344 MACvWordRegBitsOn(priv->port_offset,
345 MAC_REG_CFG, (CFG_TKIPOPT | CFG_NOTXTIMEOUT));
347 /* set performance parameter by registry */
348 MACvSetShortRetryLimit(priv, priv->byShortRetryLimit);
349 MACvSetLongRetryLimit(priv, priv->byLongRetryLimit);
351 /* reset TSF counter */
352 VNSvOutPortB(priv->port_offset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
353 /* enable TSF counter */
354 VNSvOutPortB(priv->port_offset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
356 /* initialize BBP registers */
357 bb_vt3253_init(priv);
359 if (priv->bUpdateBBVGA) {
360 priv->byBBVGACurrent = priv->abyBBVGA[0];
361 priv->byBBVGANew = priv->byBBVGACurrent;
362 bb_set_vga_gain_offset(priv, priv->abyBBVGA[0]);
365 bb_set_rx_antenna_mode(priv, priv->byRxAntennaMode);
366 bb_set_tx_antenna_mode(priv, priv->byTxAntennaMode);
368 /* Set BB and packet type at the same time. */
369 /* Set Short Slot Time, xIFS, and RSPINF. */
370 priv->wCurrentRate = RATE_54M;
372 priv->radio_off = false;
374 priv->byRadioCtl = SROMbyReadEmbedded(priv->port_offset,
376 priv->hw_radio_off = false;
378 if (priv->byRadioCtl & EEP_RADIOCTL_ENABLE) {
380 MACvGPIOIn(priv->port_offset, &priv->byGPIO);
382 if (((priv->byGPIO & GPIO0_DATA) &&
383 !(priv->byRadioCtl & EEP_RADIOCTL_INV)) ||
384 (!(priv->byGPIO & GPIO0_DATA) &&
385 (priv->byRadioCtl & EEP_RADIOCTL_INV)))
386 priv->hw_radio_off = true;
389 if (priv->hw_radio_off || priv->bRadioControlOff)
390 CARDbRadioPowerOff(priv);
392 /* get Permanent network address */
393 SROMvReadEtherAddress(priv->port_offset, priv->abyCurrentNetAddr);
394 pr_debug("Network address = %pM\n", priv->abyCurrentNetAddr);
396 /* reset Tx pointer */
397 CARDvSafeResetRx(priv);
398 /* reset Rx pointer */
399 CARDvSafeResetTx(priv);
401 if (priv->local_id <= REV_ID_VT3253_A1)
402 MACvRegBitsOn(priv->port_offset, MAC_REG_RCR, RCR_WPAERR);
405 MACvReceive0(priv->port_offset);
406 MACvReceive1(priv->port_offset);
408 /* start the adapter */
409 MACvStart(priv->port_offset);
412 static void device_print_info(struct vnt_private *priv)
414 dev_info(&priv->pcid->dev, "MAC=%pM IO=0x%lx Mem=0x%lx IRQ=%d\n",
415 priv->abyCurrentNetAddr, (unsigned long)priv->ioaddr,
416 (unsigned long)priv->port_offset, priv->pcid->irq);
419 static void device_free_info(struct vnt_private *priv)
425 ieee80211_unregister_hw(priv->hw);
427 if (priv->port_offset)
428 iounmap(priv->port_offset);
431 pci_release_regions(priv->pcid);
434 ieee80211_free_hw(priv->hw);
437 static bool device_init_rings(struct vnt_private *priv)
441 /*allocate all RD/TD rings a single pool*/
442 vir_pool = dma_alloc_coherent(&priv->pcid->dev,
443 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
444 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
445 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
446 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
447 &priv->pool_dma, GFP_ATOMIC);
449 dev_err(&priv->pcid->dev, "allocate desc dma memory failed\n");
453 priv->aRD0Ring = vir_pool;
454 priv->aRD1Ring = vir_pool +
455 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc);
457 priv->rd0_pool_dma = priv->pool_dma;
458 priv->rd1_pool_dma = priv->rd0_pool_dma +
459 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc);
461 priv->tx0_bufs = dma_alloc_coherent(&priv->pcid->dev,
462 priv->opts.tx_descs[0] * PKT_BUF_SZ +
463 priv->opts.tx_descs[1] * PKT_BUF_SZ +
466 &priv->tx_bufs_dma0, GFP_ATOMIC);
467 if (!priv->tx0_bufs) {
468 dev_err(&priv->pcid->dev, "allocate buf dma memory failed\n");
470 dma_free_coherent(&priv->pcid->dev,
471 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
472 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
473 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
474 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
475 vir_pool, priv->pool_dma);
479 priv->td0_pool_dma = priv->rd1_pool_dma +
480 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc);
482 priv->td1_pool_dma = priv->td0_pool_dma +
483 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc);
485 /* vir_pool: pvoid type */
486 priv->apTD0Rings = vir_pool
487 + priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc)
488 + priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc);
490 priv->apTD1Rings = vir_pool
491 + priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc)
492 + priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc)
493 + priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc);
495 priv->tx1_bufs = priv->tx0_bufs +
496 priv->opts.tx_descs[0] * PKT_BUF_SZ;
498 priv->tx_beacon_bufs = priv->tx1_bufs +
499 priv->opts.tx_descs[1] * PKT_BUF_SZ;
501 priv->pbyTmpBuff = priv->tx_beacon_bufs +
504 priv->tx_bufs_dma1 = priv->tx_bufs_dma0 +
505 priv->opts.tx_descs[0] * PKT_BUF_SZ;
507 priv->tx_beacon_dma = priv->tx_bufs_dma1 +
508 priv->opts.tx_descs[1] * PKT_BUF_SZ;
513 static void device_free_rings(struct vnt_private *priv)
515 dma_free_coherent(&priv->pcid->dev,
516 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
517 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
518 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
519 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
520 priv->aRD0Ring, priv->pool_dma);
523 dma_free_coherent(&priv->pcid->dev,
524 priv->opts.tx_descs[0] * PKT_BUF_SZ +
525 priv->opts.tx_descs[1] * PKT_BUF_SZ +
528 priv->tx0_bufs, priv->tx_bufs_dma0);
531 static int device_init_rd0_ring(struct vnt_private *priv)
534 dma_addr_t curr = priv->rd0_pool_dma;
535 struct vnt_rx_desc *desc;
538 /* Init the RD0 ring entries */
539 for (i = 0; i < priv->opts.rx_descs0;
540 i ++, curr += sizeof(struct vnt_rx_desc)) {
541 desc = &priv->aRD0Ring[i];
542 desc->rd_info = kzalloc(sizeof(*desc->rd_info), GFP_KERNEL);
543 if (!desc->rd_info) {
548 if (!device_alloc_rx_buf(priv, desc)) {
549 dev_err(&priv->pcid->dev, "can not alloc rx bufs\n");
554 desc->next = &priv->aRD0Ring[(i + 1) % priv->opts.rx_descs0];
555 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_rx_desc));
559 priv->aRD0Ring[i - 1].next_desc = cpu_to_le32(priv->rd0_pool_dma);
560 priv->pCurrRD[0] = &priv->aRD0Ring[0];
565 kfree(desc->rd_info);
569 desc = &priv->aRD0Ring[i];
570 device_free_rx_buf(priv, desc);
571 kfree(desc->rd_info);
577 static int device_init_rd1_ring(struct vnt_private *priv)
580 dma_addr_t curr = priv->rd1_pool_dma;
581 struct vnt_rx_desc *desc;
584 /* Init the RD1 ring entries */
585 for (i = 0; i < priv->opts.rx_descs1;
586 i ++, curr += sizeof(struct vnt_rx_desc)) {
587 desc = &priv->aRD1Ring[i];
588 desc->rd_info = kzalloc(sizeof(*desc->rd_info), GFP_KERNEL);
589 if (!desc->rd_info) {
594 if (!device_alloc_rx_buf(priv, desc)) {
595 dev_err(&priv->pcid->dev, "can not alloc rx bufs\n");
600 desc->next = &priv->aRD1Ring[(i + 1) % priv->opts.rx_descs1];
601 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_rx_desc));
605 priv->aRD1Ring[i - 1].next_desc = cpu_to_le32(priv->rd1_pool_dma);
606 priv->pCurrRD[1] = &priv->aRD1Ring[0];
611 kfree(desc->rd_info);
615 desc = &priv->aRD1Ring[i];
616 device_free_rx_buf(priv, desc);
617 kfree(desc->rd_info);
623 static void device_free_rd0_ring(struct vnt_private *priv)
627 for (i = 0; i < priv->opts.rx_descs0; i++) {
628 struct vnt_rx_desc *desc = &priv->aRD0Ring[i];
630 device_free_rx_buf(priv, desc);
631 kfree(desc->rd_info);
635 static void device_free_rd1_ring(struct vnt_private *priv)
639 for (i = 0; i < priv->opts.rx_descs1; i++) {
640 struct vnt_rx_desc *desc = &priv->aRD1Ring[i];
642 device_free_rx_buf(priv, desc);
643 kfree(desc->rd_info);
647 static int device_init_td0_ring(struct vnt_private *priv)
651 struct vnt_tx_desc *desc;
654 curr = priv->td0_pool_dma;
655 for (i = 0; i < priv->opts.tx_descs[0];
656 i++, curr += sizeof(struct vnt_tx_desc)) {
657 desc = &priv->apTD0Rings[i];
658 desc->td_info = kzalloc(sizeof(*desc->td_info), GFP_KERNEL);
659 if (!desc->td_info) {
664 desc->td_info->buf = priv->tx0_bufs + i * PKT_BUF_SZ;
665 desc->td_info->buf_dma = priv->tx_bufs_dma0 + i * PKT_BUF_SZ;
667 desc->next = &(priv->apTD0Rings[(i + 1) % priv->opts.tx_descs[0]]);
668 desc->next_desc = cpu_to_le32(curr +
669 sizeof(struct vnt_tx_desc));
673 priv->apTD0Rings[i - 1].next_desc = cpu_to_le32(priv->td0_pool_dma);
674 priv->apTailTD[0] = priv->apCurrTD[0] = &priv->apTD0Rings[0];
680 desc = &priv->apTD0Rings[i];
681 kfree(desc->td_info);
687 static int device_init_td1_ring(struct vnt_private *priv)
691 struct vnt_tx_desc *desc;
694 /* Init the TD ring entries */
695 curr = priv->td1_pool_dma;
696 for (i = 0; i < priv->opts.tx_descs[1];
697 i++, curr += sizeof(struct vnt_tx_desc)) {
698 desc = &priv->apTD1Rings[i];
699 desc->td_info = kzalloc(sizeof(*desc->td_info), GFP_KERNEL);
700 if (!desc->td_info) {
705 desc->td_info->buf = priv->tx1_bufs + i * PKT_BUF_SZ;
706 desc->td_info->buf_dma = priv->tx_bufs_dma1 + i * PKT_BUF_SZ;
708 desc->next = &(priv->apTD1Rings[(i + 1) % priv->opts.tx_descs[1]]);
709 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_tx_desc));
713 priv->apTD1Rings[i - 1].next_desc = cpu_to_le32(priv->td1_pool_dma);
714 priv->apTailTD[1] = priv->apCurrTD[1] = &priv->apTD1Rings[0];
720 desc = &priv->apTD1Rings[i];
721 kfree(desc->td_info);
727 static void device_free_td0_ring(struct vnt_private *priv)
731 for (i = 0; i < priv->opts.tx_descs[0]; i++) {
732 struct vnt_tx_desc *desc = &priv->apTD0Rings[i];
733 struct vnt_td_info *td_info = desc->td_info;
735 dev_kfree_skb(td_info->skb);
736 kfree(desc->td_info);
740 static void device_free_td1_ring(struct vnt_private *priv)
744 for (i = 0; i < priv->opts.tx_descs[1]; i++) {
745 struct vnt_tx_desc *desc = &priv->apTD1Rings[i];
746 struct vnt_td_info *td_info = desc->td_info;
748 dev_kfree_skb(td_info->skb);
749 kfree(desc->td_info);
753 /*-----------------------------------------------------------------*/
755 static int device_rx_srv(struct vnt_private *priv, unsigned int idx)
757 struct vnt_rx_desc *rd;
760 for (rd = priv->pCurrRD[idx];
761 rd->rd0.owner == OWNED_BY_HOST;
766 if (!rd->rd_info->skb)
769 if (vnt_receive_frame(priv, rd)) {
770 if (!device_alloc_rx_buf(priv, rd)) {
771 dev_err(&priv->pcid->dev,
772 "can not allocate rx buf\n");
776 rd->rd0.owner = OWNED_BY_NIC;
779 priv->pCurrRD[idx] = rd;
784 static bool device_alloc_rx_buf(struct vnt_private *priv,
785 struct vnt_rx_desc *rd)
787 struct vnt_rd_info *rd_info = rd->rd_info;
789 rd_info->skb = dev_alloc_skb((int)priv->rx_buf_sz);
794 dma_map_single(&priv->pcid->dev,
795 skb_put(rd_info->skb, skb_tailroom(rd_info->skb)),
796 priv->rx_buf_sz, DMA_FROM_DEVICE);
797 if (dma_mapping_error(&priv->pcid->dev, rd_info->skb_dma)) {
798 dev_kfree_skb(rd_info->skb);
803 *((unsigned int *)&rd->rd0) = 0; /* FIX cast */
805 rd->rd0.res_count = cpu_to_le16(priv->rx_buf_sz);
806 rd->rd0.owner = OWNED_BY_NIC;
807 rd->rd1.req_count = cpu_to_le16(priv->rx_buf_sz);
808 rd->buff_addr = cpu_to_le32(rd_info->skb_dma);
813 static void device_free_rx_buf(struct vnt_private *priv,
814 struct vnt_rx_desc *rd)
816 struct vnt_rd_info *rd_info = rd->rd_info;
818 dma_unmap_single(&priv->pcid->dev, rd_info->skb_dma,
819 priv->rx_buf_sz, DMA_FROM_DEVICE);
820 dev_kfree_skb(rd_info->skb);
823 static const u8 fallback_rate0[5][5] = {
824 {RATE_18M, RATE_18M, RATE_12M, RATE_12M, RATE_12M},
825 {RATE_24M, RATE_24M, RATE_18M, RATE_12M, RATE_12M},
826 {RATE_36M, RATE_36M, RATE_24M, RATE_18M, RATE_18M},
827 {RATE_48M, RATE_48M, RATE_36M, RATE_24M, RATE_24M},
828 {RATE_54M, RATE_54M, RATE_48M, RATE_36M, RATE_36M}
831 static const u8 fallback_rate1[5][5] = {
832 {RATE_18M, RATE_18M, RATE_12M, RATE_6M, RATE_6M},
833 {RATE_24M, RATE_24M, RATE_18M, RATE_6M, RATE_6M},
834 {RATE_36M, RATE_36M, RATE_24M, RATE_12M, RATE_12M},
835 {RATE_48M, RATE_48M, RATE_24M, RATE_12M, RATE_12M},
836 {RATE_54M, RATE_54M, RATE_36M, RATE_18M, RATE_18M}
839 static int vnt_int_report_rate(struct vnt_private *priv,
840 struct vnt_td_info *context, u8 tsr0, u8 tsr1)
842 struct vnt_tx_fifo_head *fifo_head;
843 struct ieee80211_tx_info *info;
844 struct ieee80211_rate *rate;
846 u8 tx_retry = (tsr0 & TSR0_NCR);
855 fifo_head = (struct vnt_tx_fifo_head *)context->buf;
856 fb_option = (le16_to_cpu(fifo_head->fifo_ctl) &
857 (FIFOCTL_AUTO_FB_0 | FIFOCTL_AUTO_FB_1));
859 info = IEEE80211_SKB_CB(context->skb);
860 idx = info->control.rates[0].idx;
862 if (fb_option && !(tsr1 & TSR1_TERR)) {
866 rate = ieee80211_get_tx_rate(priv->hw, info);
867 tx_rate = rate->hw_value - RATE_18M;
872 if (fb_option & FIFOCTL_AUTO_FB_0)
873 tx_rate = fallback_rate0[tx_rate][retry];
874 else if (fb_option & FIFOCTL_AUTO_FB_1)
875 tx_rate = fallback_rate1[tx_rate][retry];
877 if (info->band == NL80211_BAND_5GHZ)
878 idx = tx_rate - RATE_6M;
883 ieee80211_tx_info_clear_status(info);
885 info->status.rates[0].count = tx_retry;
887 if (!(tsr1 & TSR1_TERR)) {
888 info->status.rates[0].idx = idx;
890 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
891 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
893 info->flags |= IEEE80211_TX_STAT_ACK;
899 static int device_tx_srv(struct vnt_private *priv, unsigned int idx)
901 struct vnt_tx_desc *desc;
903 unsigned char byTsr0;
904 unsigned char byTsr1;
906 for (desc = priv->apTailTD[idx]; priv->iTDUsed[idx] > 0; desc = desc->next) {
907 if (desc->td0.owner == OWNED_BY_NIC)
912 byTsr0 = desc->td0.tsr0;
913 byTsr1 = desc->td0.tsr1;
915 /* Only the status of first TD in the chain is correct */
916 if (desc->td1.tcr & TCR_STP) {
917 if ((desc->td_info->flags & TD_FLAGS_NETIF_SKB) != 0) {
918 if (!(byTsr1 & TSR1_TERR)) {
920 pr_debug(" Tx[%d] OK but has error. tsr1[%02X] tsr0[%02X]\n",
925 pr_debug(" Tx[%d] dropped & tsr1[%02X] tsr0[%02X]\n",
926 (int)idx, byTsr1, byTsr0);
930 if (byTsr1 & TSR1_TERR) {
931 if ((desc->td_info->flags & TD_FLAGS_PRIV_SKB) != 0) {
932 pr_debug(" Tx[%d] fail has error. tsr1[%02X] tsr0[%02X]\n",
933 (int)idx, byTsr1, byTsr0);
937 vnt_int_report_rate(priv, desc->td_info, byTsr0, byTsr1);
939 device_free_tx_buf(priv, desc);
940 priv->iTDUsed[idx]--;
944 priv->apTailTD[idx] = desc;
949 static void device_error(struct vnt_private *priv, unsigned short status)
951 if (status & ISR_FETALERR) {
952 dev_err(&priv->pcid->dev, "Hardware fatal error\n");
959 static void device_free_tx_buf(struct vnt_private *priv,
960 struct vnt_tx_desc *desc)
962 struct vnt_td_info *td_info = desc->td_info;
963 struct sk_buff *skb = td_info->skb;
966 ieee80211_tx_status_irqsafe(priv->hw, skb);
972 static void vnt_check_bb_vga(struct vnt_private *priv)
977 if (!priv->bUpdateBBVGA)
980 if (priv->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
983 if (!(priv->vif->bss_conf.assoc && priv->current_rssi))
986 RFvRSSITodBm(priv, (u8)priv->current_rssi, &dbm);
988 for (i = 0; i < BB_VGA_LEVEL; i++) {
989 if (dbm < priv->dbm_threshold[i]) {
990 priv->byBBVGANew = priv->abyBBVGA[i];
995 if (priv->byBBVGANew == priv->byBBVGACurrent) {
996 priv->uBBVGADiffCount = 1;
1000 priv->uBBVGADiffCount++;
1002 if (priv->uBBVGADiffCount == 1) {
1003 /* first VGA diff gain */
1004 bb_set_vga_gain_offset(priv, priv->byBBVGANew);
1006 dev_dbg(&priv->pcid->dev,
1007 "First RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
1008 (int)dbm, priv->byBBVGANew,
1009 priv->byBBVGACurrent,
1010 (int)priv->uBBVGADiffCount);
1013 if (priv->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD) {
1014 dev_dbg(&priv->pcid->dev,
1015 "RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
1016 (int)dbm, priv->byBBVGANew,
1017 priv->byBBVGACurrent,
1018 (int)priv->uBBVGADiffCount);
1020 bb_set_vga_gain_offset(priv, priv->byBBVGANew);
1024 static void vnt_interrupt_process(struct vnt_private *priv)
1026 struct ieee80211_low_level_stats *low_stats = &priv->low_stats;
1030 unsigned long flags;
1032 MACvReadISR(priv->port_offset, &isr);
1037 if (isr == 0xffffffff) {
1038 pr_debug("isr = 0xffff\n");
1042 spin_lock_irqsave(&priv->lock, flags);
1044 /* Read low level stats */
1045 MACvReadMIBCounter(priv->port_offset, &mib_counter);
1047 low_stats->dot11RTSSuccessCount += mib_counter & 0xff;
1048 low_stats->dot11RTSFailureCount += (mib_counter >> 8) & 0xff;
1049 low_stats->dot11ACKFailureCount += (mib_counter >> 16) & 0xff;
1050 low_stats->dot11FCSErrorCount += (mib_counter >> 24) & 0xff;
1054 * Must do this after doing rx/tx, cause ISR bit is slow
1055 * than RD/TD write back
1056 * update ISR counter
1058 while (isr && priv->vif) {
1059 MACvWriteISR(priv->port_offset, isr);
1061 if (isr & ISR_FETALERR) {
1062 pr_debug(" ISR_FETALERR\n");
1063 VNSvOutPortB(priv->port_offset + MAC_REG_SOFTPWRCTL, 0);
1064 VNSvOutPortW(priv->port_offset +
1065 MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI);
1066 device_error(priv, isr);
1069 if (isr & ISR_TBTT) {
1070 if (priv->op_mode != NL80211_IFTYPE_ADHOC)
1071 vnt_check_bb_vga(priv);
1073 priv->bBeaconSent = false;
1074 if (priv->bEnablePSMode)
1075 PSbIsNextTBTTWakeUp((void *)priv);
1077 if ((priv->op_mode == NL80211_IFTYPE_AP ||
1078 priv->op_mode == NL80211_IFTYPE_ADHOC) &&
1079 priv->vif->bss_conf.enable_beacon)
1080 MACvOneShotTimer1MicroSec(priv,
1081 (priv->vif->bss_conf.beacon_int -
1082 MAKE_BEACON_RESERVED) << 10);
1084 /* TODO: adhoc PS mode */
1087 if (isr & ISR_BNTX) {
1088 if (priv->op_mode == NL80211_IFTYPE_ADHOC) {
1089 priv->bIsBeaconBufReadySet = false;
1090 priv->cbBeaconBufReadySetCnt = 0;
1093 priv->bBeaconSent = true;
1096 if (isr & ISR_RXDMA0)
1097 max_count += device_rx_srv(priv, TYPE_RXDMA0);
1099 if (isr & ISR_RXDMA1)
1100 max_count += device_rx_srv(priv, TYPE_RXDMA1);
1102 if (isr & ISR_TXDMA0)
1103 max_count += device_tx_srv(priv, TYPE_TXDMA0);
1105 if (isr & ISR_AC0DMA)
1106 max_count += device_tx_srv(priv, TYPE_AC0DMA);
1108 if (isr & ISR_SOFTTIMER1) {
1109 if (priv->vif->bss_conf.enable_beacon)
1110 vnt_beacon_make(priv, priv->vif);
1113 /* If both buffers available wake the queue */
1114 if (AVAIL_TD(priv, TYPE_TXDMA0) &&
1115 AVAIL_TD(priv, TYPE_AC0DMA) &&
1116 ieee80211_queue_stopped(priv->hw, 0))
1117 ieee80211_wake_queues(priv->hw);
1119 MACvReadISR(priv->port_offset, &isr);
1121 MACvReceive0(priv->port_offset);
1122 MACvReceive1(priv->port_offset);
1124 if (max_count > priv->opts.int_works)
1128 spin_unlock_irqrestore(&priv->lock, flags);
1131 static void vnt_interrupt_work(struct work_struct *work)
1133 struct vnt_private *priv =
1134 container_of(work, struct vnt_private, interrupt_work);
1137 vnt_interrupt_process(priv);
1139 MACvIntEnable(priv->port_offset, IMR_MASK_VALUE);
1142 static irqreturn_t vnt_interrupt(int irq, void *arg)
1144 struct vnt_private *priv = arg;
1146 schedule_work(&priv->interrupt_work);
1148 MACvIntDisable(priv->port_offset);
1153 static int vnt_tx_packet(struct vnt_private *priv, struct sk_buff *skb)
1155 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1156 struct vnt_tx_desc *head_td;
1158 unsigned long flags;
1160 spin_lock_irqsave(&priv->lock, flags);
1162 if (ieee80211_is_data(hdr->frame_control))
1163 dma_idx = TYPE_AC0DMA;
1165 dma_idx = TYPE_TXDMA0;
1167 if (AVAIL_TD(priv, dma_idx) < 1) {
1168 spin_unlock_irqrestore(&priv->lock, flags);
1169 ieee80211_stop_queues(priv->hw);
1173 head_td = priv->apCurrTD[dma_idx];
1175 head_td->td1.tcr = 0;
1177 head_td->td_info->skb = skb;
1179 if (dma_idx == TYPE_AC0DMA)
1180 head_td->td_info->flags = TD_FLAGS_NETIF_SKB;
1182 priv->apCurrTD[dma_idx] = head_td->next;
1184 spin_unlock_irqrestore(&priv->lock, flags);
1186 vnt_generate_fifo_header(priv, dma_idx, head_td, skb);
1188 spin_lock_irqsave(&priv->lock, flags);
1190 priv->bPWBitOn = false;
1192 /* Set TSR1 & ReqCount in TxDescHead */
1193 head_td->td1.tcr |= (TCR_STP | TCR_EDP | EDMSDU);
1194 head_td->td1.req_count = cpu_to_le16(head_td->td_info->req_count);
1196 head_td->buff_addr = cpu_to_le32(head_td->td_info->buf_dma);
1198 /* Poll Transmit the adapter */
1200 head_td->td0.owner = OWNED_BY_NIC;
1201 wmb(); /* second memory barrier */
1203 if (head_td->td_info->flags & TD_FLAGS_NETIF_SKB)
1204 MACvTransmitAC0(priv->port_offset);
1206 MACvTransmit0(priv->port_offset);
1208 priv->iTDUsed[dma_idx]++;
1210 spin_unlock_irqrestore(&priv->lock, flags);
1215 static void vnt_tx_80211(struct ieee80211_hw *hw,
1216 struct ieee80211_tx_control *control,
1217 struct sk_buff *skb)
1219 struct vnt_private *priv = hw->priv;
1221 if (vnt_tx_packet(priv, skb))
1222 ieee80211_free_txskb(hw, skb);
1225 static int vnt_start(struct ieee80211_hw *hw)
1227 struct vnt_private *priv = hw->priv;
1230 priv->rx_buf_sz = PKT_BUF_SZ;
1231 if (!device_init_rings(priv))
1234 ret = request_irq(priv->pcid->irq, vnt_interrupt,
1235 IRQF_SHARED, "vt6655", priv);
1237 dev_dbg(&priv->pcid->dev, "failed to start irq\n");
1238 goto err_free_rings;
1241 dev_dbg(&priv->pcid->dev, "call device init rd0 ring\n");
1242 ret = device_init_rd0_ring(priv);
1245 ret = device_init_rd1_ring(priv);
1247 goto err_free_rd0_ring;
1248 ret = device_init_td0_ring(priv);
1250 goto err_free_rd1_ring;
1251 ret = device_init_td1_ring(priv);
1253 goto err_free_td0_ring;
1255 device_init_registers(priv);
1257 dev_dbg(&priv->pcid->dev, "call MACvIntEnable\n");
1258 MACvIntEnable(priv->port_offset, IMR_MASK_VALUE);
1260 ieee80211_wake_queues(hw);
1265 device_free_td0_ring(priv);
1267 device_free_rd1_ring(priv);
1269 device_free_rd0_ring(priv);
1271 free_irq(priv->pcid->irq, priv);
1273 device_free_rings(priv);
1277 static void vnt_stop(struct ieee80211_hw *hw)
1279 struct vnt_private *priv = hw->priv;
1281 ieee80211_stop_queues(hw);
1283 cancel_work_sync(&priv->interrupt_work);
1286 MACbSoftwareReset(priv);
1287 CARDbRadioPowerOff(priv);
1289 device_free_td0_ring(priv);
1290 device_free_td1_ring(priv);
1291 device_free_rd0_ring(priv);
1292 device_free_rd1_ring(priv);
1293 device_free_rings(priv);
1295 free_irq(priv->pcid->irq, priv);
1298 static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1300 struct vnt_private *priv = hw->priv;
1304 switch (vif->type) {
1305 case NL80211_IFTYPE_STATION:
1307 case NL80211_IFTYPE_ADHOC:
1308 MACvRegBitsOff(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);
1310 MACvRegBitsOn(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1313 case NL80211_IFTYPE_AP:
1314 MACvRegBitsOff(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);
1316 MACvRegBitsOn(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP);
1323 priv->op_mode = vif->type;
1328 static void vnt_remove_interface(struct ieee80211_hw *hw,
1329 struct ieee80211_vif *vif)
1331 struct vnt_private *priv = hw->priv;
1333 switch (vif->type) {
1334 case NL80211_IFTYPE_STATION:
1336 case NL80211_IFTYPE_ADHOC:
1337 MACvRegBitsOff(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
1338 MACvRegBitsOff(priv->port_offset,
1339 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1340 MACvRegBitsOff(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1342 case NL80211_IFTYPE_AP:
1343 MACvRegBitsOff(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
1344 MACvRegBitsOff(priv->port_offset,
1345 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1346 MACvRegBitsOff(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP);
1352 priv->op_mode = NL80211_IFTYPE_UNSPECIFIED;
1355 static int vnt_config(struct ieee80211_hw *hw, u32 changed)
1357 struct vnt_private *priv = hw->priv;
1358 struct ieee80211_conf *conf = &hw->conf;
1361 if (changed & IEEE80211_CONF_CHANGE_PS) {
1362 if (conf->flags & IEEE80211_CONF_PS)
1363 PSvEnablePowerSaving(priv, conf->listen_interval);
1365 PSvDisablePowerSaving(priv);
1368 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) ||
1369 (conf->flags & IEEE80211_CONF_OFFCHANNEL)) {
1370 set_channel(priv, conf->chandef.chan);
1372 if (conf->chandef.chan->band == NL80211_BAND_5GHZ)
1373 bb_type = BB_TYPE_11A;
1375 bb_type = BB_TYPE_11G;
1377 if (priv->byBBType != bb_type) {
1378 priv->byBBType = bb_type;
1380 CARDbSetPhyParameter(priv, priv->byBBType);
1384 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1385 if (priv->byBBType == BB_TYPE_11B)
1386 priv->wCurrentRate = RATE_1M;
1388 priv->wCurrentRate = RATE_54M;
1390 RFbSetPower(priv, priv->wCurrentRate,
1391 conf->chandef.chan->hw_value);
1397 static void vnt_bss_info_changed(struct ieee80211_hw *hw,
1398 struct ieee80211_vif *vif,
1399 struct ieee80211_bss_conf *conf, u32 changed)
1401 struct vnt_private *priv = hw->priv;
1403 priv->current_aid = conf->aid;
1405 if (changed & BSS_CHANGED_BSSID && conf->bssid) {
1406 unsigned long flags;
1408 spin_lock_irqsave(&priv->lock, flags);
1410 MACvWriteBSSIDAddress(priv->port_offset, (u8 *)conf->bssid);
1412 spin_unlock_irqrestore(&priv->lock, flags);
1415 if (changed & BSS_CHANGED_BASIC_RATES) {
1416 priv->basic_rates = conf->basic_rates;
1418 CARDvUpdateBasicTopRate(priv);
1420 dev_dbg(&priv->pcid->dev,
1421 "basic rates %x\n", conf->basic_rates);
1424 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1425 if (conf->use_short_preamble) {
1426 MACvEnableBarkerPreambleMd(priv->port_offset);
1427 priv->preamble_type = true;
1429 MACvDisableBarkerPreambleMd(priv->port_offset);
1430 priv->preamble_type = false;
1434 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1435 if (conf->use_cts_prot)
1436 MACvEnableProtectMD(priv->port_offset);
1438 MACvDisableProtectMD(priv->port_offset);
1441 if (changed & BSS_CHANGED_ERP_SLOT) {
1442 if (conf->use_short_slot)
1443 priv->short_slot_time = true;
1445 priv->short_slot_time = false;
1447 CARDbSetPhyParameter(priv, priv->byBBType);
1448 bb_set_vga_gain_offset(priv, priv->abyBBVGA[0]);
1451 if (changed & BSS_CHANGED_TXPOWER)
1452 RFbSetPower(priv, priv->wCurrentRate,
1453 conf->chandef.chan->hw_value);
1455 if (changed & BSS_CHANGED_BEACON_ENABLED) {
1456 dev_dbg(&priv->pcid->dev,
1457 "Beacon enable %d\n", conf->enable_beacon);
1459 if (conf->enable_beacon) {
1460 vnt_beacon_enable(priv, vif, conf);
1462 MACvRegBitsOn(priv->port_offset, MAC_REG_TCR,
1465 MACvRegBitsOff(priv->port_offset, MAC_REG_TCR,
1470 if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INFO) &&
1471 priv->op_mode != NL80211_IFTYPE_AP) {
1472 if (conf->assoc && conf->beacon_rate) {
1473 CARDbUpdateTSF(priv, conf->beacon_rate->hw_value,
1476 CARDbSetBeaconPeriod(priv, conf->beacon_int);
1478 CARDvSetFirstNextTBTT(priv, conf->beacon_int);
1480 VNSvOutPortB(priv->port_offset + MAC_REG_TFTCTL,
1482 VNSvOutPortB(priv->port_offset + MAC_REG_TFTCTL,
1488 static u64 vnt_prepare_multicast(struct ieee80211_hw *hw,
1489 struct netdev_hw_addr_list *mc_list)
1491 struct vnt_private *priv = hw->priv;
1492 struct netdev_hw_addr *ha;
1496 netdev_hw_addr_list_for_each(ha, mc_list) {
1497 bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1499 mc_filter |= 1ULL << (bit_nr & 0x3f);
1502 priv->mc_list_count = mc_list->count;
1507 static void vnt_configure(struct ieee80211_hw *hw,
1508 unsigned int changed_flags,
1509 unsigned int *total_flags, u64 multicast)
1511 struct vnt_private *priv = hw->priv;
1514 *total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC;
1516 VNSvInPortB(priv->port_offset + MAC_REG_RCR, &rx_mode);
1518 dev_dbg(&priv->pcid->dev, "rx mode in = %x\n", rx_mode);
1520 if (changed_flags & FIF_ALLMULTI) {
1521 if (*total_flags & FIF_ALLMULTI) {
1522 unsigned long flags;
1524 spin_lock_irqsave(&priv->lock, flags);
1526 if (priv->mc_list_count > 2) {
1527 MACvSelectPage1(priv->port_offset);
1529 VNSvOutPortD(priv->port_offset +
1530 MAC_REG_MAR0, 0xffffffff);
1531 VNSvOutPortD(priv->port_offset +
1532 MAC_REG_MAR0 + 4, 0xffffffff);
1534 MACvSelectPage0(priv->port_offset);
1536 MACvSelectPage1(priv->port_offset);
1538 VNSvOutPortD(priv->port_offset +
1539 MAC_REG_MAR0, (u32)multicast);
1540 VNSvOutPortD(priv->port_offset +
1542 (u32)(multicast >> 32));
1544 MACvSelectPage0(priv->port_offset);
1547 spin_unlock_irqrestore(&priv->lock, flags);
1549 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1551 rx_mode &= ~(RCR_MULTICAST | RCR_BROADCAST);
1555 if (changed_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)) {
1556 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1558 if (*total_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC))
1559 rx_mode &= ~RCR_BSSID;
1561 rx_mode |= RCR_BSSID;
1564 VNSvOutPortB(priv->port_offset + MAC_REG_RCR, rx_mode);
1566 dev_dbg(&priv->pcid->dev, "rx mode out= %x\n", rx_mode);
1569 static int vnt_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
1570 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
1571 struct ieee80211_key_conf *key)
1573 struct vnt_private *priv = hw->priv;
1577 if (vnt_set_keys(hw, sta, vif, key))
1581 if (test_bit(key->hw_key_idx, &priv->key_entry_inuse))
1582 clear_bit(key->hw_key_idx, &priv->key_entry_inuse);
1591 static int vnt_get_stats(struct ieee80211_hw *hw,
1592 struct ieee80211_low_level_stats *stats)
1594 struct vnt_private *priv = hw->priv;
1596 memcpy(stats, &priv->low_stats, sizeof(*stats));
1601 static u64 vnt_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1603 struct vnt_private *priv = hw->priv;
1606 CARDbGetCurrentTSF(priv, &tsf);
1611 static void vnt_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1614 struct vnt_private *priv = hw->priv;
1616 CARDvUpdateNextTBTT(priv, tsf, vif->bss_conf.beacon_int);
1619 static void vnt_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1621 struct vnt_private *priv = hw->priv;
1623 /* reset TSF counter */
1624 VNSvOutPortB(priv->port_offset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
1627 static const struct ieee80211_ops vnt_mac_ops = {
1631 .add_interface = vnt_add_interface,
1632 .remove_interface = vnt_remove_interface,
1633 .config = vnt_config,
1634 .bss_info_changed = vnt_bss_info_changed,
1635 .prepare_multicast = vnt_prepare_multicast,
1636 .configure_filter = vnt_configure,
1637 .set_key = vnt_set_key,
1638 .get_stats = vnt_get_stats,
1639 .get_tsf = vnt_get_tsf,
1640 .set_tsf = vnt_set_tsf,
1641 .reset_tsf = vnt_reset_tsf,
1644 static int vnt_init(struct vnt_private *priv)
1646 SET_IEEE80211_PERM_ADDR(priv->hw, priv->abyCurrentNetAddr);
1648 vnt_init_bands(priv);
1650 if (ieee80211_register_hw(priv->hw))
1653 priv->mac_hw = true;
1655 CARDbRadioPowerOff(priv);
1661 vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent)
1663 struct vnt_private *priv;
1664 struct ieee80211_hw *hw;
1665 struct wiphy *wiphy;
1668 dev_notice(&pcid->dev,
1669 "%s Ver. %s\n", DEVICE_FULL_DRV_NAM, DEVICE_VERSION);
1671 dev_notice(&pcid->dev,
1672 "Copyright (c) 2003 VIA Networking Technologies, Inc.\n");
1674 hw = ieee80211_alloc_hw(sizeof(*priv), &vnt_mac_ops);
1676 dev_err(&pcid->dev, "could not register ieee80211_hw\n");
1683 spin_lock_init(&priv->lock);
1687 SET_IEEE80211_DEV(priv->hw, &pcid->dev);
1689 if (pci_enable_device(pcid)) {
1690 device_free_info(priv);
1695 "Before get pci_info memaddr is %x\n", priv->memaddr);
1697 pci_set_master(pcid);
1699 priv->memaddr = pci_resource_start(pcid, 0);
1700 priv->ioaddr = pci_resource_start(pcid, 1);
1701 priv->port_offset = ioremap(priv->memaddr & PCI_BASE_ADDRESS_MEM_MASK,
1703 if (!priv->port_offset) {
1704 dev_err(&pcid->dev, ": Failed to IO remapping ..\n");
1705 device_free_info(priv);
1709 rc = pci_request_regions(pcid, DEVICE_NAME);
1711 dev_err(&pcid->dev, ": Failed to find PCI device\n");
1712 device_free_info(priv);
1716 if (dma_set_mask(&pcid->dev, DMA_BIT_MASK(32))) {
1717 dev_err(&pcid->dev, ": Failed to set dma 32 bit mask\n");
1718 device_free_info(priv);
1722 INIT_WORK(&priv->interrupt_work, vnt_interrupt_work);
1725 if (!MACbSoftwareReset(priv)) {
1726 dev_err(&pcid->dev, ": Failed to access MAC hardware..\n");
1727 device_free_info(priv);
1730 /* initial to reload eeprom */
1731 MACvInitialize(priv);
1732 MACvReadEtherAddress(priv->port_offset, priv->abyCurrentNetAddr);
1735 priv->byRFType = SROMbyReadEmbedded(priv->port_offset, EEP_OFS_RFTYPE);
1736 priv->byRFType &= RF_MASK;
1738 dev_dbg(&pcid->dev, "RF Type = %x\n", priv->byRFType);
1740 device_get_options(priv);
1741 device_set_options(priv);
1743 wiphy = priv->hw->wiphy;
1745 wiphy->frag_threshold = FRAG_THRESH_DEF;
1746 wiphy->rts_threshold = RTS_THRESH_DEF;
1747 wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1748 BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_AP);
1750 ieee80211_hw_set(priv->hw, TIMING_BEACON_ONLY);
1751 ieee80211_hw_set(priv->hw, SIGNAL_DBM);
1752 ieee80211_hw_set(priv->hw, RX_INCLUDES_FCS);
1753 ieee80211_hw_set(priv->hw, REPORTS_TX_ACK_STATUS);
1754 ieee80211_hw_set(priv->hw, SUPPORTS_PS);
1756 priv->hw->max_signal = 100;
1758 if (vnt_init(priv)) {
1759 device_free_info(priv);
1763 device_print_info(priv);
1764 pci_set_drvdata(pcid, priv);
1769 /*------------------------------------------------------------------*/
1771 static int __maybe_unused vt6655_suspend(struct device *dev_d)
1773 struct vnt_private *priv = dev_get_drvdata(dev_d);
1774 unsigned long flags;
1776 spin_lock_irqsave(&priv->lock, flags);
1780 spin_unlock_irqrestore(&priv->lock, flags);
1785 static int __maybe_unused vt6655_resume(struct device *dev_d)
1787 device_wakeup_disable(dev_d);
1792 MODULE_DEVICE_TABLE(pci, vt6655_pci_id_table);
1794 static SIMPLE_DEV_PM_OPS(vt6655_pm_ops, vt6655_suspend, vt6655_resume);
1796 static struct pci_driver device_driver = {
1797 .name = DEVICE_NAME,
1798 .id_table = vt6655_pci_id_table,
1799 .probe = vt6655_probe,
1800 .remove = vt6655_remove,
1801 .driver.pm = &vt6655_pm_ops,
1804 module_pci_driver(device_driver);