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[linux.git] / drivers / net / ipa / ipa_data-v4.11.c
1 // SPDX-License-Identifier: GPL-2.0
2
3 /* Copyright (C) 2021 Linaro Ltd. */
4
5 #include <linux/log2.h>
6
7 #include "gsi.h"
8 #include "ipa_data.h"
9 #include "ipa_endpoint.h"
10 #include "ipa_mem.h"
11
12 /** enum ipa_resource_type - IPA resource types for an SoC having IPA v4.11 */
13 enum ipa_resource_type {
14         /* Source resource types; first must have value 0 */
15         IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS              = 0,
16         IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
17         IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
18         IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
19         IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
20
21         /* Destination resource types; first must have value 0 */
22         IPA_RESOURCE_TYPE_DST_DATA_SECTORS              = 0,
23         IPA_RESOURCE_TYPE_DST_DPS_DMARS,
24 };
25
26 /* Resource groups used for an SoC having IPA v4.11 */
27 enum ipa_rsrc_group_id {
28         /* Source resource group identifiers */
29         IPA_RSRC_GROUP_SRC_UL_DL                        = 0,
30         IPA_RSRC_GROUP_SRC_UC_RX_Q,
31         IPA_RSRC_GROUP_SRC_UNUSED_2,
32         IPA_RSRC_GROUP_SRC_COUNT,       /* Last in set; not a source group */
33
34         /* Destination resource group identifiers */
35         IPA_RSRC_GROUP_DST_UL_DL_DPL                    = 0,
36         IPA_RSRC_GROUP_DST_UNUSED_1,
37         IPA_RSRC_GROUP_DST_DRB_IP,
38         IPA_RSRC_GROUP_DST_COUNT,       /* Last; not a destination group */
39 };
40
41 /* QSB configuration data for an SoC having IPA v4.11 */
42 static const struct ipa_qsb_data ipa_qsb_data[] = {
43         [IPA_QSB_MASTER_DDR] = {
44                 .max_writes             = 12,
45                 .max_reads              = 13,
46                 .max_reads_beats        = 120,
47         },
48 };
49
50 /* Endpoint configuration data for an SoC having IPA v4.11 */
51 static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
52         [IPA_ENDPOINT_AP_COMMAND_TX] = {
53                 .ee_id          = GSI_EE_AP,
54                 .channel_id     = 5,
55                 .endpoint_id    = 7,
56                 .toward_ipa     = true,
57                 .channel = {
58                         .tre_count      = 256,
59                         .event_count    = 256,
60                         .tlv_count      = 20,
61                 },
62                 .endpoint = {
63                         .config = {
64                                 .resource_group = IPA_RSRC_GROUP_SRC_UL_DL,
65                                 .dma_mode       = true,
66                                 .dma_endpoint   = IPA_ENDPOINT_AP_LAN_RX,
67                                 .tx = {
68                                         .seq_type = IPA_SEQ_DMA,
69                                 },
70                         },
71                 },
72         },
73         [IPA_ENDPOINT_AP_LAN_RX] = {
74                 .ee_id          = GSI_EE_AP,
75                 .channel_id     = 14,
76                 .endpoint_id    = 9,
77                 .toward_ipa     = false,
78                 .channel = {
79                         .tre_count      = 256,
80                         .event_count    = 256,
81                         .tlv_count      = 9,
82                 },
83                 .endpoint = {
84                         .config = {
85                                 .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL,
86                                 .aggregation    = true,
87                                 .status_enable  = true,
88                                 .rx = {
89                                         .pad_align      = ilog2(sizeof(u32)),
90                                 },
91                         },
92                 },
93         },
94         [IPA_ENDPOINT_AP_MODEM_TX] = {
95                 .ee_id          = GSI_EE_AP,
96                 .channel_id     = 2,
97                 .endpoint_id    = 2,
98                 .toward_ipa     = true,
99                 .channel = {
100                         .tre_count      = 512,
101                         .event_count    = 512,
102                         .tlv_count      = 16,
103                 },
104                 .endpoint = {
105                         .filter_support = true,
106                         .config = {
107                                 .resource_group = IPA_RSRC_GROUP_SRC_UL_DL,
108                                 .checksum       = true,
109                                 .qmap           = true,
110                                 .status_enable  = true,
111                                 .tx = {
112                                         .seq_type = IPA_SEQ_2_PASS_SKIP_LAST_UC,
113                                         .status_endpoint =
114                                                 IPA_ENDPOINT_MODEM_AP_RX,
115                                 },
116                         },
117                 },
118         },
119         [IPA_ENDPOINT_AP_MODEM_RX] = {
120                 .ee_id          = GSI_EE_AP,
121                 .channel_id     = 7,
122                 .endpoint_id    = 16,
123                 .toward_ipa     = false,
124                 .channel = {
125                         .tre_count      = 256,
126                         .event_count    = 256,
127                         .tlv_count      = 9,
128                 },
129                 .endpoint = {
130                         .config = {
131                                 .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL,
132                                 .checksum       = true,
133                                 .qmap           = true,
134                                 .aggregation    = true,
135                                 .rx = {
136                                         .aggr_close_eof = true,
137                                 },
138                         },
139                 },
140         },
141         [IPA_ENDPOINT_MODEM_AP_TX] = {
142                 .ee_id          = GSI_EE_MODEM,
143                 .channel_id     = 0,
144                 .endpoint_id    = 5,
145                 .toward_ipa     = true,
146                 .endpoint = {
147                         .filter_support = true,
148                 },
149         },
150         [IPA_ENDPOINT_MODEM_AP_RX] = {
151                 .ee_id          = GSI_EE_MODEM,
152                 .channel_id     = 7,
153                 .endpoint_id    = 14,
154                 .toward_ipa     = false,
155         },
156         [IPA_ENDPOINT_MODEM_DL_NLO_TX] = {
157                 .ee_id          = GSI_EE_MODEM,
158                 .channel_id     = 2,
159                 .endpoint_id    = 8,
160                 .toward_ipa     = true,
161                 .endpoint = {
162                         .filter_support = true,
163                 },
164         },
165 };
166
167 /* Source resource configuration data for an SoC having IPA v4.11 */
168 static const struct ipa_resource ipa_resource_src[] = {
169         [IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS] = {
170                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
171                         .min = 6,       .max = 6,
172                 },
173         },
174         [IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS] = {
175                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
176                         .min = 8,       .max = 8,
177                 },
178         },
179         [IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF] = {
180                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
181                         .min = 18,      .max = 18,
182                 },
183         },
184         [IPA_RESOURCE_TYPE_SRC_HPS_DMARS] = {
185                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
186                         .min = 2,       .max = 2,
187                 },
188         },
189         [IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES] = {
190                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
191                         .min = 15,      .max = 15,
192                 },
193         },
194 };
195
196 /* Destination resource configuration data for an SoC having IPA v4.11 */
197 static const struct ipa_resource ipa_resource_dst[] = {
198         [IPA_RESOURCE_TYPE_DST_DATA_SECTORS] = {
199                 .limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = {
200                         .min = 3,       .max = 3,
201                 },
202                 .limits[IPA_RSRC_GROUP_DST_DRB_IP] = {
203                         .min = 25,      .max = 25,
204                 },
205         },
206         [IPA_RESOURCE_TYPE_DST_DPS_DMARS] = {
207                 .limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = {
208                         .min = 2,       .max = 2,
209                 },
210         },
211 };
212
213 /* Resource configuration data for an SoC having IPA v4.11 */
214 static const struct ipa_resource_data ipa_resource_data = {
215         .rsrc_group_src_count   = IPA_RSRC_GROUP_SRC_COUNT,
216         .rsrc_group_dst_count   = IPA_RSRC_GROUP_DST_COUNT,
217         .resource_src_count     = ARRAY_SIZE(ipa_resource_src),
218         .resource_src           = ipa_resource_src,
219         .resource_dst_count     = ARRAY_SIZE(ipa_resource_dst),
220         .resource_dst           = ipa_resource_dst,
221 };
222
223 /* IPA-resident memory region data for an SoC having IPA v4.11 */
224 static const struct ipa_mem ipa_mem_local_data[] = {
225         {
226                 .id             = IPA_MEM_UC_SHARED,
227                 .offset         = 0x0000,
228                 .size           = 0x0080,
229                 .canary_count   = 0,
230         },
231         {
232                 .id             = IPA_MEM_UC_INFO,
233                 .offset         = 0x0080,
234                 .size           = 0x0200,
235                 .canary_count   = 0,
236         },
237         {
238                 .id             = IPA_MEM_V4_FILTER_HASHED,
239                 .offset         = 0x0288,
240                 .size           = 0x0078,
241                 .canary_count   = 2,
242         },
243         {
244                 .id             = IPA_MEM_V4_FILTER,
245                 .offset         = 0x0308,
246                 .size           = 0x0078,
247                 .canary_count   = 2,
248         },
249         {
250                 .id             = IPA_MEM_V6_FILTER_HASHED,
251                 .offset         = 0x0388,
252                 .size           = 0x0078,
253                 .canary_count   = 2,
254         },
255         {
256                 .id             = IPA_MEM_V6_FILTER,
257                 .offset         = 0x0408,
258                 .size           = 0x0078,
259                 .canary_count   = 2,
260         },
261         {
262                 .id             = IPA_MEM_V4_ROUTE_HASHED,
263                 .offset         = 0x0488,
264                 .size           = 0x0078,
265                 .canary_count   = 2,
266         },
267         {
268                 .id             = IPA_MEM_V4_ROUTE,
269                 .offset         = 0x0508,
270                 .size           = 0x0078,
271                 .canary_count   = 2,
272         },
273         {
274                 .id             = IPA_MEM_V6_ROUTE_HASHED,
275                 .offset         = 0x0588,
276                 .size           = 0x0078,
277                 .canary_count   = 2,
278         },
279         {
280                 .id             = IPA_MEM_V6_ROUTE,
281                 .offset         = 0x0608,
282                 .size           = 0x0078,
283                 .canary_count   = 2,
284         },
285         {
286                 .id             = IPA_MEM_MODEM_HEADER,
287                 .offset         = 0x0688,
288                 .size           = 0x0240,
289                 .canary_count   = 2,
290         },
291         {
292                 .id             = IPA_MEM_AP_HEADER,
293                 .offset         = 0x08c8,
294                 .size           = 0x0200,
295                 .canary_count   = 0,
296         },
297         {
298                 .id             = IPA_MEM_MODEM_PROC_CTX,
299                 .offset         = 0x0ad0,
300                 .size           = 0x0200,
301                 .canary_count   = 2,
302         },
303         {
304                 .id             = IPA_MEM_AP_PROC_CTX,
305                 .offset         = 0x0cd0,
306                 .size           = 0x0200,
307                 .canary_count   = 0,
308         },
309         {
310                 .id             = IPA_MEM_NAT_TABLE,
311                 .offset         = 0x0ee0,
312                 .size           = 0x0d00,
313                 .canary_count   = 4,
314         },
315         {
316                 .id             = IPA_MEM_PDN_CONFIG,
317                 .offset         = 0x1be8,
318                 .size           = 0x0050,
319                 .canary_count   = 0,
320         },
321         {
322                 .id             = IPA_MEM_STATS_QUOTA_MODEM,
323                 .offset         = 0x1c40,
324                 .size           = 0x0030,
325                 .canary_count   = 4,
326         },
327         {
328                 .id             = IPA_MEM_STATS_QUOTA_AP,
329                 .offset         = 0x1c70,
330                 .size           = 0x0048,
331                 .canary_count   = 0,
332         },
333         {
334                 .id             = IPA_MEM_STATS_TETHERING,
335                 .offset         = 0x1cb8,
336                 .size           = 0x0238,
337                 .canary_count   = 0,
338         },
339         {
340                 .id             = IPA_MEM_STATS_DROP,
341                 .offset         = 0x1ef0,
342                 .size           = 0x0020,
343                 .canary_count   = 0,
344         },
345         {
346                 .id             = IPA_MEM_MODEM,
347                 .offset         = 0x1f18,
348                 .size           = 0x100c,
349                 .canary_count   = 2,
350         },
351         {
352                 .id             = IPA_MEM_END_MARKER,
353                 .offset         = 0x3000,
354                 .size           = 0x0000,
355                 .canary_count   = 1,
356         },
357 };
358
359 /* Memory configuration data for an SoC having IPA v4.11 */
360 static const struct ipa_mem_data ipa_mem_data = {
361         .local_count    = ARRAY_SIZE(ipa_mem_local_data),
362         .local          = ipa_mem_local_data,
363         .imem_addr      = 0x146a8000,
364         .imem_size      = 0x00002000,
365         .smem_id        = 497,
366         .smem_size      = 0x00009000,
367 };
368
369 /* Interconnect rates are in 1000 byte/second units */
370 static const struct ipa_interconnect_data ipa_interconnect_data[] = {
371         {
372                 .name                   = "memory",
373                 .peak_bandwidth         = 600000,       /* 600 MBps */
374                 .average_bandwidth      = 150000,       /* 150 MBps */
375         },
376         /* Average rate is unused for the next interconnect */
377         {
378                 .name                   = "config",
379                 .peak_bandwidth         = 74000,        /* 74 MBps */
380                 .average_bandwidth      = 0,            /* unused */
381         },
382 };
383
384 /* Clock and interconnect configuration data for an SoC having IPA v4.11 */
385 static const struct ipa_power_data ipa_power_data = {
386         .core_clock_rate        = 60 * 1000 * 1000,     /* Hz */
387         .interconnect_count     = ARRAY_SIZE(ipa_interconnect_data),
388         .interconnect_data      = ipa_interconnect_data,
389 };
390
391 /* Configuration data for an SoC having IPA v4.11 */
392 const struct ipa_data ipa_data_v4_11 = {
393         .version        = IPA_VERSION_4_11,
394         .qsb_count      = ARRAY_SIZE(ipa_qsb_data),
395         .qsb_data       = ipa_qsb_data,
396         .endpoint_count = ARRAY_SIZE(ipa_gsi_endpoint_data),
397         .endpoint_data  = ipa_gsi_endpoint_data,
398         .resource_data  = &ipa_resource_data,
399         .mem_data       = &ipa_mem_data,
400         .power_data     = &ipa_power_data,
401 };
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