drivers/scsi/isci/core/scic_sds_controller.c

   1 /*
   2  * This file is provided under a dual BSD/GPLv2 license.  When using or
   3  * redistributing this file, you may do so under either license.
   4  *
   5  * GPL LICENSE SUMMARY
   6  *
   7  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of version 2 of the GNU General Public License as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  * General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  21  * The full GNU General Public License is included in this distribution
  22  * in the file called LICENSE.GPL.
  23  *
  24  * BSD LICENSE
  25  *
  26  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  27  * All rights reserved.
  28  *
  29  * Redistribution and use in source and binary forms, with or without
  30  * modification, are permitted provided that the following conditions
  31  * are met:
  32  *
  33  *   * Redistributions of source code must retain the above copyright
  34  *     notice, this list of conditions and the following disclaimer.
  35  *   * Redistributions in binary form must reproduce the above copyright
  36  *     notice, this list of conditions and the following disclaimer in
  37  *     the documentation and/or other materials provided with the
  38  *     distribution.
  39  *   * Neither the name of Intel Corporation nor the names of its
  40  *     contributors may be used to endorse or promote products derived
  41  *     from this software without specific prior written permission.
  42  *
  43  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  44  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  45  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  46  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  47  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  48  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  49  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  50  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  51  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  52  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  53  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  54  */
  55
  56 #include <linux/device.h>
  57 #include "scic_controller.h"
  58 #include "scic_phy.h"
  59 #include "scic_port.h"
  60 #include "scic_remote_device.h"
  61 #include "scic_sds_controller.h"
  62 #include "scic_sds_controller_registers.h"
  63 #include "scic_sds_pci.h"
  64 #include "scic_sds_phy.h"
  65 #include "scic_sds_port_configuration_agent.h"
  66 #include "scic_sds_port.h"
  67 #include "scic_sds_remote_device.h"
  68 #include "scic_sds_request.h"
  69 #include "sci_environment.h"
  70 #include "sci_util.h"
  71 #include "scu_completion_codes.h"
  72 #include "scu_constants.h"
  73 #include "scu_event_codes.h"
  74 #include "scu_remote_node_context.h"
  75 #include "scu_task_context.h"
  76 #include "scu_unsolicited_frame.h"
  77
  78 #define SCU_CONTEXT_RAM_INIT_STALL_TIME      200
  79
  80 /**
  81  * smu_dcc_get_max_ports() -
  82  *
  83  * This macro returns the maximum number of logical ports supported by the
  84  * hardware. The caller passes in the value read from the device context
  85  * capacity register and this macro will mash and shift the value appropriately.
  86  */
  87 #define smu_dcc_get_max_ports(dcc_value) \
  88         (\
  89                 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_MASK) \
  90                  >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_SHIFT) + 1 \
  91         )
  92
  93 /**
  94  * smu_dcc_get_max_task_context() -
  95  *
  96  * This macro returns the maximum number of task contexts supported by the
  97  * hardware. The caller passes in the value read from the device context
  98  * capacity register and this macro will mash and shift the value appropriately.
  99  */
 100 #define smu_dcc_get_max_task_context(dcc_value) \
 101         (\
 102                 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_MASK) \
 103                  >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_SHIFT) + 1 \
 104         )
 105
 106 /**
 107  * smu_dcc_get_max_remote_node_context() -
 108  *
 109  * This macro returns the maximum number of remote node contexts supported by
 110  * the hardware. The caller passes in the value read from the device context
 111  * capacity register and this macro will mash and shift the value appropriately.
 112  */
 113 #define smu_dcc_get_max_remote_node_context(dcc_value) \
 114         (\
 115                 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_MASK) \
 116                  >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_SHIFT) + 1 \
 117         )
 118
 119
 120 static void scic_sds_controller_power_control_timer_handler(
 121         void *controller);
 122 #define SCIC_SDS_CONTROLLER_MIN_TIMER_COUNT  3
 123 #define SCIC_SDS_CONTROLLER_MAX_TIMER_COUNT  3
 124
 125 /**
 126  *
 127  *
 128  * The number of milliseconds to wait for a phy to start.
 129  */
 130 #define SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT      100
 131
 132 /**
 133  *
 134  *
 135  * The number of milliseconds to wait while a given phy is consuming power
 136  * before allowing another set of phys to consume power. Ultimately, this will
 137  * be specified by OEM parameter.
 138  */
 139 #define SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL 500
 140
 141 /**
 142  * COMPLETION_QUEUE_CYCLE_BIT() -
 143  *
 144  * This macro will return the cycle bit of the completion queue entry
 145  */
 146 #define COMPLETION_QUEUE_CYCLE_BIT(x) ((x) & 0x80000000)
 147
 148 /**
 149  * NORMALIZE_GET_POINTER() -
 150  *
 151  * This macro will normalize the completion queue get pointer so its value can
 152  * be used as an index into an array
 153  */
 154 #define NORMALIZE_GET_POINTER(x) \
 155         ((x) & SMU_COMPLETION_QUEUE_GET_POINTER_MASK)
 156
 157 /**
 158  * NORMALIZE_PUT_POINTER() -
 159  *
 160  * This macro will normalize the completion queue put pointer so its value can
 161  * be used as an array inde
 162  */
 163 #define NORMALIZE_PUT_POINTER(x) \
 164         ((x) & SMU_COMPLETION_QUEUE_PUT_POINTER_MASK)
 165
 166
 167 /**
 168  * NORMALIZE_GET_POINTER_CYCLE_BIT() -
 169  *
 170  * This macro will normalize the completion queue cycle pointer so it matches
 171  * the completion queue cycle bit
 172  */
 173 #define NORMALIZE_GET_POINTER_CYCLE_BIT(x) \
 174         ((SMU_CQGR_CYCLE_BIT & (x)) << (31 - SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT))
 175
 176 /**
 177  * NORMALIZE_EVENT_POINTER() -
 178  *
 179  * This macro will normalize the completion queue event entry so its value can
 180  * be used as an index.
 181  */
 182 #define NORMALIZE_EVENT_POINTER(x) \
 183         (\
 184                 ((x) & SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_MASK) \
 185                 >> SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_SHIFT \
 186         )
 187
 188 /**
 189  * INCREMENT_COMPLETION_QUEUE_GET() -
 190  *
 191  * This macro will increment the controllers completion queue index value and
 192  * possibly toggle the cycle bit if the completion queue index wraps back to 0.
 193  */
 194 #define INCREMENT_COMPLETION_QUEUE_GET(controller, index, cycle) \
 195         INCREMENT_QUEUE_GET(\
 196                 (index), \
 197                 (cycle), \
 198                 (controller)->completion_queue_entries, \
 199                 SMU_CQGR_CYCLE_BIT \
 200                 )
 201
 202 /**
 203  * INCREMENT_EVENT_QUEUE_GET() -
 204  *
 205  * This macro will increment the controllers event queue index value and
 206  * possibly toggle the event cycle bit if the event queue index wraps back to 0.
 207  */
 208 #define INCREMENT_EVENT_QUEUE_GET(controller, index, cycle) \
 209         INCREMENT_QUEUE_GET(\
 210                 (index), \
 211                 (cycle), \
 212                 (controller)->completion_event_entries, \
 213                 SMU_CQGR_EVENT_CYCLE_BIT \
 214                 )
 215
 216 struct sci_base_memory_descriptor_list *
 217 sci_controller_get_memory_descriptor_list_handle(struct scic_sds_controller *scic)
 218 {
 219        return &scic->parent.mdl;
 220 }
 221
 222 /*
 223  * ****************************************************************************-
 224  * * SCIC SDS Controller Initialization Methods
 225  * ****************************************************************************- */
 226
 227 /**
 228  * This timer is used to start another phy after we have given up on the
 229  *    previous phy to transition to the ready state.
 230  *
 231  *
 232  */
 233 static void scic_sds_controller_phy_startup_timeout_handler(
 234         void *controller)
 235 {
 236         enum sci_status status;
 237         struct scic_sds_controller *this_controller;
 238
 239         this_controller = (struct scic_sds_controller *)controller;
 240
 241         this_controller->phy_startup_timer_pending = false;
 242
 243         status = SCI_FAILURE;
 244
 245         while (status != SCI_SUCCESS) {
 246                 status = scic_sds_controller_start_next_phy(this_controller);
 247         }
 248 }
 249
 250 /**
 251  *
 252  *
 253  * This method initializes the phy startup operations for controller start.
 254  */
 255 void scic_sds_controller_initialize_phy_startup(
 256         struct scic_sds_controller *this_controller)
 257 {
 258         this_controller->phy_startup_timer = isci_event_timer_create(
 259                 this_controller,
 260                 scic_sds_controller_phy_startup_timeout_handler,
 261                 this_controller
 262                 );
 263
 264         this_controller->next_phy_to_start = 0;
 265         this_controller->phy_startup_timer_pending = false;
 266 }
 267
 268 /**
 269  *
 270  *
 271  * This method initializes the power control operations for the controller
 272  * object.
 273  */
 274 void scic_sds_controller_initialize_power_control(
 275         struct scic_sds_controller *this_controller)
 276 {
 277         this_controller->power_control.timer = isci_event_timer_create(
 278                 this_controller,
 279                 scic_sds_controller_power_control_timer_handler,
 280                 this_controller
 281                 );
 282
 283         memset(
 284                 this_controller->power_control.requesters,
 285                 0,
 286                 sizeof(this_controller->power_control.requesters)
 287                 );
 288
 289         this_controller->power_control.phys_waiting = 0;
 290 }
 291
 292 /* --------------------------------------------------------------------------- */
 293
 294 #define SCU_REMOTE_NODE_CONTEXT_ALIGNMENT       (32)
 295 #define SCU_TASK_CONTEXT_ALIGNMENT              (256)
 296 #define SCU_UNSOLICITED_FRAME_ADDRESS_ALIGNMENT (64)
 297 #define SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT  (1024)
 298 #define SCU_UNSOLICITED_FRAME_HEADER_ALIGNMENT  (64)
 299
 300 /* --------------------------------------------------------------------------- */
 301
 302 /**
 303  * This method builds the memory descriptor table for this controller.
 304  * @this_controller: This parameter specifies the controller object for which
 305  *    to build the memory table.
 306  *
 307  */
 308 static void scic_sds_controller_build_memory_descriptor_table(
 309         struct scic_sds_controller *this_controller)
 310 {
 311         sci_base_mde_construct(
 312                 &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE],
 313                 SCU_COMPLETION_RAM_ALIGNMENT,
 314                 (sizeof(u32) * this_controller->completion_queue_entries),
 315                 (SCI_MDE_ATTRIBUTE_CACHEABLE | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS)
 316                 );
 317
 318         sci_base_mde_construct(
 319                 &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT],
 320                 SCU_REMOTE_NODE_CONTEXT_ALIGNMENT,
 321                 this_controller->remote_node_entries * sizeof(union scu_remote_node_context),
 322                 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
 323                 );
 324
 325         sci_base_mde_construct(
 326                 &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT],
 327                 SCU_TASK_CONTEXT_ALIGNMENT,
 328                 this_controller->task_context_entries * sizeof(struct scu_task_context),
 329                 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
 330                 );
 331
 332         /*
 333          * The UF buffer address table size must be programmed to a power
 334          * of 2.  Find the first power of 2 that is equal to or greater then
 335          * the number of unsolicited frame buffers to be utilized. */
 336         scic_sds_unsolicited_frame_control_set_address_table_count(
 337                 &this_controller->uf_control
 338                 );
 339
 340         sci_base_mde_construct(
 341                 &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER],
 342                 SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT,
 343                 scic_sds_unsolicited_frame_control_get_mde_size(this_controller->uf_control),
 344                 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
 345                 );
 346 }
 347
 348 /**
 349  * This method validates the driver supplied memory descriptor table.
 350  * @this_controller:
 351  *
 352  * enum sci_status
 353  */
 354 enum sci_status scic_sds_controller_validate_memory_descriptor_table(
 355         struct scic_sds_controller *this_controller)
 356 {
 357         bool mde_list_valid;
 358
 359         mde_list_valid = sci_base_mde_is_valid(
 360                 &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE],
 361                 SCU_COMPLETION_RAM_ALIGNMENT,
 362                 (sizeof(u32) * this_controller->completion_queue_entries),
 363                 (SCI_MDE_ATTRIBUTE_CACHEABLE | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS)
 364                 );
 365
 366         if (mde_list_valid == false)
 367                 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
 368
 369         mde_list_valid = sci_base_mde_is_valid(
 370                 &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT],
 371                 SCU_REMOTE_NODE_CONTEXT_ALIGNMENT,
 372                 this_controller->remote_node_entries * sizeof(union scu_remote_node_context),
 373                 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
 374                 );
 375
 376         if (mde_list_valid == false)
 377                 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
 378
 379         mde_list_valid = sci_base_mde_is_valid(
 380                 &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT],
 381                 SCU_TASK_CONTEXT_ALIGNMENT,
 382                 this_controller->task_context_entries * sizeof(struct scu_task_context),
 383                 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
 384                 );
 385
 386         if (mde_list_valid == false)
 387                 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
 388
 389         mde_list_valid = sci_base_mde_is_valid(
 390                 &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER],
 391                 SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT,
 392                 scic_sds_unsolicited_frame_control_get_mde_size(this_controller->uf_control),
 393                 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
 394                 );
 395
 396         if (mde_list_valid == false)
 397                 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
 398
 399         return SCI_SUCCESS;
 400 }
 401
 402 /**
 403  * This method initializes the controller with the physical memory addresses
 404  *    that are used to communicate with the driver.
 405  * @this_controller:
 406  *
 407  */
 408 void scic_sds_controller_ram_initialization(
 409         struct scic_sds_controller *this_controller)
 410 {
 411         struct sci_physical_memory_descriptor *mde;
 412
 413         /*
 414          * The completion queue is actually placed in cacheable memory
 415          * Therefore it no longer comes out of memory in the MDL. */
 416         mde = &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE];
 417         this_controller->completion_queue = (u32 *)mde->virtual_address;
 418         SMU_CQBAR_WRITE(this_controller, mde->physical_address);
 419
 420         /*
 421          * Program the location of the Remote Node Context table
 422          * into the SCU. */
 423         mde = &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT];
 424         this_controller->remote_node_context_table = (union scu_remote_node_context *)
 425                                                      mde->virtual_address;
 426         SMU_RNCBAR_WRITE(this_controller, mde->physical_address);
 427
 428         /* Program the location of the Task Context table into the SCU. */
 429         mde = &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT];
 430         this_controller->task_context_table = (struct scu_task_context *)
 431                                               mde->virtual_address;
 432         SMU_HTTBAR_WRITE(this_controller, mde->physical_address);
 433
 434         mde = &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER];
 435         scic_sds_unsolicited_frame_control_construct(
 436                 &this_controller->uf_control, mde, this_controller
 437                 );
 438
 439         /*
 440          * Inform the silicon as to the location of the UF headers and
 441          * address table. */
 442         SCU_UFHBAR_WRITE(
 443                 this_controller,
 444                 this_controller->uf_control.headers.physical_address);
 445         SCU_PUFATHAR_WRITE(
 446                 this_controller,
 447                 this_controller->uf_control.address_table.physical_address);
 448 }
 449
 450 /**
 451  * This method initializes the task context data for the controller.
 452  * @this_controller:
 453  *
 454  */
 455 void scic_sds_controller_assign_task_entries(
 456         struct scic_sds_controller *this_controller)
 457 {
 458         u32 task_assignment;
 459
 460         /*
 461          * Assign all the TCs to function 0
 462          * TODO: Do we actually need to read this register to write it back? */
 463         task_assignment = SMU_TCA_READ(this_controller, 0);
 464
 465         task_assignment =
 466                 (
 467                         task_assignment
 468                         | (SMU_TCA_GEN_VAL(STARTING, 0))
 469                         | (SMU_TCA_GEN_VAL(ENDING,  this_controller->task_context_entries - 1))
 470                         | (SMU_TCA_GEN_BIT(RANGE_CHECK_ENABLE))
 471                 );
 472
 473         SMU_TCA_WRITE(this_controller, 0, task_assignment);
 474 }
 475
 476 /**
 477  * This method initializes the hardware completion queue.
 478  *
 479  *
 480  */
 481 void scic_sds_controller_initialize_completion_queue(
 482         struct scic_sds_controller *this_controller)
 483 {
 484         u32 index;
 485         u32 completion_queue_control_value;
 486         u32 completion_queue_get_value;
 487         u32 completion_queue_put_value;
 488
 489         this_controller->completion_queue_get = 0;
 490
 491         completion_queue_control_value = (
 492                 SMU_CQC_QUEUE_LIMIT_SET(this_controller->completion_queue_entries - 1)
 493                 | SMU_CQC_EVENT_LIMIT_SET(this_controller->completion_event_entries - 1)
 494                 );
 495
 496         SMU_CQC_WRITE(this_controller, completion_queue_control_value);
 497
 498         /* Set the completion queue get pointer and enable the queue */
 499         completion_queue_get_value = (
 500                 (SMU_CQGR_GEN_VAL(POINTER, 0))
 501                 | (SMU_CQGR_GEN_VAL(EVENT_POINTER, 0))
 502                 | (SMU_CQGR_GEN_BIT(ENABLE))
 503                 | (SMU_CQGR_GEN_BIT(EVENT_ENABLE))
 504                 );
 505
 506         SMU_CQGR_WRITE(this_controller, completion_queue_get_value);
 507
 508         /* Set the completion queue put pointer */
 509         completion_queue_put_value = (
 510                 (SMU_CQPR_GEN_VAL(POINTER, 0))
 511                 | (SMU_CQPR_GEN_VAL(EVENT_POINTER, 0))
 512                 );
 513
 514         SMU_CQPR_WRITE(this_controller, completion_queue_put_value);
 515
 516         /* Initialize the cycle bit of the completion queue entries */
 517         for (index = 0; index < this_controller->completion_queue_entries; index++) {
 518                 /*
 519                  * If get.cycle_bit != completion_queue.cycle_bit
 520                  * its not a valid completion queue entry
 521                  * so at system start all entries are invalid */
 522                 this_controller->completion_queue[index] = 0x80000000;
 523         }
 524 }
 525
 526 /**
 527  * This method initializes the hardware unsolicited frame queue.
 528  *
 529  *
 530  */
 531 void scic_sds_controller_initialize_unsolicited_frame_queue(
 532         struct scic_sds_controller *this_controller)
 533 {
 534         u32 frame_queue_control_value;
 535         u32 frame_queue_get_value;
 536         u32 frame_queue_put_value;
 537
 538         /* Write the queue size */
 539         frame_queue_control_value =
 540                 SCU_UFQC_GEN_VAL(QUEUE_SIZE, this_controller->uf_control.address_table.count);
 541
 542         SCU_UFQC_WRITE(this_controller, frame_queue_control_value);
 543
 544         /* Setup the get pointer for the unsolicited frame queue */
 545         frame_queue_get_value = (
 546                 SCU_UFQGP_GEN_VAL(POINTER, 0)
 547                 |  SCU_UFQGP_GEN_BIT(ENABLE_BIT)
 548                 );
 549
 550         SCU_UFQGP_WRITE(this_controller, frame_queue_get_value);
 551
 552         /* Setup the put pointer for the unsolicited frame queue */
 553         frame_queue_put_value = SCU_UFQPP_GEN_VAL(POINTER, 0);
 554
 555         SCU_UFQPP_WRITE(this_controller, frame_queue_put_value);
 556 }
 557
 558 /**
 559  * This method enables the hardware port task scheduler.
 560  *
 561  *
 562  */
 563 void scic_sds_controller_enable_port_task_scheduler(
 564         struct scic_sds_controller *this_controller)
 565 {
 566         u32 port_task_scheduler_value;
 567
 568         port_task_scheduler_value = SCU_PTSGCR_READ(this_controller);
 569
 570         port_task_scheduler_value |=
 571                 (SCU_PTSGCR_GEN_BIT(ETM_ENABLE) | SCU_PTSGCR_GEN_BIT(PTSG_ENABLE));
 572
 573         SCU_PTSGCR_WRITE(this_controller, port_task_scheduler_value);
 574 }
 575
 576 /* --------------------------------------------------------------------------- */
 577
 578 /**
 579  *
 580  *
 581  * This macro is used to delay between writes to the AFE registers during AFE
 582  * initialization.
 583  */
 584 #define AFE_REGISTER_WRITE_DELAY 10
 585
 586 /* Initialize the AFE for this phy index. We need to read the AFE setup from
 587  * the OEM parameters none
 588  */
 589 void scic_sds_controller_afe_initialization(struct scic_sds_controller *scic)
 590 {
 591         u32 afe_status;
 592         u32 phy_id;
 593
 594         /* Clear DFX Status registers */
 595         scu_afe_register_write(scic, afe_dfx_master_control0, 0x0081000f);
 596         udelay(AFE_REGISTER_WRITE_DELAY);
 597
 598         /* Configure bias currents to normal */
 599         if (is_a0())
 600                 scu_afe_register_write(scic, afe_bias_control, 0x00005500);
 601         else
 602                 scu_afe_register_write(scic, afe_bias_control, 0x00005A00);
 603
 604         udelay(AFE_REGISTER_WRITE_DELAY);
 605
 606         /* Enable PLL */
 607         if (is_b0())
 608                 scu_afe_register_write(scic, afe_pll_control0, 0x80040A08);
 609         else
 610                 scu_afe_register_write(scic, afe_pll_control0, 0x80040908);
 611
 612         udelay(AFE_REGISTER_WRITE_DELAY);
 613
 614         /* Wait for the PLL to lock */
 615         do {
 616                 afe_status = scu_afe_register_read(
 617                         scic, afe_common_block_status);
 618                 udelay(AFE_REGISTER_WRITE_DELAY);
 619         } while ((afe_status & 0x00001000) == 0);
 620
 621         if (is_b0()) {
 622                 /* Shorten SAS SNW lock time (RxLock timer value from 76 us to 50 us) */
 623                 scu_afe_register_write(scic, afe_pmsn_master_control0, 0x7bcc96ad);
 624                 udelay(AFE_REGISTER_WRITE_DELAY);
 625         }
 626
 627         for (phy_id = 0; phy_id < SCI_MAX_PHYS; phy_id++) {
 628                 if (is_b0()) {
 629                          /* Configure transmitter SSC parameters */
 630                         scu_afe_txreg_write(scic, phy_id, afe_tx_ssc_control, 0x00030000);
 631                         udelay(AFE_REGISTER_WRITE_DELAY);
 632                 } else {
 633                         /*
 634                          * All defaults, except the Receive Word Alignament/Comma Detect
 635                          * Enable....(0xe800) */
 636                         scu_afe_txreg_write(scic, phy_id, afe_xcvr_control0, 0x00004512);
 637                         udelay(AFE_REGISTER_WRITE_DELAY);
 638
 639                         scu_afe_txreg_write(scic, phy_id, afe_xcvr_control1, 0x0050100F);
 640                         udelay(AFE_REGISTER_WRITE_DELAY);
 641                 }
 642
 643                 /*
 644                  * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
 645                  * & increase TX int & ext bias 20%....(0xe85c) */
 646                 if (is_a0())
 647                         scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003D4);
 648                 else if (is_a2())
 649                         scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003F0);
 650                 else {
 651                          /* Power down TX and RX (PWRDNTX and PWRDNRX) */
 652                         scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003d7);
 653                         udelay(AFE_REGISTER_WRITE_DELAY);
 654
 655                         /*
 656                          * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
 657                          * & increase TX int & ext bias 20%....(0xe85c) */
 658                         scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003d4);
 659                 }
 660                 udelay(AFE_REGISTER_WRITE_DELAY);
 661
 662                 if (is_a0() || is_a2()) {
 663                         /* Enable TX equalization (0xe824) */
 664                         scu_afe_txreg_write(scic, phy_id, afe_tx_control, 0x00040000);
 665                         udelay(AFE_REGISTER_WRITE_DELAY);
 666                 }
 667
 668                 /*
 669                  * RDPI=0x0(RX Power On), RXOOBDETPDNC=0x0, TPD=0x0(TX Power On),
 670                  * RDD=0x0(RX Detect Enabled) ....(0xe800) */
 671                 scu_afe_txreg_write(scic, phy_id, afe_xcvr_control0, 0x00004100);
 672                 udelay(AFE_REGISTER_WRITE_DELAY);
 673
 674                 /* Leave DFE/FFE on */
 675                 if (is_a0())
 676                         scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F09983F);
 677                 else if (is_a2())
 678                         scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F11103F);
 679                 else {
 680                         scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F11103F);
 681                         udelay(AFE_REGISTER_WRITE_DELAY);
 682                         /* Enable TX equalization (0xe824) */
 683                         scu_afe_txreg_write(scic, phy_id, afe_tx_control, 0x00040000);
 684                 }
 685                 udelay(AFE_REGISTER_WRITE_DELAY);
 686
 687                 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, 0x000E7C03);
 688                 udelay(AFE_REGISTER_WRITE_DELAY);
 689
 690                 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control1, 0x000E7C03);
 691                 udelay(AFE_REGISTER_WRITE_DELAY);
 692
 693                 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control2, 0x000E7C03);
 694                 udelay(AFE_REGISTER_WRITE_DELAY);
 695
 696                 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control3, 0x000E7C03);
 697                 udelay(AFE_REGISTER_WRITE_DELAY);
 698         }
 699
 700         /* Transfer control to the PEs */
 701         scu_afe_register_write(scic, afe_dfx_master_control0, 0x00010f00);
 702         udelay(AFE_REGISTER_WRITE_DELAY);
 703 }
 704
 705 /*
 706  * ****************************************************************************-
 707  * * SCIC SDS Controller Internal Start/Stop Routines
 708  * ****************************************************************************- */
 709
 710
 711 /**
 712  * This method will attempt to transition into the ready state for the
 713  *    controller and indicate that the controller start operation has completed
 714  *    if all criteria are met.
 715  * @this_controller: This parameter indicates the controller object for which
 716  *    to transition to ready.
 717  * @status: This parameter indicates the status value to be pass into the call
 718  *    to scic_cb_controller_start_complete().
 719  *
 720  * none.
 721  */
 722 static void scic_sds_controller_transition_to_ready(
 723         struct scic_sds_controller *this_controller,
 724         enum sci_status status)
 725 {
 726         if (this_controller->parent.state_machine.current_state_id
 727             == SCI_BASE_CONTROLLER_STATE_STARTING) {
 728                 /*
 729                  * We move into the ready state, because some of the phys/ports
 730                  * may be up and operational. */
 731                 sci_base_state_machine_change_state(
 732                         scic_sds_controller_get_base_state_machine(this_controller),
 733                         SCI_BASE_CONTROLLER_STATE_READY
 734                         );
 735
 736                 isci_event_controller_start_complete(this_controller, status);
 737         }
 738 }
 739
 740 /**
 741  * This method is the general timeout handler for the controller. It will take
 742  *    the correct timetout action based on the current controller state
 743  */
 744 void scic_sds_controller_timeout_handler(
 745         struct scic_sds_controller *scic)
 746 {
 747         enum sci_base_controller_states current_state;
 748
 749         current_state = sci_base_state_machine_get_state(
 750                 scic_sds_controller_get_base_state_machine(scic));
 751
 752         if (current_state == SCI_BASE_CONTROLLER_STATE_STARTING) {
 753                 scic_sds_controller_transition_to_ready(
 754                         scic, SCI_FAILURE_TIMEOUT);
 755         } else if (current_state == SCI_BASE_CONTROLLER_STATE_STOPPING) {
 756                 sci_base_state_machine_change_state(
 757                         scic_sds_controller_get_base_state_machine(scic),
 758                         SCI_BASE_CONTROLLER_STATE_FAILED);
 759                 isci_event_controller_stop_complete(scic, SCI_FAILURE_TIMEOUT);
 760         } else  /* / @todo Now what do we want to do in this case? */
 761                 dev_err(scic_to_dev(scic),
 762                         "%s: Controller timer fired when controller was not "
 763                         "in a state being timed.\n",
 764                         __func__);
 765 }
 766
 767 /**
 768  * scic_sds_controller_get_port_configuration_mode
 769  * @this_controller: This is the controller to use to determine if we are using
 770  *    manual or automatic port configuration.
 771  *
 772  * SCIC_PORT_CONFIGURATION_MODE
 773  */
 774 enum SCIC_PORT_CONFIGURATION_MODE scic_sds_controller_get_port_configuration_mode(
 775         struct scic_sds_controller *this_controller)
 776 {
 777         u32 index;
 778         enum SCIC_PORT_CONFIGURATION_MODE mode;
 779
 780         mode = SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE;
 781
 782         for (index = 0; index < SCI_MAX_PORTS; index++) {
 783                 if (this_controller->oem_parameters.sds1.ports[index].phy_mask != 0) {
 784                         mode = SCIC_PORT_MANUAL_CONFIGURATION_MODE;
 785                         break;
 786                 }
 787         }
 788
 789         return mode;
 790 }
 791
 792 enum sci_status scic_sds_controller_stop_ports(struct scic_sds_controller *scic)
 793 {
 794         u32 index;
 795         enum sci_status port_status;
 796         enum sci_status status = SCI_SUCCESS;
 797
 798         for (index = 0; index < scic->logical_port_entries; index++) {
 799                 struct scic_sds_port *sci_port = &scic->port_table[index];
 800                 SCI_BASE_PORT_HANDLER_T stop;
 801
 802                 stop = sci_port->state_handlers->parent.stop_handler;
 803                 port_status = stop(&sci_port->parent);
 804
 805                 if ((port_status != SCI_SUCCESS) &&
 806                     (port_status != SCI_FAILURE_INVALID_STATE)) {
 807                         status = SCI_FAILURE;
 808
 809                         dev_warn(scic_to_dev(scic),
 810                                  "%s: Controller stop operation failed to "
 811                                  "stop port %d because of status %d.\n",
 812                                  __func__,
 813                                  sci_port->logical_port_index,
 814                                  port_status);
 815                 }
 816         }
 817
 818         return status;
 819 }
 820
 821 /**
 822  *
 823  *
 824  *
 825  */
 826 static void scic_sds_controller_phy_timer_start(
 827         struct scic_sds_controller *this_controller)
 828 {
 829         isci_event_timer_start(
 830                 this_controller,
 831                 this_controller->phy_startup_timer,
 832                 SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
 833                 );
 834
 835         this_controller->phy_startup_timer_pending = true;
 836 }
 837
 838 /**
 839  *
 840  *
 841  *
 842  */
 843 void scic_sds_controller_phy_timer_stop(
 844         struct scic_sds_controller *this_controller)
 845 {
 846         isci_event_timer_stop(
 847                 this_controller,
 848                 this_controller->phy_startup_timer
 849                 );
 850
 851         this_controller->phy_startup_timer_pending = false;
 852 }
 853
 854 /**
 855  * This method is called internally by the controller object to start the next
 856  *    phy on the controller.  If all the phys have been starte, then this
 857  *    method will attempt to transition the controller to the READY state and
 858  *    inform the user (scic_cb_controller_start_complete()).
 859  * @this_controller: This parameter specifies the controller object for which
 860  *    to start the next phy.
 861  *
 862  * enum sci_status
 863  */
 864 enum sci_status scic_sds_controller_start_next_phy(
 865         struct scic_sds_controller *this_controller)
 866 {
 867         enum sci_status status;
 868
 869         status = SCI_SUCCESS;
 870
 871         if (this_controller->phy_startup_timer_pending == false) {
 872                 if (this_controller->next_phy_to_start == SCI_MAX_PHYS) {
 873                         bool is_controller_start_complete = true;
 874                         struct scic_sds_phy *the_phy;
 875                         u8 index;
 876
 877                         for (index = 0; index < SCI_MAX_PHYS; index++) {
 878                                 the_phy = &this_controller->phy_table[index];
 879
 880                                 if (scic_sds_phy_get_port(the_phy) != NULL) {
 881                                         /**
 882                                          * The controller start operation is complete if and only
 883                                          * if:
 884                                          * - all links have been given an opportunity to start
 885                                          * - have no indication of a connected device
 886                                          * - have an indication of a connected device and it has
 887                                          *   finished the link training process.
 888                                          */
 889                                         if (
 890                                                 (
 891                                                         (the_phy->is_in_link_training == false)
 892                                                         && (the_phy->parent.state_machine.current_state_id
 893                                                             == SCI_BASE_PHY_STATE_INITIAL)
 894                                                 )
 895                                                 || (
 896                                                         (the_phy->is_in_link_training == false)
 897                                                         && (the_phy->parent.state_machine.current_state_id
 898                                                             == SCI_BASE_PHY_STATE_STOPPED)
 899                                                         )
 900                                                 || (
 901                                                         (the_phy->is_in_link_training == true)
 902                                                         && (the_phy->parent.state_machine.current_state_id
 903                                                             == SCI_BASE_PHY_STATE_STARTING)
 904                                                         )
 905                                                 ) {
 906                                                 is_controller_start_complete = false;
 907                                                 break;
 908                                         }
 909                                 }
 910                         }
 911
 912                         /*
 913                          * The controller has successfully finished the start process.
 914                          * Inform the SCI Core user and transition to the READY state. */
 915                         if (is_controller_start_complete == true) {
 916                                 scic_sds_controller_transition_to_ready(
 917                                         this_controller, SCI_SUCCESS
 918                                         );
 919                                 scic_sds_controller_phy_timer_stop(this_controller);
 920                         }
 921                 } else {
 922                         struct scic_sds_phy *the_phy;
 923
 924                         the_phy = &this_controller->phy_table[this_controller->next_phy_to_start];
 925
 926                         if (
 927                                 scic_sds_controller_get_port_configuration_mode(this_controller)
 928                                 == SCIC_PORT_MANUAL_CONFIGURATION_MODE
 929                                 ) {
 930                                 if (scic_sds_phy_get_port(the_phy) == NULL) {
 931                                         this_controller->next_phy_to_start++;
 932
 933                                         /*
 934                                          * Caution recursion ahead be forwarned
 935                                          *
 936                                          * The PHY was never added to a PORT in MPC mode so start the next phy in sequence
 937                                          * This phy will never go link up and will not draw power the OEM parameters either
 938                                          * configured the phy incorrectly for the PORT or it was never assigned to a PORT */
 939                                         return scic_sds_controller_start_next_phy(this_controller);
 940                                 }
 941                         }
 942
 943                         status = scic_sds_phy_start(the_phy);
 944
 945                         if (status == SCI_SUCCESS) {
 946                                 scic_sds_controller_phy_timer_start(this_controller);
 947                         } else {
 948                                 dev_warn(scic_to_dev(this_controller),
 949                                          "%s: Controller stop operation failed "
 950                                          "to stop phy %d because of status "
 951                                          "%d.\n",
 952                                          __func__,
 953                                          this_controller->phy_table[this_controller->next_phy_to_start].phy_index,
 954                                          status);
 955                         }
 956
 957                         this_controller->next_phy_to_start++;
 958                 }
 959         }
 960
 961         return status;
 962 }
 963
 964 /**
 965  *
 966  * @this_controller:
 967  *
 968  * enum sci_status
 969  */
 970 enum sci_status scic_sds_controller_stop_phys(
 971         struct scic_sds_controller *this_controller)
 972 {
 973         u32 index;
 974         enum sci_status status;
 975         enum sci_status phy_status;
 976
 977         status = SCI_SUCCESS;
 978
 979         for (index = 0; index < SCI_MAX_PHYS; index++) {
 980                 phy_status = scic_sds_phy_stop(&this_controller->phy_table[index]);
 981
 982                 if (
 983                         (phy_status != SCI_SUCCESS)
 984                         && (phy_status != SCI_FAILURE_INVALID_STATE)
 985                         ) {
 986                         status = SCI_FAILURE;
 987
 988                         dev_warn(scic_to_dev(this_controller),
 989                                  "%s: Controller stop operation failed to stop "
 990                                  "phy %d because of status %d.\n",
 991                                  __func__,
 992                                  this_controller->phy_table[index].phy_index, phy_status);
 993                 }
 994         }
 995
 996         return status;
 997 }
 998
 999 /**
1000  *
1001  * @this_controller:
1002  *
1003  * enum sci_status
1004  */
1005 enum sci_status scic_sds_controller_stop_devices(
1006         struct scic_sds_controller *this_controller)
1007 {
1008         u32 index;
1009         enum sci_status status;
1010         enum sci_status device_status;
1011
1012         status = SCI_SUCCESS;
1013
1014         for (index = 0; index < this_controller->remote_node_entries; index++) {
1015                 if (this_controller->device_table[index] != NULL) {
1016                         /* / @todo What timeout value do we want to provide to this request? */
1017                         device_status = scic_remote_device_stop(this_controller->device_table[index], 0);
1018
1019                         if ((device_status != SCI_SUCCESS) &&
1020                             (device_status != SCI_FAILURE_INVALID_STATE)) {
1021                                 dev_warn(scic_to_dev(this_controller),
1022                                          "%s: Controller stop operation failed "
1023                                          "to stop device 0x%p because of "
1024                                          "status %d.\n",
1025                                          __func__,
1026                                          this_controller->device_table[index], device_status);
1027                         }
1028                 }
1029         }
1030
1031         return status;
1032 }
1033
1034 /*
1035  * ****************************************************************************-
1036  * * SCIC SDS Controller Power Control (Staggered Spinup)
1037  * ****************************************************************************- */
1038
1039 /**
1040  *
1041  *
1042  * This method starts the power control timer for this controller object.
1043  */
1044 static void scic_sds_controller_power_control_timer_start(
1045         struct scic_sds_controller *this_controller)
1046 {
1047         isci_event_timer_start(
1048                 this_controller, this_controller->power_control.timer,
1049                 SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL
1050                 );
1051
1052         this_controller->power_control.timer_started = true;
1053 }
1054
1055 /**
1056  *
1057  *
1058  *
1059  */
1060 static void scic_sds_controller_power_control_timer_handler(
1061         void *controller)
1062 {
1063         struct scic_sds_controller *this_controller;
1064
1065         this_controller = (struct scic_sds_controller *)controller;
1066
1067         if (this_controller->power_control.phys_waiting == 0) {
1068                 this_controller->power_control.timer_started = false;
1069         } else {
1070                 struct scic_sds_phy *the_phy = NULL;
1071                 u8 i;
1072
1073                 for (i = 0;
1074                      (i < SCI_MAX_PHYS)
1075                      && (this_controller->power_control.phys_waiting != 0);
1076                      i++) {
1077                         if (this_controller->power_control.requesters[i] != NULL) {
1078                                 the_phy = this_controller->power_control.requesters[i];
1079                                 this_controller->power_control.requesters[i] = NULL;
1080                                 this_controller->power_control.phys_waiting--;
1081                                 break;
1082                         }
1083                 }
1084
1085                 /*
1086                  * It doesn't matter if the power list is empty, we need to start the
1087                  * timer in case another phy becomes ready. */
1088                 scic_sds_controller_power_control_timer_start(this_controller);
1089
1090                 scic_sds_phy_consume_power_handler(the_phy);
1091         }
1092 }
1093
1094 /**
1095  * This method inserts the phy in the stagger spinup control queue.
1096  * @this_controller:
1097  *
1098  *
1099  */
1100 void scic_sds_controller_power_control_queue_insert(
1101         struct scic_sds_controller *this_controller,
1102         struct scic_sds_phy *the_phy)
1103 {
1104         BUG_ON(the_phy == NULL);
1105
1106         if (
1107                 (this_controller->power_control.timer_started)
1108                 && (this_controller->power_control.requesters[the_phy->phy_index] == NULL)
1109                 ) {
1110                 this_controller->power_control.requesters[the_phy->phy_index] = the_phy;
1111                 this_controller->power_control.phys_waiting++;
1112         } else {
1113                 scic_sds_controller_power_control_timer_start(this_controller);
1114                 scic_sds_phy_consume_power_handler(the_phy);
1115         }
1116 }
1117
1118 /**
1119  * This method removes the phy from the stagger spinup control queue.
1120  * @this_controller:
1121  *
1122  *
1123  */
1124 void scic_sds_controller_power_control_queue_remove(
1125         struct scic_sds_controller *this_controller,
1126         struct scic_sds_phy *the_phy)
1127 {
1128         BUG_ON(the_phy == NULL);
1129
1130         if (this_controller->power_control.requesters[the_phy->phy_index] != NULL) {
1131                 this_controller->power_control.phys_waiting--;
1132         }
1133
1134         this_controller->power_control.requesters[the_phy->phy_index] = NULL;
1135 }
1136
1137 /*
1138  * ****************************************************************************-
1139  * * SCIC SDS Controller Completion Routines
1140  * ****************************************************************************- */
1141
1142 /**
1143  * This method returns a true value if the completion queue has entries that
1144  *    can be processed
1145  * @this_controller:
1146  *
1147  * bool true if the completion queue has entries to process false if the
1148  * completion queue has no entries to process
1149  */
1150 static bool scic_sds_controller_completion_queue_has_entries(
1151         struct scic_sds_controller *this_controller)
1152 {
1153         u32 get_value = this_controller->completion_queue_get;
1154         u32 get_index = get_value & SMU_COMPLETION_QUEUE_GET_POINTER_MASK;
1155
1156         if (
1157                 NORMALIZE_GET_POINTER_CYCLE_BIT(get_value)
1158                 == COMPLETION_QUEUE_CYCLE_BIT(this_controller->completion_queue[get_index])
1159                 ) {
1160                 return true;
1161         }
1162
1163         return false;
1164 }
1165
1166 /* --------------------------------------------------------------------------- */
1167
1168 /**
1169  * This method processes a task completion notification.  This is called from
1170  *    within the controller completion handler.
1171  * @this_controller:
1172  * @completion_entry:
1173  *
1174  */
1175 static void scic_sds_controller_task_completion(
1176         struct scic_sds_controller *this_controller,
1177         u32 completion_entry)
1178 {
1179         u32 index;
1180         struct scic_sds_request *io_request;
1181
1182         index = SCU_GET_COMPLETION_INDEX(completion_entry);
1183         io_request = this_controller->io_request_table[index];
1184
1185         /* Make sure that we really want to process this IO request */
1186         if (
1187                 (io_request != NULL)
1188                 && (io_request->io_tag != SCI_CONTROLLER_INVALID_IO_TAG)
1189                 && (
1190                         scic_sds_io_tag_get_sequence(io_request->io_tag)
1191                         == this_controller->io_request_sequence[index]
1192                         )
1193                 ) {
1194                 /* Yep this is a valid io request pass it along to the io request handler */
1195                 scic_sds_io_request_tc_completion(io_request, completion_entry);
1196         }
1197 }
1198
1199 /**
1200  * This method processes an SDMA completion event.  This is called from within
1201  *    the controller completion handler.
1202  * @this_controller:
1203  * @completion_entry:
1204  *
1205  */
1206 static void scic_sds_controller_sdma_completion(
1207         struct scic_sds_controller *this_controller,
1208         u32 completion_entry)
1209 {
1210         u32 index;
1211         struct scic_sds_request *io_request;
1212         struct scic_sds_remote_device *device;
1213
1214         index = SCU_GET_COMPLETION_INDEX(completion_entry);
1215
1216         switch (scu_get_command_request_type(completion_entry)) {
1217         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC:
1218         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_TC:
1219                 io_request = this_controller->io_request_table[index];
1220                 dev_warn(scic_to_dev(this_controller),
1221                          "%s: SCIC SDS Completion type SDMA %x for io request "
1222                          "%p\n",
1223                          __func__,
1224                          completion_entry,
1225                          io_request);
1226                 /* @todo For a post TC operation we need to fail the IO
1227                  * request
1228                  */
1229                 break;
1230
1231         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_RNC:
1232         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC:
1233         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_RNC:
1234                 device = this_controller->device_table[index];
1235                 dev_warn(scic_to_dev(this_controller),
1236                          "%s: SCIC SDS Completion type SDMA %x for remote "
1237                          "device %p\n",
1238                          __func__,
1239                          completion_entry,
1240                          device);
1241                 /* @todo For a port RNC operation we need to fail the
1242                  * device
1243                  */
1244                 break;
1245
1246         default:
1247                 dev_warn(scic_to_dev(this_controller),
1248                          "%s: SCIC SDS Completion unknown SDMA completion "
1249                          "type %x\n",
1250                          __func__,
1251                          completion_entry);
1252                 break;
1253
1254         }
1255 }
1256
1257 /**
1258  *
1259  * @this_controller:
1260  * @completion_entry:
1261  *
1262  * This method processes an unsolicited frame message.  This is called from
1263  * within the controller completion handler. none
1264  */
1265 static void scic_sds_controller_unsolicited_frame(
1266         struct scic_sds_controller *this_controller,
1267         u32 completion_entry)
1268 {
1269         u32 index;
1270         u32 frame_index;
1271
1272         struct scu_unsolicited_frame_header *frame_header;
1273         struct scic_sds_phy *phy;
1274         struct scic_sds_remote_device *device;
1275
1276         enum sci_status result = SCI_FAILURE;
1277
1278         frame_index = SCU_GET_FRAME_INDEX(completion_entry);
1279
1280         frame_header
1281                 = this_controller->uf_control.buffers.array[frame_index].header;
1282         this_controller->uf_control.buffers.array[frame_index].state
1283                 = UNSOLICITED_FRAME_IN_USE;
1284
1285         if (SCU_GET_FRAME_ERROR(completion_entry)) {
1286                 /*
1287                  * / @todo If the IAF frame or SIGNATURE FIS frame has an error will
1288                  * /       this cause a problem? We expect the phy initialization will
1289                  * /       fail if there is an error in the frame. */
1290                 scic_sds_controller_release_frame(this_controller, frame_index);
1291                 return;
1292         }
1293
1294         if (frame_header->is_address_frame) {
1295                 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1296                 phy = &this_controller->phy_table[index];
1297                 if (phy != NULL) {
1298                         result = scic_sds_phy_frame_handler(phy, frame_index);
1299                 }
1300         } else {
1301
1302                 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1303
1304                 if (index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
1305                         /*
1306                          * This is a signature fis or a frame from a direct attached SATA
1307                          * device that has not yet been created.  In either case forwared
1308                          * the frame to the PE and let it take care of the frame data. */
1309                         index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1310                         phy = &this_controller->phy_table[index];
1311                         result = scic_sds_phy_frame_handler(phy, frame_index);
1312                 } else {
1313                         if (index < this_controller->remote_node_entries)
1314                                 device = this_controller->device_table[index];
1315                         else
1316                                 device = NULL;
1317
1318                         if (device != NULL)
1319                                 result = scic_sds_remote_device_frame_handler(device, frame_index);
1320                         else
1321                                 scic_sds_controller_release_frame(this_controller, frame_index);
1322                 }
1323         }
1324
1325         if (result != SCI_SUCCESS) {
1326                 /*
1327                  * / @todo Is there any reason to report some additional error message
1328                  * /       when we get this failure notifiction? */
1329         }
1330 }
1331
1332 /**
1333  * This method processes an event completion entry.  This is called from within
1334  *    the controller completion handler.
1335  * @this_controller:
1336  * @completion_entry:
1337  *
1338  */
1339 static void scic_sds_controller_event_completion(
1340         struct scic_sds_controller *this_controller,
1341         u32 completion_entry)
1342 {
1343         u32 index;
1344         struct scic_sds_request *io_request;
1345         struct scic_sds_remote_device *device;
1346         struct scic_sds_phy *phy;
1347
1348         index = SCU_GET_COMPLETION_INDEX(completion_entry);
1349
1350         switch (scu_get_event_type(completion_entry)) {
1351         case SCU_EVENT_TYPE_SMU_COMMAND_ERROR:
1352                 /* / @todo The driver did something wrong and we need to fix the condtion. */
1353                 dev_err(scic_to_dev(this_controller),
1354                         "%s: SCIC Controller 0x%p received SMU command error "
1355                         "0x%x\n",
1356                         __func__,
1357                         this_controller,
1358                         completion_entry);
1359                 break;
1360
1361         case SCU_EVENT_TYPE_SMU_PCQ_ERROR:
1362         case SCU_EVENT_TYPE_SMU_ERROR:
1363         case SCU_EVENT_TYPE_FATAL_MEMORY_ERROR:
1364                 /*
1365                  * / @todo This is a hardware failure and its likely that we want to
1366                  * /       reset the controller. */
1367                 dev_err(scic_to_dev(this_controller),
1368                         "%s: SCIC Controller 0x%p received fatal controller "
1369                         "event  0x%x\n",
1370                         __func__,
1371                         this_controller,
1372                         completion_entry);
1373                 break;
1374
1375         case SCU_EVENT_TYPE_TRANSPORT_ERROR:
1376                 io_request = this_controller->io_request_table[index];
1377                 scic_sds_io_request_event_handler(io_request, completion_entry);
1378                 break;
1379
1380         case SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT:
1381                 switch (scu_get_event_specifier(completion_entry)) {
1382                 case SCU_EVENT_SPECIFIC_SMP_RESPONSE_NO_PE:
1383                 case SCU_EVENT_SPECIFIC_TASK_TIMEOUT:
1384                         io_request = this_controller->io_request_table[index];
1385                         if (io_request != NULL)
1386                                 scic_sds_io_request_event_handler(io_request, completion_entry);
1387                         else
1388                                 dev_warn(scic_to_dev(this_controller),
1389                                          "%s: SCIC Controller 0x%p received "
1390                                          "event 0x%x for io request object "
1391                                          "that doesnt exist.\n",
1392                                          __func__,
1393                                          this_controller,
1394                                          completion_entry);
1395
1396                         break;
1397
1398                 case SCU_EVENT_SPECIFIC_IT_NEXUS_TIMEOUT:
1399                         device = this_controller->device_table[index];
1400                         if (device != NULL)
1401                                 scic_sds_remote_device_event_handler(device, completion_entry);
1402                         else
1403                                 dev_warn(scic_to_dev(this_controller),
1404                                          "%s: SCIC Controller 0x%p received "
1405                                          "event 0x%x for remote device object "
1406                                          "that doesnt exist.\n",
1407                                          __func__,
1408                                          this_controller,
1409                                          completion_entry);
1410
1411                         break;
1412                 }
1413                 break;
1414
1415         case SCU_EVENT_TYPE_BROADCAST_CHANGE:
1416         /*
1417          * direct the broadcast change event to the phy first and then let
1418          * the phy redirect the broadcast change to the port object */
1419         case SCU_EVENT_TYPE_ERR_CNT_EVENT:
1420         /*
1421          * direct error counter event to the phy object since that is where
1422          * we get the event notification.  This is a type 4 event. */
1423         case SCU_EVENT_TYPE_OSSP_EVENT:
1424                 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1425                 phy = &this_controller->phy_table[index];
1426                 scic_sds_phy_event_handler(phy, completion_entry);
1427                 break;
1428
1429         case SCU_EVENT_TYPE_RNC_SUSPEND_TX:
1430         case SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX:
1431         case SCU_EVENT_TYPE_RNC_OPS_MISC:
1432                 if (index < this_controller->remote_node_entries) {
1433                         device = this_controller->device_table[index];
1434
1435                         if (device != NULL)
1436                                 scic_sds_remote_device_event_handler(device, completion_entry);
1437                 } else
1438                         dev_err(scic_to_dev(this_controller),
1439                                 "%s: SCIC Controller 0x%p received event 0x%x "
1440                                 "for remote device object 0x%0x that doesnt "
1441                                 "exist.\n",
1442                                 __func__,
1443                                 this_controller,
1444                                 completion_entry,
1445                                 index);
1446
1447                 break;
1448
1449         default:
1450                 dev_warn(scic_to_dev(this_controller),
1451                          "%s: SCIC Controller received unknown event code %x\n",
1452                          __func__,
1453                          completion_entry);
1454                 break;
1455         }
1456 }
1457
1458 /**
1459  * This method is a private routine for processing the completion queue entries.
1460  * @this_controller:
1461  *
1462  */
1463 static void scic_sds_controller_process_completions(
1464         struct scic_sds_controller *this_controller)
1465 {
1466         u32 completion_count = 0;
1467         u32 completion_entry;
1468         u32 get_index;
1469         u32 get_cycle;
1470         u32 event_index;
1471         u32 event_cycle;
1472
1473         dev_dbg(scic_to_dev(this_controller),
1474                 "%s: completion queue begining get:0x%08x\n",
1475                 __func__,
1476                 this_controller->completion_queue_get);
1477
1478         /* Get the component parts of the completion queue */
1479         get_index = NORMALIZE_GET_POINTER(this_controller->completion_queue_get);
1480         get_cycle = SMU_CQGR_CYCLE_BIT & this_controller->completion_queue_get;
1481
1482         event_index = NORMALIZE_EVENT_POINTER(this_controller->completion_queue_get);
1483         event_cycle = SMU_CQGR_EVENT_CYCLE_BIT & this_controller->completion_queue_get;
1484
1485         while (
1486                 NORMALIZE_GET_POINTER_CYCLE_BIT(get_cycle)
1487                 == COMPLETION_QUEUE_CYCLE_BIT(this_controller->completion_queue[get_index])
1488                 ) {
1489                 completion_count++;
1490
1491                 completion_entry = this_controller->completion_queue[get_index];
1492                 INCREMENT_COMPLETION_QUEUE_GET(this_controller, get_index, get_cycle);
1493
1494                 dev_dbg(scic_to_dev(this_controller),
1495                         "%s: completion queue entry:0x%08x\n",
1496                         __func__,
1497                         completion_entry);
1498
1499                 switch (SCU_GET_COMPLETION_TYPE(completion_entry)) {
1500                 case SCU_COMPLETION_TYPE_TASK:
1501                         scic_sds_controller_task_completion(this_controller, completion_entry);
1502                         break;
1503
1504                 case SCU_COMPLETION_TYPE_SDMA:
1505                         scic_sds_controller_sdma_completion(this_controller, completion_entry);
1506                         break;
1507
1508                 case SCU_COMPLETION_TYPE_UFI:
1509                         scic_sds_controller_unsolicited_frame(this_controller, completion_entry);
1510                         break;
1511
1512                 case SCU_COMPLETION_TYPE_EVENT:
1513                         INCREMENT_EVENT_QUEUE_GET(this_controller, event_index, event_cycle);
1514                         scic_sds_controller_event_completion(this_controller, completion_entry);
1515                         break;
1516
1517                 case SCU_COMPLETION_TYPE_NOTIFY:
1518                         /*
1519                          * Presently we do the same thing with a notify event that we do with the
1520                          * other event codes. */
1521                         INCREMENT_EVENT_QUEUE_GET(this_controller, event_index, event_cycle);
1522                         scic_sds_controller_event_completion(this_controller, completion_entry);
1523                         break;
1524
1525                 default:
1526                         dev_warn(scic_to_dev(this_controller),
1527                                  "%s: SCIC Controller received unknown "
1528                                  "completion type %x\n",
1529                                  __func__,
1530                                  completion_entry);
1531                         break;
1532                 }
1533         }
1534
1535         /* Update the get register if we completed one or more entries */
1536         if (completion_count > 0) {
1537                 this_controller->completion_queue_get =
1538                         SMU_CQGR_GEN_BIT(ENABLE)
1539                         | SMU_CQGR_GEN_BIT(EVENT_ENABLE)
1540                         | event_cycle | SMU_CQGR_GEN_VAL(EVENT_POINTER, event_index)
1541                         | get_cycle   | SMU_CQGR_GEN_VAL(POINTER, get_index);
1542
1543                 SMU_CQGR_WRITE(this_controller,
1544                                this_controller->completion_queue_get);
1545         }
1546
1547         dev_dbg(scic_to_dev(this_controller),
1548                 "%s: completion queue ending get:0x%08x\n",
1549                 __func__,
1550                 this_controller->completion_queue_get);
1551
1552 }
1553
1554 bool scic_sds_controller_isr(struct scic_sds_controller *scic)
1555 {
1556         if (scic_sds_controller_completion_queue_has_entries(scic)) {
1557                 return true;
1558         } else {
1559                 /*
1560                  * we have a spurious interrupt it could be that we have already
1561                  * emptied the completion queue from a previous interrupt */
1562                 SMU_ISR_WRITE(scic, SMU_ISR_COMPLETION);
1563
1564                 /*
1565                  * There is a race in the hardware that could cause us not to be notified
1566                  * of an interrupt completion if we do not take this step.  We will mask
1567                  * then unmask the interrupts so if there is another interrupt pending
1568                  * the clearing of the interrupt source we get the next interrupt message. */
1569                 SMU_IMR_WRITE(scic, 0xFF000000);
1570                 SMU_IMR_WRITE(scic, 0x00000000);
1571         }
1572
1573         return false;
1574 }
1575
1576 void scic_sds_controller_completion_handler(struct scic_sds_controller *scic)
1577 {
1578         /* Empty out the completion queue */
1579         if (scic_sds_controller_completion_queue_has_entries(scic))
1580                 scic_sds_controller_process_completions(scic);
1581
1582         /* Clear the interrupt and enable all interrupts again */
1583         SMU_ISR_WRITE(scic, SMU_ISR_COMPLETION);
1584         /* Could we write the value of SMU_ISR_COMPLETION? */
1585         SMU_IMR_WRITE(scic, 0xFF000000);
1586         SMU_IMR_WRITE(scic, 0x00000000);
1587 }
1588
1589 bool scic_sds_controller_error_isr(struct scic_sds_controller *scic)
1590 {
1591         u32 interrupt_status;
1592
1593         interrupt_status = SMU_ISR_READ(scic);
1594
1595         interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
1596
1597         if (interrupt_status != 0) {
1598                 /*
1599                  * There is an error interrupt pending so let it through and handle
1600                  * in the callback */
1601                 return true;
1602         }
1603
1604         /*
1605          * There is a race in the hardware that could cause us not to be notified
1606          * of an interrupt completion if we do not take this step.  We will mask
1607          * then unmask the error interrupts so if there was another interrupt
1608          * pending we will be notified.
1609          * Could we write the value of (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND)? */
1610         SMU_IMR_WRITE(scic, 0x000000FF);
1611         SMU_IMR_WRITE(scic, 0x00000000);
1612
1613         return false;
1614 }
1615
1616 void scic_sds_controller_error_handler(struct scic_sds_controller *scic)
1617 {
1618         u32 interrupt_status;
1619
1620         interrupt_status = SMU_ISR_READ(scic);
1621
1622         if ((interrupt_status & SMU_ISR_QUEUE_SUSPEND) &&
1623             scic_sds_controller_completion_queue_has_entries(scic)) {
1624
1625                 scic_sds_controller_process_completions(scic);
1626                 SMU_ISR_WRITE(scic, SMU_ISR_QUEUE_SUSPEND);
1627
1628         } else {
1629                 dev_err(scic_to_dev(scic), "%s: status: %#x\n", __func__,
1630                         interrupt_status);
1631
1632                 sci_base_state_machine_change_state(
1633                         scic_sds_controller_get_base_state_machine(scic),
1634                         SCI_BASE_CONTROLLER_STATE_FAILED);
1635
1636                 return;
1637         }
1638
1639         /*
1640          * If we dont process any completions I am not sure that we want to do this.
1641          * We are in the middle of a hardware fault and should probably be reset. */
1642         SMU_IMR_WRITE(scic, 0x00000000);
1643 }
1644
1645
1646 u32 scic_sds_controller_get_object_size(void)
1647 {
1648         return sizeof(struct scic_sds_controller);
1649 }
1650
1651
1652 void scic_sds_controller_link_up(
1653         struct scic_sds_controller *scic,
1654         struct scic_sds_port *sci_port,
1655         struct scic_sds_phy *sci_phy)
1656 {
1657         scic_sds_controller_phy_handler_t link_up;
1658         u32 state;
1659
1660         state = scic->parent.state_machine.current_state_id;
1661         link_up = scic_sds_controller_state_handler_table[state].link_up;
1662
1663         if (link_up)
1664                 link_up(scic, sci_port, sci_phy);
1665         else
1666                 dev_warn(scic_to_dev(scic),
1667                         "%s: SCIC Controller linkup event from phy %d in "
1668                         "unexpected state %d\n",
1669                         __func__,
1670                         sci_phy->phy_index,
1671                         sci_base_state_machine_get_state(
1672                                 scic_sds_controller_get_base_state_machine(
1673                                         scic)));
1674 }
1675
1676
1677 void scic_sds_controller_link_down(
1678         struct scic_sds_controller *scic,
1679         struct scic_sds_port *sci_port,
1680         struct scic_sds_phy *sci_phy)
1681 {
1682         u32 state;
1683         scic_sds_controller_phy_handler_t link_down;
1684
1685         state = scic->parent.state_machine.current_state_id;
1686         link_down = scic_sds_controller_state_handler_table[state].link_down;
1687
1688         if (link_down)
1689                 link_down(scic, sci_port, sci_phy);
1690         else
1691                 dev_warn(scic_to_dev(scic),
1692                         "%s: SCIC Controller linkdown event from phy %d in "
1693                         "unexpected state %d\n",
1694                         __func__,
1695                         sci_phy->phy_index,
1696                         sci_base_state_machine_get_state(
1697                                 scic_sds_controller_get_base_state_machine(
1698                                         scic)));
1699 }
1700
1701 /**
1702  * This method will write to the SCU PCP register the request value. The method
1703  *    is used to suspend/resume ports, devices, and phys.
1704  * @this_controller:
1705  *
1706  *
1707  */
1708 void scic_sds_controller_post_request(
1709         struct scic_sds_controller *this_controller,
1710         u32 request)
1711 {
1712         dev_dbg(scic_to_dev(this_controller),
1713                 "%s: SCIC Controller 0x%p post request 0x%08x\n",
1714                 __func__,
1715                 this_controller,
1716                 request);
1717
1718         SMU_PCP_WRITE(this_controller, request);
1719 }
1720
1721 /**
1722  * This method will copy the soft copy of the task context into the physical
1723  *    memory accessible by the controller.
1724  * @this_controller: This parameter specifies the controller for which to copy
1725  *    the task context.
1726  * @this_request: This parameter specifies the request for which the task
1727  *    context is being copied.
1728  *
1729  * After this call is made the SCIC_SDS_IO_REQUEST object will always point to
1730  * the physical memory version of the task context. Thus, all subsequent
1731  * updates to the task context are performed in the TC table (i.e. DMAable
1732  * memory). none
1733  */
1734 void scic_sds_controller_copy_task_context(
1735         struct scic_sds_controller *this_controller,
1736         struct scic_sds_request *this_request)
1737 {
1738         struct scu_task_context *task_context_buffer;
1739
1740         task_context_buffer = scic_sds_controller_get_task_context_buffer(
1741                 this_controller, this_request->io_tag
1742                 );
1743
1744         memcpy(
1745                 task_context_buffer,
1746                 this_request->task_context_buffer,
1747                 SCI_FIELD_OFFSET(struct scu_task_context, sgl_snapshot_ac)
1748                 );
1749
1750         /*
1751          * Now that the soft copy of the TC has been copied into the TC
1752          * table accessible by the silicon.  Thus, any further changes to
1753          * the TC (e.g. TC termination) occur in the appropriate location. */
1754         this_request->task_context_buffer = task_context_buffer;
1755 }
1756
1757 /**
1758  * This method returns the task context buffer for the given io tag.
1759  * @this_controller:
1760  * @io_tag:
1761  *
1762  * struct scu_task_context*
1763  */
1764 struct scu_task_context *scic_sds_controller_get_task_context_buffer(
1765         struct scic_sds_controller *this_controller,
1766         u16 io_tag
1767         ) {
1768         u16 task_index = scic_sds_io_tag_get_index(io_tag);
1769
1770         if (task_index < this_controller->task_context_entries) {
1771                 return &this_controller->task_context_table[task_index];
1772         }
1773
1774         return NULL;
1775 }
1776
1777 /**
1778  * This method returnst the sequence value from the io tag value
1779  * @this_controller:
1780  * @io_tag:
1781  *
1782  * u16
1783  */
1784
1785 /**
1786  * This method returns the IO request associated with the tag value
1787  * @this_controller:
1788  * @io_tag:
1789  *
1790  * SCIC_SDS_IO_REQUEST_T* NULL if there is no valid IO request at the tag value
1791  */
1792 struct scic_sds_request *scic_sds_controller_get_io_request_from_tag(
1793         struct scic_sds_controller *this_controller,
1794         u16 io_tag
1795         ) {
1796         u16 task_index;
1797         u16 task_sequence;
1798
1799         task_index = scic_sds_io_tag_get_index(io_tag);
1800
1801         if (task_index  < this_controller->task_context_entries) {
1802                 if (this_controller->io_request_table[task_index] != NULL) {
1803                         task_sequence = scic_sds_io_tag_get_sequence(io_tag);
1804
1805                         if (task_sequence == this_controller->io_request_sequence[task_index]) {
1806                                 return this_controller->io_request_table[task_index];
1807                         }
1808                 }
1809         }
1810
1811         return NULL;
1812 }
1813
1814 /**
1815  * This method allocates remote node index and the reserves the remote node
1816  *    context space for use. This method can fail if there are no more remote
1817  *    node index available.
1818  * @this_controller: This is the controller object which contains the set of
1819  *    free remote node ids
1820  * @the_devce: This is the device object which is requesting the a remote node
1821  *    id
1822  * @node_id: This is the remote node id that is assinged to the device if one
1823  *    is available
1824  *
1825  * enum sci_status SCI_FAILURE_OUT_OF_RESOURCES if there are no available remote
1826  * node index available.
1827  */
1828 enum sci_status scic_sds_controller_allocate_remote_node_context(
1829         struct scic_sds_controller *this_controller,
1830         struct scic_sds_remote_device *the_device,
1831         u16 *node_id)
1832 {
1833         u16 node_index;
1834         u32 remote_node_count = scic_sds_remote_device_node_count(the_device);
1835
1836         node_index = scic_sds_remote_node_table_allocate_remote_node(
1837                 &this_controller->available_remote_nodes, remote_node_count
1838                 );
1839
1840         if (node_index != SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
1841                 this_controller->device_table[node_index] = the_device;
1842
1843                 *node_id = node_index;
1844
1845                 return SCI_SUCCESS;
1846         }
1847
1848         return SCI_FAILURE_INSUFFICIENT_RESOURCES;
1849 }
1850
1851 /**
1852  * This method frees the remote node index back to the available pool.  Once
1853  *    this is done the remote node context buffer is no longer valid and can
1854  *    not be used.
1855  * @this_controller:
1856  * @the_device:
1857  * @node_id:
1858  *
1859  */
1860 void scic_sds_controller_free_remote_node_context(
1861         struct scic_sds_controller *this_controller,
1862         struct scic_sds_remote_device *the_device,
1863         u16 node_id)
1864 {
1865         u32 remote_node_count = scic_sds_remote_device_node_count(the_device);
1866
1867         if (this_controller->device_table[node_id] == the_device) {
1868                 this_controller->device_table[node_id] = NULL;
1869
1870                 scic_sds_remote_node_table_release_remote_node_index(
1871                         &this_controller->available_remote_nodes, remote_node_count, node_id
1872                         );
1873         }
1874 }
1875
1876 /**
1877  * This method returns the union scu_remote_node_context for the specified remote
1878  *    node id.
1879  * @this_controller:
1880  * @node_id:
1881  *
1882  * union scu_remote_node_context*
1883  */
1884 union scu_remote_node_context *scic_sds_controller_get_remote_node_context_buffer(
1885         struct scic_sds_controller *this_controller,
1886         u16 node_id
1887         ) {
1888         if (
1889                 (node_id < this_controller->remote_node_entries)
1890                 && (this_controller->device_table[node_id] != NULL)
1891                 ) {
1892                 return &this_controller->remote_node_context_table[node_id];
1893         }
1894
1895         return NULL;
1896 }
1897
1898 /**
1899  *
1900  * @resposne_buffer: This is the buffer into which the D2H register FIS will be
1901  *    constructed.
1902  * @frame_header: This is the frame header returned by the hardware.
1903  * @frame_buffer: This is the frame buffer returned by the hardware.
1904  *
1905  * This method will combind the frame header and frame buffer to create a SATA
1906  * D2H register FIS none
1907  */
1908 void scic_sds_controller_copy_sata_response(
1909         void *response_buffer,
1910         void *frame_header,
1911         void *frame_buffer)
1912 {
1913         memcpy(
1914                 response_buffer,
1915                 frame_header,
1916                 sizeof(u32)
1917                 );
1918
1919         memcpy(
1920                 (char *)((char *)response_buffer + sizeof(u32)),
1921                 frame_buffer,
1922                 sizeof(struct sata_fis_reg_d2h) - sizeof(u32)
1923                 );
1924 }
1925
1926 /**
1927  * This method releases the frame once this is done the frame is available for
1928  *    re-use by the hardware.  The data contained in the frame header and frame
1929  *    buffer is no longer valid. The UF queue get pointer is only updated if UF
1930  *    control indicates this is appropriate.
1931  * @this_controller:
1932  * @frame_index:
1933  *
1934  */
1935 void scic_sds_controller_release_frame(
1936         struct scic_sds_controller *this_controller,
1937         u32 frame_index)
1938 {
1939         if (scic_sds_unsolicited_frame_control_release_frame(
1940                     &this_controller->uf_control, frame_index) == true)
1941                 SCU_UFQGP_WRITE(this_controller, this_controller->uf_control.get);
1942 }
1943
1944 /**
1945  * This method sets user parameters and OEM parameters to default values.
1946  *    Users can override these values utilizing the scic_user_parameters_set()
1947  *    and scic_oem_parameters_set() methods.
1948  * @controller: This parameter specifies the controller for which to set the
1949  *    configuration parameters to their default values.
1950  *
1951  */
1952 static void scic_sds_controller_set_default_config_parameters(struct scic_sds_controller *scic)
1953 {
1954         u16 index;
1955
1956         /* Default to no SSC operation. */
1957         scic->oem_parameters.sds1.controller.do_enable_ssc = false;
1958
1959         /* Initialize all of the port parameter information to narrow ports. */
1960         for (index = 0; index < SCI_MAX_PORTS; index++) {
1961                 scic->oem_parameters.sds1.ports[index].phy_mask = 0;
1962         }
1963
1964         /* Initialize all of the phy parameter information. */
1965         for (index = 0; index < SCI_MAX_PHYS; index++) {
1966                 /*
1967                  * Default to 3G (i.e. Gen 2) for now.  User can override if
1968                  * they choose. */
1969                 scic->user_parameters.sds1.phys[index].max_speed_generation = 2;
1970
1971                 /* the frequencies cannot be 0 */
1972                 scic->user_parameters.sds1.phys[index].align_insertion_frequency = 0x7f;
1973                 scic->user_parameters.sds1.phys[index].in_connection_align_insertion_frequency = 0xff;
1974                 scic->user_parameters.sds1.phys[index].notify_enable_spin_up_insertion_frequency = 0x33;
1975
1976                 /*
1977                  * Previous Vitesse based expanders had a arbitration issue that
1978                  * is worked around by having the upper 32-bits of SAS address
1979                  * with a value greater then the Vitesse company identifier.
1980                  * Hence, usage of 0x5FCFFFFF. */
1981                 scic->oem_parameters.sds1.phys[index].sas_address.low = 0x00000001;
1982                 scic->oem_parameters.sds1.phys[index].sas_address.high = 0x5FCFFFFF;
1983         }
1984
1985         scic->user_parameters.sds1.stp_inactivity_timeout = 5;
1986         scic->user_parameters.sds1.ssp_inactivity_timeout = 5;
1987         scic->user_parameters.sds1.stp_max_occupancy_timeout = 5;
1988         scic->user_parameters.sds1.ssp_max_occupancy_timeout = 20;
1989         scic->user_parameters.sds1.no_outbound_task_timeout = 20;
1990 }
1991
1992
1993 enum sci_status scic_controller_construct(struct scic_sds_controller *controller,
1994                                           void __iomem *scu_base,
1995                                           void __iomem *smu_base)
1996 {
1997         u8 index;
1998
1999         sci_base_controller_construct(
2000                 &controller->parent,
2001                 scic_sds_controller_state_table,
2002                 controller->memory_descriptors,
2003                 ARRAY_SIZE(controller->memory_descriptors),
2004                 NULL
2005                 );
2006
2007         controller->scu_registers = scu_base;
2008         controller->smu_registers = smu_base;
2009
2010         scic_sds_port_configuration_agent_construct(&controller->port_agent);
2011
2012         /* Construct the ports for this controller */
2013         for (index = 0; index < SCI_MAX_PORTS; index++)
2014                 scic_sds_port_construct(&controller->port_table[index],
2015                                         index, controller);
2016         scic_sds_port_construct(&controller->port_table[index],
2017                                 SCIC_SDS_DUMMY_PORT, controller);
2018
2019         /* Construct the phys for this controller */
2020         for (index = 0; index < SCI_MAX_PHYS; index++) {
2021                 /* Add all the PHYs to the dummy port */
2022                 scic_sds_phy_construct(
2023                         &controller->phy_table[index],
2024                         &controller->port_table[SCI_MAX_PORTS],
2025                         index
2026                         );
2027         }
2028
2029         controller->invalid_phy_mask = 0;
2030
2031         /* Set the default maximum values */
2032         controller->completion_event_entries      = SCU_EVENT_COUNT;
2033         controller->completion_queue_entries      = SCU_COMPLETION_QUEUE_COUNT;
2034         controller->remote_node_entries           = SCI_MAX_REMOTE_DEVICES;
2035         controller->logical_port_entries          = SCI_MAX_PORTS;
2036         controller->task_context_entries          = SCU_IO_REQUEST_COUNT;
2037         controller->uf_control.buffers.count      = SCU_UNSOLICITED_FRAME_COUNT;
2038         controller->uf_control.address_table.count = SCU_UNSOLICITED_FRAME_COUNT;
2039
2040         /* Initialize the User and OEM parameters to default values. */
2041         scic_sds_controller_set_default_config_parameters(controller);
2042
2043         return SCI_SUCCESS;
2044 }
2045
2046 /* --------------------------------------------------------------------------- */
2047
2048 enum sci_status scic_controller_initialize(
2049         struct scic_sds_controller *scic)
2050 {
2051         enum sci_status status = SCI_FAILURE_INVALID_STATE;
2052         sci_base_controller_handler_t initialize;
2053         u32 state;
2054
2055         state = scic->parent.state_machine.current_state_id;
2056         initialize = scic_sds_controller_state_handler_table[state].base.initialize;
2057
2058         if (initialize)
2059                 status = initialize(&scic->parent);
2060         else
2061                 dev_warn(scic_to_dev(scic),
2062                          "%s: SCIC Controller initialize operation requested "
2063                          "in invalid state %d\n",
2064                          __func__,
2065                          sci_base_state_machine_get_state(
2066                                  scic_sds_controller_get_base_state_machine(
2067                                          scic)));
2068
2069         return status;
2070 }
2071
2072 /* --------------------------------------------------------------------------- */
2073
2074 u32 scic_controller_get_suggested_start_timeout(
2075         struct scic_sds_controller *sc)
2076 {
2077         /* Validate the user supplied parameters. */
2078         if (sc == NULL)
2079                 return 0;
2080
2081         /*
2082          * The suggested minimum timeout value for a controller start operation:
2083          *
2084          *     Signature FIS Timeout
2085          *   + Phy Start Timeout
2086          *   + Number of Phy Spin Up Intervals
2087          *   ---------------------------------
2088          *   Number of milliseconds for the controller start operation.
2089          *
2090          * NOTE: The number of phy spin up intervals will be equivalent
2091          *       to the number of phys divided by the number phys allowed
2092          *       per interval - 1 (once OEM parameters are supported).
2093          *       Currently we assume only 1 phy per interval. */
2094
2095         return SCIC_SDS_SIGNATURE_FIS_TIMEOUT
2096                 + SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
2097                 + ((SCI_MAX_PHYS - 1) * SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL);
2098 }
2099
2100 /* --------------------------------------------------------------------------- */
2101
2102 enum sci_status scic_controller_start(
2103         struct scic_sds_controller *scic,
2104         u32 timeout)
2105 {
2106         enum sci_status status = SCI_FAILURE_INVALID_STATE;
2107         sci_base_controller_timed_handler_t start;
2108         u32 state;
2109
2110         state = scic->parent.state_machine.current_state_id;
2111         start = scic_sds_controller_state_handler_table[state].base.start;
2112
2113         if (start)
2114                 status = start(&scic->parent, timeout);
2115         else
2116                 dev_warn(scic_to_dev(scic),
2117                          "%s: SCIC Controller start operation requested in "
2118                          "invalid state %d\n",
2119                          __func__,
2120                          sci_base_state_machine_get_state(
2121                                  scic_sds_controller_get_base_state_machine(
2122                                          scic)));
2123
2124         return status;
2125 }
2126
2127 /* --------------------------------------------------------------------------- */
2128
2129 enum sci_status scic_controller_stop(
2130         struct scic_sds_controller *scic,
2131         u32 timeout)
2132 {
2133         enum sci_status status = SCI_FAILURE_INVALID_STATE;
2134         sci_base_controller_timed_handler_t stop;
2135         u32 state;
2136
2137         state = scic->parent.state_machine.current_state_id;
2138         stop = scic_sds_controller_state_handler_table[state].base.stop;
2139
2140         if (stop)
2141                 status = stop(&scic->parent, timeout);
2142         else
2143                 dev_warn(scic_to_dev(scic),
2144                          "%s: SCIC Controller stop operation requested in "
2145                          "invalid state %d\n",
2146                          __func__,
2147                          sci_base_state_machine_get_state(
2148                                  scic_sds_controller_get_base_state_machine(
2149                                          scic)));
2150
2151         return status;
2152 }
2153
2154 /* --------------------------------------------------------------------------- */
2155
2156 enum sci_status scic_controller_reset(
2157         struct scic_sds_controller *scic)
2158 {
2159         enum sci_status status = SCI_FAILURE_INVALID_STATE;
2160         sci_base_controller_handler_t reset;
2161         u32 state;
2162
2163         state = scic->parent.state_machine.current_state_id;
2164         reset = scic_sds_controller_state_handler_table[state].base.reset;
2165
2166         if (reset)
2167                 status = reset(&scic->parent);
2168         else
2169                 dev_warn(scic_to_dev(scic),
2170                          "%s: SCIC Controller reset operation requested in "
2171                          "invalid state %d\n",
2172                          __func__,
2173                          sci_base_state_machine_get_state(
2174                                  scic_sds_controller_get_base_state_machine(
2175                                          scic)));
2176
2177         return status;
2178 }
2179
2180 enum sci_io_status scic_controller_start_io(
2181         struct scic_sds_controller *scic,
2182         struct scic_sds_remote_device *remote_device,
2183         struct scic_sds_request *io_request,
2184         u16 io_tag)
2185 {
2186         u32 state;
2187         sci_base_controller_start_request_handler_t start_io;
2188
2189         state = scic->parent.state_machine.current_state_id;
2190         start_io = scic_sds_controller_state_handler_table[state].base.start_io;
2191
2192         return start_io(&scic->parent,
2193                         (struct sci_base_remote_device *) remote_device,
2194                         (struct sci_base_request *)io_request, io_tag);
2195 }
2196
2197 /* --------------------------------------------------------------------------- */
2198
2199 enum sci_status scic_controller_terminate_request(
2200         struct scic_sds_controller *scic,
2201         struct scic_sds_remote_device *remote_device,
2202         struct scic_sds_request *request)
2203 {
2204         sci_base_controller_request_handler_t terminate_request;
2205         u32 state;
2206
2207         state = scic->parent.state_machine.current_state_id;
2208         terminate_request = scic_sds_controller_state_handler_table[state].terminate_request;
2209
2210         return terminate_request(&scic->parent,
2211                                  (struct sci_base_remote_device *)remote_device,
2212                                  (struct sci_base_request *)request);
2213 }
2214
2215 /* --------------------------------------------------------------------------- */
2216
2217 enum sci_status scic_controller_complete_io(
2218         struct scic_sds_controller *scic,
2219         struct scic_sds_remote_device *remote_device,
2220         struct scic_sds_request *io_request)
2221 {
2222         u32 state;
2223         sci_base_controller_request_handler_t complete_io;
2224
2225         state = scic->parent.state_machine.current_state_id;
2226         complete_io = scic_sds_controller_state_handler_table[state].base.complete_io;
2227
2228         return complete_io(&scic->parent,
2229                            (struct sci_base_remote_device *)remote_device,
2230                            (struct sci_base_request *)io_request);
2231 }
2232
2233 /* --------------------------------------------------------------------------- */
2234
2235
2236 enum sci_task_status scic_controller_start_task(
2237         struct scic_sds_controller *scic,
2238         struct scic_sds_remote_device *remote_device,
2239         struct scic_sds_request *task_request,
2240         u16 task_tag)
2241 {
2242         u32 state;
2243         sci_base_controller_start_request_handler_t start_task;
2244         enum sci_task_status status = SCI_TASK_FAILURE_INVALID_STATE;
2245
2246         state = scic->parent.state_machine.current_state_id;
2247         start_task = scic_sds_controller_state_handler_table[state].base.start_task;
2248
2249         if (start_task)
2250                 status = start_task(&scic->parent,
2251                                     (struct sci_base_remote_device *)remote_device,
2252                                     (struct sci_base_request *)task_request,
2253                                     task_tag);
2254         else
2255                 dev_warn(scic_to_dev(scic),
2256                          "%s: SCIC Controller starting task from invalid "
2257                          "state\n",
2258                          __func__);
2259
2260         return status;
2261 }
2262
2263 /* --------------------------------------------------------------------------- */
2264
2265 enum sci_status scic_controller_complete_task(
2266         struct scic_sds_controller *scic,
2267         struct scic_sds_remote_device *remote_device,
2268         struct scic_sds_request *task_request)
2269 {
2270         u32 state;
2271         sci_base_controller_request_handler_t complete_task;
2272         enum sci_status status = SCI_FAILURE_INVALID_STATE;
2273
2274         state = scic->parent.state_machine.current_state_id;
2275         complete_task = scic_sds_controller_state_handler_table[state].base.complete_task;
2276
2277         if (complete_task)
2278                 status = complete_task(&scic->parent,
2279                                        (struct sci_base_remote_device *)remote_device,
2280                                        (struct sci_base_request *)task_request);
2281         else
2282                 dev_warn(scic_to_dev(scic),
2283                          "%s: SCIC Controller completing task from invalid "
2284                          "state\n",
2285                          __func__);
2286
2287         return status;
2288 }
2289
2290
2291 /* --------------------------------------------------------------------------- */
2292
2293 enum sci_status scic_controller_get_port_handle(
2294         struct scic_sds_controller *scic,
2295         u8 port_index,
2296         struct scic_sds_port **port_handle)
2297 {
2298         if (port_index < scic->logical_port_entries) {
2299                 *port_handle = &scic->port_table[port_index];
2300
2301                 return SCI_SUCCESS;
2302         }
2303
2304         return SCI_FAILURE_INVALID_PORT;
2305 }
2306
2307 /* --------------------------------------------------------------------------- */
2308
2309 enum sci_status scic_controller_get_phy_handle(
2310         struct scic_sds_controller *scic,
2311         u8 phy_index,
2312         struct scic_sds_phy **phy_handle)
2313 {
2314         if (phy_index < ARRAY_SIZE(scic->phy_table)) {
2315                 *phy_handle = &scic->phy_table[phy_index];
2316
2317                 return SCI_SUCCESS;
2318         }
2319
2320         dev_err(scic_to_dev(scic),
2321                 "%s: Controller:0x%p PhyId:0x%x invalid phy index\n",
2322                 __func__, scic, phy_index);
2323
2324         return SCI_FAILURE_INVALID_PHY;
2325 }
2326
2327 /* --------------------------------------------------------------------------- */
2328
2329 u16 scic_controller_allocate_io_tag(
2330         struct scic_sds_controller *scic)
2331 {
2332         u16 task_context;
2333         u16 sequence_count;
2334
2335         if (!sci_pool_empty(scic->tci_pool)) {
2336                 sci_pool_get(scic->tci_pool, task_context);
2337
2338                 sequence_count = scic->io_request_sequence[task_context];
2339
2340                 return scic_sds_io_tag_construct(sequence_count, task_context);
2341         }
2342
2343         return SCI_CONTROLLER_INVALID_IO_TAG;
2344 }
2345
2346 /* --------------------------------------------------------------------------- */
2347
2348 enum sci_status scic_controller_free_io_tag(
2349         struct scic_sds_controller *scic,
2350         u16 io_tag)
2351 {
2352         u16 sequence;
2353         u16 index;
2354
2355         BUG_ON(io_tag == SCI_CONTROLLER_INVALID_IO_TAG);
2356
2357         sequence = scic_sds_io_tag_get_sequence(io_tag);
2358         index    = scic_sds_io_tag_get_index(io_tag);
2359
2360         if (!sci_pool_full(scic->tci_pool)) {
2361                 if (sequence == scic->io_request_sequence[index]) {
2362                         scic_sds_io_sequence_increment(
2363                                 scic->io_request_sequence[index]);
2364
2365                         sci_pool_put(scic->tci_pool, index);
2366
2367                         return SCI_SUCCESS;
2368                 }
2369         }
2370
2371         return SCI_FAILURE_INVALID_IO_TAG;
2372 }
2373
2374 /* --------------------------------------------------------------------------- */
2375
2376 void scic_controller_enable_interrupts(
2377         struct scic_sds_controller *scic)
2378 {
2379         BUG_ON(scic->smu_registers == NULL);
2380         SMU_IMR_WRITE(scic, 0x00000000);
2381 }
2382
2383 /* --------------------------------------------------------------------------- */
2384
2385 void scic_controller_disable_interrupts(
2386         struct scic_sds_controller *scic)
2387 {
2388         BUG_ON(scic->smu_registers == NULL);
2389         SMU_IMR_WRITE(scic, 0xffffffff);
2390 }
2391
2392 /* --------------------------------------------------------------------------- */
2393
2394 enum sci_status scic_controller_set_mode(
2395         struct scic_sds_controller *scic,
2396         enum sci_controller_mode operating_mode)
2397 {
2398         enum sci_status status          = SCI_SUCCESS;
2399
2400         if ((scic->parent.state_machine.current_state_id ==
2401                                 SCI_BASE_CONTROLLER_STATE_INITIALIZING) ||
2402             (scic->parent.state_machine.current_state_id ==
2403                                 SCI_BASE_CONTROLLER_STATE_INITIALIZED)) {
2404                 switch (operating_mode) {
2405                 case SCI_MODE_SPEED:
2406                         scic->remote_node_entries      = SCI_MAX_REMOTE_DEVICES;
2407                         scic->task_context_entries     = SCU_IO_REQUEST_COUNT;
2408                         scic->uf_control.buffers.count =
2409                                 SCU_UNSOLICITED_FRAME_COUNT;
2410                         scic->completion_event_entries = SCU_EVENT_COUNT;
2411                         scic->completion_queue_entries =
2412                                 SCU_COMPLETION_QUEUE_COUNT;
2413                         scic_sds_controller_build_memory_descriptor_table(scic);
2414                         break;
2415
2416                 case SCI_MODE_SIZE:
2417                         scic->remote_node_entries      = SCI_MIN_REMOTE_DEVICES;
2418                         scic->task_context_entries     = SCI_MIN_IO_REQUESTS;
2419                         scic->uf_control.buffers.count =
2420                                 SCU_MIN_UNSOLICITED_FRAMES;
2421                         scic->completion_event_entries = SCU_MIN_EVENTS;
2422                         scic->completion_queue_entries =
2423                                 SCU_MIN_COMPLETION_QUEUE_ENTRIES;
2424                         scic_sds_controller_build_memory_descriptor_table(scic);
2425                         break;
2426
2427                 default:
2428                         status = SCI_FAILURE_INVALID_PARAMETER_VALUE;
2429                         break;
2430                 }
2431         } else
2432                 status = SCI_FAILURE_INVALID_STATE;
2433
2434         return status;
2435 }
2436
2437 /**
2438  * scic_sds_controller_reset_hardware() -
2439  *
2440  * This method will reset the controller hardware.
2441  */
2442 void scic_sds_controller_reset_hardware(
2443         struct scic_sds_controller *scic)
2444 {
2445         /* Disable interrupts so we dont take any spurious interrupts */
2446         scic_controller_disable_interrupts(scic);
2447
2448         /* Reset the SCU */
2449         SMU_SMUSRCR_WRITE(scic, 0xFFFFFFFF);
2450
2451         /* Delay for 1ms to before clearing the CQP and UFQPR. */
2452         udelay(1000);
2453
2454         /* The write to the CQGR clears the CQP */
2455         SMU_CQGR_WRITE(scic, 0x00000000);
2456
2457         /* The write to the UFQGP clears the UFQPR */
2458         SCU_UFQGP_WRITE(scic, 0x00000000);
2459 }
2460
2461 /* --------------------------------------------------------------------------- */
2462
2463 enum sci_status scic_user_parameters_set(
2464         struct scic_sds_controller *scic,
2465         union scic_user_parameters *scic_parms)
2466 {
2467         if (
2468                 (scic->parent.state_machine.current_state_id
2469                  == SCI_BASE_CONTROLLER_STATE_RESET)
2470                 || (scic->parent.state_machine.current_state_id
2471                     == SCI_BASE_CONTROLLER_STATE_INITIALIZING)
2472                 || (scic->parent.state_machine.current_state_id
2473                     == SCI_BASE_CONTROLLER_STATE_INITIALIZED)
2474                 ) {
2475                 u16 index;
2476
2477                 /*
2478                  * Validate the user parameters.  If they are not legal, then
2479                  * return a failure. */
2480                 for (index = 0; index < SCI_MAX_PHYS; index++) {
2481                         if (!(scic_parms->sds1.phys[index].max_speed_generation
2482                              <= SCIC_SDS_PARM_MAX_SPEED
2483                              && scic_parms->sds1.phys[index].max_speed_generation
2484                              > SCIC_SDS_PARM_NO_SPEED))
2485                                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2486
2487                         if (scic_parms->sds1.phys[index].in_connection_align_insertion_frequency < 3)
2488                                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2489                         if (
2490                             (scic_parms->sds1.phys[index].in_connection_align_insertion_frequency < 3) ||
2491                             (scic_parms->sds1.phys[index].align_insertion_frequency == 0) ||
2492                             (scic_parms->sds1.phys[index].notify_enable_spin_up_insertion_frequency == 0)
2493                             )
2494                                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2495                 }
2496
2497                 if ((scic_parms->sds1.stp_inactivity_timeout == 0) ||
2498                    (scic_parms->sds1.ssp_inactivity_timeout == 0) ||
2499                    (scic_parms->sds1.stp_max_occupancy_timeout == 0) ||
2500                    (scic_parms->sds1.ssp_max_occupancy_timeout == 0) ||
2501                    (scic_parms->sds1.no_outbound_task_timeout == 0))
2502                         return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2503
2504                 memcpy(&scic->user_parameters, scic_parms, sizeof(*scic_parms));
2505
2506                 return SCI_SUCCESS;
2507         }
2508
2509         return SCI_FAILURE_INVALID_STATE;
2510 }
2511
2512 /* --------------------------------------------------------------------------- */
2513
2514 void scic_user_parameters_get(
2515         struct scic_sds_controller *scic,
2516         union scic_user_parameters *scic_parms)
2517 {
2518         memcpy(scic_parms, (&scic->user_parameters), sizeof(*scic_parms));
2519 }
2520
2521 /* --------------------------------------------------------------------------- */
2522
2523 enum sci_status scic_oem_parameters_set(
2524         struct scic_sds_controller *scic,
2525         union scic_oem_parameters *scic_parms)
2526 {
2527         if (
2528                 (scic->parent.state_machine.current_state_id
2529                  == SCI_BASE_CONTROLLER_STATE_RESET)
2530                 || (scic->parent.state_machine.current_state_id
2531                     == SCI_BASE_CONTROLLER_STATE_INITIALIZING)
2532                 || (scic->parent.state_machine.current_state_id
2533                     == SCI_BASE_CONTROLLER_STATE_INITIALIZED)
2534                 ) {
2535                 u16 index;
2536
2537                 /*
2538                  * Validate the oem parameters.  If they are not legal, then
2539                  * return a failure. */
2540                 for (index = 0; index < SCI_MAX_PORTS; index++) {
2541                         if (scic_parms->sds1.ports[index].phy_mask > SCIC_SDS_PARM_PHY_MASK_MAX) {
2542                                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2543                         }
2544                 }
2545
2546                 for (index = 0; index < SCI_MAX_PHYS; index++) {
2547                         if (
2548                                 scic_parms->sds1.phys[index].sas_address.high == 0
2549                                 && scic_parms->sds1.phys[index].sas_address.low  == 0
2550                                 ) {
2551                                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2552                         }
2553                 }
2554
2555                 memcpy(&scic->oem_parameters, scic_parms, sizeof(*scic_parms));
2556                 return SCI_SUCCESS;
2557         }
2558
2559         return SCI_FAILURE_INVALID_STATE;
2560 }
2561
2562 /* --------------------------------------------------------------------------- */
2563
2564 void scic_oem_parameters_get(
2565         struct scic_sds_controller *scic,
2566         union scic_oem_parameters *scic_parms)
2567 {
2568         memcpy(scic_parms, (&scic->oem_parameters), sizeof(*scic_parms));
2569 }
2570
2571 /* --------------------------------------------------------------------------- */
2572
2573
2574 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS 853
2575 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS 1280
2576 #define INTERRUPT_COALESCE_TIMEOUT_MAX_US                    2700000
2577 #define INTERRUPT_COALESCE_NUMBER_MAX                        256
2578 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN                7
2579 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX                28
2580
2581 enum sci_status scic_controller_set_interrupt_coalescence(
2582         struct scic_sds_controller *scic_controller,
2583         u32 coalesce_number,
2584         u32 coalesce_timeout)
2585 {
2586         u8 timeout_encode = 0;
2587         u32 min = 0;
2588         u32 max = 0;
2589
2590         /* Check if the input parameters fall in the range. */
2591         if (coalesce_number > INTERRUPT_COALESCE_NUMBER_MAX)
2592                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2593
2594         /*
2595          *  Defined encoding for interrupt coalescing timeout:
2596          *              Value   Min      Max     Units
2597          *              -----   ---      ---     -----
2598          *              0       -        -       Disabled
2599          *              1       13.3     20.0    ns
2600          *              2       26.7     40.0
2601          *              3       53.3     80.0
2602          *              4       106.7    160.0
2603          *              5       213.3    320.0
2604          *              6       426.7    640.0
2605          *              7       853.3    1280.0
2606          *              8       1.7      2.6     us
2607          *              9       3.4      5.1
2608          *              10      6.8      10.2
2609          *              11      13.7     20.5
2610          *              12      27.3     41.0
2611          *              13      54.6     81.9
2612          *              14      109.2    163.8
2613          *              15      218.5    327.7
2614          *              16      436.9    655.4
2615          *              17      873.8    1310.7
2616          *              18      1.7      2.6     ms
2617          *              19      3.5      5.2
2618          *              20      7.0      10.5
2619          *              21      14.0     21.0
2620          *              22      28.0     41.9
2621          *              23      55.9     83.9
2622          *              24      111.8    167.8
2623          *              25      223.7    335.5
2624          *              26      447.4    671.1
2625          *              27      894.8    1342.2
2626          *              28      1.8      2.7     s
2627          *              Others Undefined */
2628
2629         /*
2630          * Use the table above to decide the encode of interrupt coalescing timeout
2631          * value for register writing. */
2632         if (coalesce_timeout == 0)
2633                 timeout_encode = 0;
2634         else{
2635                 /* make the timeout value in unit of (10 ns). */
2636                 coalesce_timeout = coalesce_timeout * 100;
2637                 min = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS / 10;
2638                 max = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS / 10;
2639
2640                 /* get the encode of timeout for register writing. */
2641                 for (timeout_encode = INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN;
2642                       timeout_encode <= INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX;
2643                       timeout_encode++) {
2644                         if (min <= coalesce_timeout &&  max > coalesce_timeout)
2645                                 break;
2646                         else if (coalesce_timeout >= max && coalesce_timeout < min * 2
2647                                  && coalesce_timeout <= INTERRUPT_COALESCE_TIMEOUT_MAX_US * 100) {
2648                                 if ((coalesce_timeout - max) < (2 * min - coalesce_timeout))
2649                                         break;
2650                                 else{
2651                                         timeout_encode++;
2652                                         break;
2653                                 }
2654                         } else {
2655                                 max = max * 2;
2656                                 min = min * 2;
2657                         }
2658                 }
2659
2660                 if (timeout_encode == INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX + 1)
2661                         /* the value is out of range. */
2662                         return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2663         }
2664
2665         SMU_ICC_WRITE(
2666                 scic_controller,
2667                 (SMU_ICC_GEN_VAL(NUMBER, coalesce_number) |
2668                  SMU_ICC_GEN_VAL(TIMER, timeout_encode))
2669                 );
2670
2671         scic_controller->interrupt_coalesce_number = (u16)coalesce_number;
2672         scic_controller->interrupt_coalesce_timeout = coalesce_timeout / 100;
2673
2674         return SCI_SUCCESS;
2675 }
2676
2677
2678 struct scic_sds_controller *scic_controller_alloc(struct device *dev)
2679 {
2680         return devm_kzalloc(dev, sizeof(struct scic_sds_controller), GFP_KERNEL);
2681 }
2682
2683 /*
2684  * *****************************************************************************
2685  * * DEFAULT STATE HANDLERS
2686  * ***************************************************************************** */
2687
2688 /**
2689  *
2690  * @controller: This is struct sci_base_controller object which is cast into a
2691  *    struct scic_sds_controller object.
2692  * @remote_device: This is struct sci_base_remote_device which, if it was used, would
2693  *    be cast to a struct scic_sds_remote_device.
2694  * @io_request: This is the struct sci_base_request which, if it was used, would be
2695  *    cast to a SCIC_SDS_IO_REQUEST.
2696  * @io_tag: This is the IO tag to be assigned to the IO request or
2697  *    SCI_CONTROLLER_INVALID_IO_TAG.
2698  *
2699  * This method is called when the struct scic_sds_controller default start io/task
2700  * handler is in place. - Issue a warning message enum sci_status
2701  * SCI_FAILURE_INVALID_STATE
2702  */
2703 static enum sci_status scic_sds_controller_default_start_operation_handler(
2704         struct sci_base_controller *controller,
2705         struct sci_base_remote_device *remote_device,
2706         struct sci_base_request *io_request,
2707         u16 io_tag)
2708 {
2709         struct scic_sds_controller *this_controller;
2710
2711         this_controller = (struct scic_sds_controller *)controller;
2712
2713         dev_warn(scic_to_dev(this_controller),
2714                  "%s: SCIC Controller requested to start an io/task from "
2715                  "invalid state %d\n",
2716                  __func__,
2717                  sci_base_state_machine_get_state(
2718                          scic_sds_controller_get_base_state_machine(
2719                                  this_controller)));
2720
2721         return SCI_FAILURE_INVALID_STATE;
2722 }
2723
2724 /**
2725  *
2726  * @controller: This is struct sci_base_controller object which is cast into a
2727  *    struct scic_sds_controller object.
2728  * @remote_device: This is struct sci_base_remote_device which, if it was used, would
2729  *    be cast to a struct scic_sds_remote_device.
2730  * @io_request: This is the struct sci_base_request which, if it was used, would be
2731  *    cast to a SCIC_SDS_IO_REQUEST.
2732  *
2733  * This method is called when the struct scic_sds_controller default request handler
2734  * is in place. - Issue a warning message enum sci_status SCI_FAILURE_INVALID_STATE
2735  */
2736 static enum sci_status scic_sds_controller_default_request_handler(
2737         struct sci_base_controller *controller,
2738         struct sci_base_remote_device *remote_device,
2739         struct sci_base_request *io_request)
2740 {
2741         struct scic_sds_controller *this_controller;
2742
2743         this_controller = (struct scic_sds_controller *)controller;
2744
2745         dev_warn(scic_to_dev(this_controller),
2746                 "%s: SCIC Controller request operation from invalid state %d\n",
2747                 __func__,
2748                 sci_base_state_machine_get_state(
2749                         scic_sds_controller_get_base_state_machine(
2750                                 this_controller)));
2751
2752         return SCI_FAILURE_INVALID_STATE;
2753 }
2754
2755 /*
2756  * *****************************************************************************
2757  * * GENERAL (COMMON) STATE HANDLERS
2758  * ***************************************************************************** */
2759
2760 /**
2761  *
2762  * @controller: The struct sci_base_controller object which is cast into a
2763  *    struct scic_sds_controller object.
2764  *
2765  * This method is called when the struct scic_sds_controller is in the ready state
2766  * reset handler is in place. - Transition to
2767  * SCI_BASE_CONTROLLER_STATE_RESETTING enum sci_status SCI_SUCCESS
2768  */
2769 static enum sci_status scic_sds_controller_general_reset_handler(
2770         struct sci_base_controller *controller)
2771 {
2772         struct scic_sds_controller *this_controller;
2773
2774         this_controller = (struct scic_sds_controller *)controller;
2775
2776         /*
2777          * The reset operation is not a graceful cleanup just perform the state
2778          * transition. */
2779         sci_base_state_machine_change_state(
2780                 scic_sds_controller_get_base_state_machine(this_controller),
2781                 SCI_BASE_CONTROLLER_STATE_RESETTING
2782                 );
2783
2784         return SCI_SUCCESS;
2785 }
2786
2787 /*
2788  * *****************************************************************************
2789  * * RESET STATE HANDLERS
2790  * ***************************************************************************** */
2791
2792 /**
2793  *
2794  * @controller: This is the struct sci_base_controller object which is cast into a
2795  *    struct scic_sds_controller object.
2796  *
2797  * This method is the struct scic_sds_controller initialize handler for the reset
2798  * state. - Currently this function does nothing enum sci_status SCI_FAILURE This
2799  * function is not yet implemented and is a valid request from the reset state.
2800  */
2801 static enum sci_status scic_sds_controller_reset_state_initialize_handler(
2802         struct sci_base_controller *controller)
2803 {
2804         u32 index;
2805         enum sci_status result = SCI_SUCCESS;
2806         struct scic_sds_controller *this_controller;
2807
2808         this_controller = (struct scic_sds_controller *)controller;
2809
2810         sci_base_state_machine_change_state(
2811                 scic_sds_controller_get_base_state_machine(this_controller),
2812                 SCI_BASE_CONTROLLER_STATE_INITIALIZING
2813                 );
2814
2815         this_controller->timeout_timer = isci_event_timer_create(
2816                 this_controller,
2817                 (void (*)(void *))scic_sds_controller_timeout_handler,
2818                 (void (*)(void *))controller);
2819
2820         scic_sds_controller_initialize_phy_startup(this_controller);
2821
2822         scic_sds_controller_initialize_power_control(this_controller);
2823
2824         /*
2825          * There is nothing to do here for B0 since we do not have to
2826          * program the AFE registers.
2827          * / @todo The AFE settings are supposed to be correct for the B0 but
2828          * /       presently they seem to be wrong. */
2829         scic_sds_controller_afe_initialization(this_controller);
2830
2831         if (SCI_SUCCESS == result) {
2832                 u32 status;
2833                 u32 terminate_loop;
2834
2835                 /* Take the hardware out of reset */
2836                 SMU_SMUSRCR_WRITE(this_controller, 0x00000000);
2837
2838                 /*
2839                  * / @todo Provide meaningfull error code for hardware failure
2840                  * result = SCI_FAILURE_CONTROLLER_HARDWARE; */
2841                 result = SCI_FAILURE;
2842                 terminate_loop = 100;
2843
2844                 while (terminate_loop-- && (result != SCI_SUCCESS)) {
2845                         /* Loop until the hardware reports success */
2846                         udelay(SCU_CONTEXT_RAM_INIT_STALL_TIME);
2847                         status = SMU_SMUCSR_READ(this_controller);
2848
2849                         if ((status & SCU_RAM_INIT_COMPLETED) == SCU_RAM_INIT_COMPLETED) {
2850                                 result = SCI_SUCCESS;
2851                         }
2852                 }
2853         }
2854
2855         if (result == SCI_SUCCESS) {
2856                 u32 max_supported_ports;
2857                 u32 max_supported_devices;
2858                 u32 max_supported_io_requests;
2859                 u32 device_context_capacity;
2860
2861                 /*
2862                  * Determine what are the actaul device capacities that the
2863                  * hardware will support */
2864                 device_context_capacity = SMU_DCC_READ(this_controller);
2865
2866                 max_supported_ports =
2867                         smu_dcc_get_max_ports(device_context_capacity);
2868                 max_supported_devices =
2869                         smu_dcc_get_max_remote_node_context(device_context_capacity);
2870                 max_supported_io_requests =
2871                         smu_dcc_get_max_task_context(device_context_capacity);
2872
2873                 /* Make all PEs that are unassigned match up with the logical ports */
2874                 for (index = 0; index < max_supported_ports; index++) {
2875                         scu_register_write(
2876                                 this_controller,
2877                                 this_controller->scu_registers->peg0.ptsg.protocol_engine[index],
2878                                 index
2879                                 );
2880                 }
2881
2882                 /* Record the smaller of the two capacity values */
2883                 this_controller->logical_port_entries =
2884                         min(max_supported_ports, this_controller->logical_port_entries);
2885
2886                 this_controller->task_context_entries =
2887                         min(max_supported_io_requests, this_controller->task_context_entries);
2888
2889                 this_controller->remote_node_entries =
2890                         min(max_supported_devices, this_controller->remote_node_entries);
2891
2892                 /*
2893                  * Now that we have the correct hardware reported minimum values
2894                  * build the MDL for the controller.  Default to a performance
2895                  * configuration. */
2896                 scic_controller_set_mode(this_controller, SCI_MODE_SPEED);
2897         }
2898
2899         /* Initialize hardware PCI Relaxed ordering in DMA engines */
2900         if (result == SCI_SUCCESS) {
2901                 u32 dma_configuration;
2902
2903                 /* Configure the payload DMA */
2904                 dma_configuration = SCU_PDMACR_READ(this_controller);
2905                 dma_configuration |= SCU_PDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
2906                 SCU_PDMACR_WRITE(this_controller, dma_configuration);
2907
2908                 /* Configure the control DMA */
2909                 dma_configuration = SCU_CDMACR_READ(this_controller);
2910                 dma_configuration |= SCU_CDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
2911                 SCU_CDMACR_WRITE(this_controller, dma_configuration);
2912         }
2913
2914         /*
2915          * Initialize the PHYs before the PORTs because the PHY registers
2916          * are accessed during the port initialization. */
2917         if (result == SCI_SUCCESS) {
2918                 /* Initialize the phys */
2919                 for (index = 0;
2920                      (result == SCI_SUCCESS) && (index < SCI_MAX_PHYS);
2921                      index++) {
2922                         result = scic_sds_phy_initialize(
2923                                 &this_controller->phy_table[index],
2924                                 &this_controller->scu_registers->peg0.pe[index].tl,
2925                                 &this_controller->scu_registers->peg0.pe[index].ll
2926                                 );
2927                 }
2928         }
2929
2930         if (result == SCI_SUCCESS) {
2931                 /* Initialize the logical ports */
2932                 for (index = 0;
2933                      (index < this_controller->logical_port_entries)
2934                      && (result == SCI_SUCCESS);
2935                      index++) {
2936                         result = scic_sds_port_initialize(
2937                                 &this_controller->port_table[index],
2938                                 &this_controller->scu_registers->peg0.ptsg.port[index],
2939                                 &this_controller->scu_registers->peg0.ptsg.protocol_engine,
2940                                 &this_controller->scu_registers->peg0.viit[index]
2941                                 );
2942                 }
2943         }
2944
2945         if (SCI_SUCCESS == result) {
2946                 result = scic_sds_port_configuration_agent_initialize(
2947                         this_controller,
2948                         &this_controller->port_agent
2949                         );
2950         }
2951
2952         /* Advance the controller state machine */
2953         if (result == SCI_SUCCESS) {
2954                 sci_base_state_machine_change_state(
2955                         scic_sds_controller_get_base_state_machine(this_controller),
2956                         SCI_BASE_CONTROLLER_STATE_INITIALIZED
2957                         );
2958         } else {
2959                 sci_base_state_machine_change_state(
2960                         scic_sds_controller_get_base_state_machine(this_controller),
2961                         SCI_BASE_CONTROLLER_STATE_FAILED
2962                         );
2963         }
2964
2965         return result;
2966 }
2967
2968 /*
2969  * *****************************************************************************
2970  * * INITIALIZED STATE HANDLERS
2971  * ***************************************************************************** */
2972
2973 /**
2974  *
2975  * @controller: This is the struct sci_base_controller object which is cast into a
2976  *    struct scic_sds_controller object.
2977  * @timeout: This is the allowed time for the controller object to reach the
2978  *    started state.
2979  *
2980  * This method is the struct scic_sds_controller start handler for the initialized
2981  * state. - Validate we have a good memory descriptor table - Initialze the
2982  * physical memory before programming the hardware - Program the SCU hardware
2983  * with the physical memory addresses passed in the memory descriptor table. -
2984  * Initialzie the TCi pool - Initialize the RNi pool - Initialize the
2985  * completion queue - Initialize the unsolicited frame data - Take the SCU port
2986  * task scheduler out of reset - Start the first phy object. - Transition to
2987  * SCI_BASE_CONTROLLER_STATE_STARTING. enum sci_status SCI_SUCCESS if all of the
2988  * controller start operations complete
2989  * SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD if one or more of the memory
2990  * descriptor fields is invalid.
2991  */
2992 static enum sci_status scic_sds_controller_initialized_state_start_handler(
2993         struct sci_base_controller *controller,
2994         u32 timeout)
2995 {
2996         u16 index;
2997         enum sci_status result;
2998         struct scic_sds_controller *this_controller;
2999
3000         this_controller = (struct scic_sds_controller *)controller;
3001
3002         /* Make sure that the SCI User filled in the memory descriptor table correctly */
3003         result = scic_sds_controller_validate_memory_descriptor_table(this_controller);
3004
3005         if (result == SCI_SUCCESS) {
3006                 /* The memory descriptor list looks good so program the hardware */
3007                 scic_sds_controller_ram_initialization(this_controller);
3008         }
3009
3010         if (result == SCI_SUCCESS) {
3011                 /* Build the TCi free pool */
3012                 sci_pool_initialize(this_controller->tci_pool);
3013                 for (index = 0; index < this_controller->task_context_entries; index++) {
3014                         sci_pool_put(this_controller->tci_pool, index);
3015                 }
3016
3017                 /* Build the RNi free pool */
3018                 scic_sds_remote_node_table_initialize(
3019                         &this_controller->available_remote_nodes,
3020                         this_controller->remote_node_entries
3021                         );
3022         }
3023
3024         if (result == SCI_SUCCESS) {
3025                 /*
3026                  * Before anything else lets make sure we will not be interrupted
3027                  * by the hardware. */
3028                 scic_controller_disable_interrupts(this_controller);
3029
3030                 /* Enable the port task scheduler */
3031                 scic_sds_controller_enable_port_task_scheduler(this_controller);
3032
3033                 /* Assign all the task entries to this controller physical function */
3034                 scic_sds_controller_assign_task_entries(this_controller);
3035
3036                 /* Now initialze the completion queue */
3037                 scic_sds_controller_initialize_completion_queue(this_controller);
3038
3039                 /* Initialize the unsolicited frame queue for use */
3040                 scic_sds_controller_initialize_unsolicited_frame_queue(this_controller);
3041         }
3042
3043         /* Start all of the ports on this controller */
3044         for (index = 0; index < this_controller->logical_port_entries &&
3045                         result == SCI_SUCCESS; index++) {
3046                 struct scic_sds_port *sci_port = &this_controller->port_table[index];
3047
3048                 result = sci_port->state_handlers->parent.start_handler(&sci_port->parent);
3049         }
3050
3051         if (result == SCI_SUCCESS) {
3052                 scic_sds_controller_start_next_phy(this_controller);
3053
3054                 isci_event_timer_start(this_controller,
3055                                     this_controller->timeout_timer,
3056                                     timeout);
3057
3058                 sci_base_state_machine_change_state(
3059                         scic_sds_controller_get_base_state_machine(this_controller),
3060                         SCI_BASE_CONTROLLER_STATE_STARTING
3061                         );
3062         }
3063
3064         return result;
3065 }
3066
3067 /*
3068  * *****************************************************************************
3069  * * INITIALIZED STATE HANDLERS
3070  * ***************************************************************************** */
3071
3072 /**
3073  *
3074  * @controller: This is struct scic_sds_controller which receives the link up
3075  *    notification.
3076  * @port: This is struct scic_sds_port with which the phy is associated.
3077  * @phy: This is the struct scic_sds_phy which has gone link up.
3078  *
3079  * This method is called when the struct scic_sds_controller is in the starting state
3080  * link up handler is called.  This method will perform the following: - Stop
3081  * the phy timer - Start the next phy - Report the link up condition to the
3082  * port object none
3083  */
3084 static void scic_sds_controller_starting_state_link_up_handler(
3085         struct scic_sds_controller *this_controller,
3086         struct scic_sds_port *port,
3087         struct scic_sds_phy *phy)
3088 {
3089         scic_sds_controller_phy_timer_stop(this_controller);
3090
3091         this_controller->port_agent.link_up_handler(
3092                 this_controller, &this_controller->port_agent, port, phy
3093                 );
3094         /* scic_sds_port_link_up(port, phy); */
3095
3096         scic_sds_controller_start_next_phy(this_controller);
3097 }
3098
3099 /**
3100  *
3101  * @controller: This is struct scic_sds_controller which receives the link down
3102  *    notification.
3103  * @port: This is struct scic_sds_port with which the phy is associated.
3104  * @phy: This is the struct scic_sds_phy which has gone link down.
3105  *
3106  * This method is called when the struct scic_sds_controller is in the starting state
3107  * link down handler is called. - Report the link down condition to the port
3108  * object none
3109  */
3110 static void scic_sds_controller_starting_state_link_down_handler(
3111         struct scic_sds_controller *this_controller,
3112         struct scic_sds_port *port,
3113         struct scic_sds_phy *phy)
3114 {
3115         this_controller->port_agent.link_down_handler(
3116                 this_controller, &this_controller->port_agent, port, phy
3117                 );
3118         /* scic_sds_port_link_down(port, phy); */
3119 }
3120
3121 /*
3122  * *****************************************************************************
3123  * * READY STATE HANDLERS
3124  * ***************************************************************************** */
3125
3126 /**
3127  *
3128  * @controller: The struct sci_base_controller object which is cast into a
3129  *    struct scic_sds_controller object.
3130  * @timeout: The timeout for when the stop operation should report a failure.
3131  *
3132  * This method is called when the struct scic_sds_controller is in the ready state
3133  * stop handler is called. - Start the timeout timer - Transition to
3134  * SCI_BASE_CONTROLLER_STATE_STOPPING. enum sci_status SCI_SUCCESS
3135  */
3136 static enum sci_status scic_sds_controller_ready_state_stop_handler(
3137         struct sci_base_controller *controller,
3138         u32 timeout)
3139 {
3140         struct scic_sds_controller *this_controller;
3141
3142         this_controller = (struct scic_sds_controller *)controller;
3143
3144         isci_event_timer_start(this_controller,
3145                             this_controller->timeout_timer,
3146                             timeout);
3147
3148         sci_base_state_machine_change_state(
3149                 scic_sds_controller_get_base_state_machine(this_controller),
3150                 SCI_BASE_CONTROLLER_STATE_STOPPING
3151                 );
3152
3153         return SCI_SUCCESS;
3154 }
3155
3156 /**
3157  *
3158  * @controller: This is struct sci_base_controller object which is cast into a
3159  *    struct scic_sds_controller object.
3160  * @remote_device: This is struct sci_base_remote_device which is cast to a
3161  *    struct scic_sds_remote_device object.
3162  * @io_request: This is the struct sci_base_request which is cast to a
3163  *    SCIC_SDS_IO_REQUEST object.
3164  * @io_tag: This is the IO tag to be assigned to the IO request or
3165  *    SCI_CONTROLLER_INVALID_IO_TAG.
3166  *
3167  * This method is called when the struct scic_sds_controller is in the ready state and
3168  * the start io handler is called. - Start the io request on the remote device
3169  * - if successful - assign the io_request to the io_request_table - post the
3170  * request to the hardware enum sci_status SCI_SUCCESS if the start io operation
3171  * succeeds SCI_FAILURE_INSUFFICIENT_RESOURCES if the IO tag could not be
3172  * allocated for the io request. SCI_FAILURE_INVALID_STATE if one or more
3173  * objects are not in a valid state to accept io requests. How does the io_tag
3174  * parameter get assigned to the io request?
3175  */
3176 static enum sci_status scic_sds_controller_ready_state_start_io_handler(
3177         struct sci_base_controller *controller,
3178         struct sci_base_remote_device *remote_device,
3179         struct sci_base_request *io_request,
3180         u16 io_tag)
3181 {
3182         enum sci_status status;
3183
3184         struct scic_sds_controller *this_controller;
3185         struct scic_sds_request *the_request;
3186         struct scic_sds_remote_device *the_device;
3187
3188         this_controller = (struct scic_sds_controller *)controller;
3189         the_request = (struct scic_sds_request *)io_request;
3190         the_device = (struct scic_sds_remote_device *)remote_device;
3191
3192         status = scic_sds_remote_device_start_io(this_controller, the_device, the_request);
3193
3194         if (status == SCI_SUCCESS) {
3195                 this_controller->io_request_table[
3196                         scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3197
3198                 scic_sds_controller_post_request(
3199                         this_controller,
3200                         scic_sds_request_get_post_context(the_request)
3201                         );
3202         }
3203
3204         return status;
3205 }
3206
3207 /**
3208  *
3209  * @controller: This is struct sci_base_controller object which is cast into a
3210  *    struct scic_sds_controller object.
3211  * @remote_device: This is struct sci_base_remote_device which is cast to a
3212  *    struct scic_sds_remote_device object.
3213  * @io_request: This is the struct sci_base_request which is cast to a
3214  *    SCIC_SDS_IO_REQUEST object.
3215  *
3216  * This method is called when the struct scic_sds_controller is in the ready state and
3217  * the complete io handler is called. - Complete the io request on the remote
3218  * device - if successful - remove the io_request to the io_request_table
3219  * enum sci_status SCI_SUCCESS if the start io operation succeeds
3220  * SCI_FAILURE_INVALID_STATE if one or more objects are not in a valid state to
3221  * accept io requests.
3222  */
3223 static enum sci_status scic_sds_controller_ready_state_complete_io_handler(
3224         struct sci_base_controller *controller,
3225         struct sci_base_remote_device *remote_device,
3226         struct sci_base_request *io_request)
3227 {
3228         u16 index;
3229         enum sci_status status;
3230         struct scic_sds_controller *this_controller;
3231         struct scic_sds_request *the_request;
3232         struct scic_sds_remote_device *the_device;
3233
3234         this_controller = (struct scic_sds_controller *)controller;
3235         the_request = (struct scic_sds_request *)io_request;
3236         the_device = (struct scic_sds_remote_device *)remote_device;
3237
3238         status = scic_sds_remote_device_complete_io(
3239                 this_controller, the_device, the_request);
3240
3241         if (status == SCI_SUCCESS) {
3242                 index = scic_sds_io_tag_get_index(the_request->io_tag);
3243                 this_controller->io_request_table[index] = NULL;
3244         }
3245
3246         return status;
3247 }
3248
3249 /**
3250  *
3251  * @controller: This is struct sci_base_controller object which is cast into a
3252  *    struct scic_sds_controller object.
3253  * @remote_device: This is struct sci_base_remote_device which is cast to a
3254  *    struct scic_sds_remote_device object.
3255  * @io_request: This is the struct sci_base_request which is cast to a
3256  *    SCIC_SDS_IO_REQUEST object.
3257  *
3258  * This method is called when the struct scic_sds_controller is in the ready state and
3259  * the continue io handler is called. enum sci_status
3260  */
3261 static enum sci_status scic_sds_controller_ready_state_continue_io_handler(
3262         struct sci_base_controller *controller,
3263         struct sci_base_remote_device *remote_device,
3264         struct sci_base_request *io_request)
3265 {
3266         struct scic_sds_controller *this_controller;
3267         struct scic_sds_request *the_request;
3268
3269         the_request     = (struct scic_sds_request *)io_request;
3270         this_controller = (struct scic_sds_controller *)controller;
3271
3272         this_controller->io_request_table[
3273                 scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3274
3275         scic_sds_controller_post_request(
3276                 this_controller,
3277                 scic_sds_request_get_post_context(the_request)
3278                 );
3279
3280         return SCI_SUCCESS;
3281 }
3282
3283 /**
3284  *
3285  * @controller: This is struct sci_base_controller object which is cast into a
3286  *    struct scic_sds_controller object.
3287  * @remote_device: This is struct sci_base_remote_device which is cast to a
3288  *    struct scic_sds_remote_device object.
3289  * @io_request: This is the struct sci_base_request which is cast to a
3290  *    SCIC_SDS_IO_REQUEST object.
3291  * @task_tag: This is the task tag to be assigned to the task request or
3292  *    SCI_CONTROLLER_INVALID_IO_TAG.
3293  *
3294  * This method is called when the struct scic_sds_controller is in the ready state and
3295  * the start task handler is called. - The remote device is requested to start
3296  * the task request - if successful - assign the task to the io_request_table -
3297  * post the request to the SCU hardware enum sci_status SCI_SUCCESS if the start io
3298  * operation succeeds SCI_FAILURE_INSUFFICIENT_RESOURCES if the IO tag could
3299  * not be allocated for the io request. SCI_FAILURE_INVALID_STATE if one or
3300  * more objects are not in a valid state to accept io requests. How does the io
3301  * tag get assigned in this code path?
3302  */
3303 static enum sci_status scic_sds_controller_ready_state_start_task_handler(
3304         struct sci_base_controller *controller,
3305         struct sci_base_remote_device *remote_device,
3306         struct sci_base_request *io_request,
3307         u16 task_tag)
3308 {
3309         struct scic_sds_controller *this_controller = (struct scic_sds_controller *)
3310                                                  controller;
3311         struct scic_sds_request *the_request     = (struct scic_sds_request *)
3312                                               io_request;
3313         struct scic_sds_remote_device *the_device      = (struct scic_sds_remote_device *)
3314                                                     remote_device;
3315         enum sci_status status;
3316
3317         status = scic_sds_remote_device_start_task(
3318                 this_controller, the_device, the_request
3319                 );
3320
3321         if (status == SCI_SUCCESS) {
3322                 this_controller->io_request_table[
3323                         scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3324
3325                 scic_sds_controller_post_request(
3326                         this_controller,
3327                         scic_sds_request_get_post_context(the_request)
3328                         );
3329         } else if (status == SCI_FAILURE_RESET_DEVICE_PARTIAL_SUCCESS) {
3330                 this_controller->io_request_table[
3331                         scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3332
3333                 /*
3334                  * We will let framework know this task request started successfully,
3335                  * although core is still woring on starting the request (to post tc when
3336                  * RNC is resumed.) */
3337                 status = SCI_SUCCESS;
3338         }
3339         return status;
3340 }
3341
3342 /**
3343  *
3344  * @controller: This is struct sci_base_controller object which is cast into a
3345  *    struct scic_sds_controller object.
3346  * @remote_device: This is struct sci_base_remote_device which is cast to a
3347  *    struct scic_sds_remote_device object.
3348  * @io_request: This is the struct sci_base_request which is cast to a
3349  *    SCIC_SDS_IO_REQUEST object.
3350  *
3351  * This method is called when the struct scic_sds_controller is in the ready state and
3352  * the terminate request handler is called. - call the io request terminate
3353  * function - if successful - post the terminate request to the SCU hardware
3354  * enum sci_status SCI_SUCCESS if the start io operation succeeds
3355  * SCI_FAILURE_INVALID_STATE if one or more objects are not in a valid state to
3356  * accept io requests.
3357  */
3358 static enum sci_status scic_sds_controller_ready_state_terminate_request_handler(
3359         struct sci_base_controller *controller,
3360         struct sci_base_remote_device *remote_device,
3361         struct sci_base_request *io_request)
3362 {
3363         struct scic_sds_controller *this_controller = (struct scic_sds_controller *)
3364                                                  controller;
3365         struct scic_sds_request *the_request     = (struct scic_sds_request *)
3366                                               io_request;
3367         enum sci_status status;
3368
3369         status = scic_sds_io_request_terminate(the_request);
3370         if (status == SCI_SUCCESS) {
3371                 /*
3372                  * Utilize the original post context command and or in the POST_TC_ABORT
3373                  * request sub-type. */
3374                 scic_sds_controller_post_request(
3375                         this_controller,
3376                         scic_sds_request_get_post_context(the_request)
3377                         | SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT
3378                         );
3379         }
3380
3381         return status;
3382 }
3383
3384 /**
3385  *
3386  * @controller: This is struct scic_sds_controller which receives the link up
3387  *    notification.
3388  * @port: This is struct scic_sds_port with which the phy is associated.
3389  * @phy: This is the struct scic_sds_phy which has gone link up.
3390  *
3391  * This method is called when the struct scic_sds_controller is in the starting state
3392  * link up handler is called.  This method will perform the following: - Stop
3393  * the phy timer - Start the next phy - Report the link up condition to the
3394  * port object none
3395  */
3396 static void scic_sds_controller_ready_state_link_up_handler(
3397         struct scic_sds_controller *this_controller,
3398         struct scic_sds_port *port,
3399         struct scic_sds_phy *phy)
3400 {
3401         this_controller->port_agent.link_up_handler(
3402                 this_controller, &this_controller->port_agent, port, phy
3403                 );
3404 }
3405
3406 /**
3407  *
3408  * @controller: This is struct scic_sds_controller which receives the link down
3409  *    notification.
3410  * @port: This is struct scic_sds_port with which the phy is associated.
3411  * @phy: This is the struct scic_sds_phy which has gone link down.
3412  *
3413  * This method is called when the struct scic_sds_controller is in the starting state
3414  * link down handler is called. - Report the link down condition to the port
3415  * object none
3416  */
3417 static void scic_sds_controller_ready_state_link_down_handler(
3418         struct scic_sds_controller *this_controller,
3419         struct scic_sds_port *port,
3420         struct scic_sds_phy *phy)
3421 {
3422         this_controller->port_agent.link_down_handler(
3423                 this_controller, &this_controller->port_agent, port, phy
3424                 );
3425 }
3426
3427 /*
3428  * *****************************************************************************
3429  * * STOPPING STATE HANDLERS
3430  * ***************************************************************************** */
3431
3432 /**
3433  *
3434  * @controller: This is struct sci_base_controller object which is cast into a
3435  *    struct scic_sds_controller object.
3436  * @remote_device: This is struct sci_base_remote_device which is cast to a
3437  *    struct scic_sds_remote_device object.
3438  * @io_request: This is the struct sci_base_request which is cast to a
3439  *    SCIC_SDS_IO_REQUEST object.
3440  *
3441  * This method is called when the struct scic_sds_controller is in a stopping state
3442  * and the complete io handler is called. - This function is not yet
3443  * implemented enum sci_status SCI_FAILURE
3444  */
3445 static enum sci_status scic_sds_controller_stopping_state_complete_io_handler(
3446         struct sci_base_controller *controller,
3447         struct sci_base_remote_device *remote_device,
3448         struct sci_base_request *io_request)
3449 {
3450         struct scic_sds_controller *this_controller;
3451
3452         this_controller = (struct scic_sds_controller *)controller;
3453
3454         /* / @todo Implement this function */
3455         return SCI_FAILURE;
3456 }
3457
3458 /**
3459  *
3460  * @controller: This is struct sci_base_controller object which is cast into a
3461  *    struct scic_sds_controller object.
3462  * @remote_device: This is struct sci_base_remote_device which is cast to a
3463  *    struct scic_sds_remote_device object.
3464  * @io_request: This is the struct sci_base_request which is cast to a
3465  *    SCIC_SDS_IO_REQUEST object.
3466  *
3467  * This method is called when the struct scic_sds_controller is in a stopping state
3468  * and the complete task handler is called. - This function is not yet
3469  * implemented enum sci_status SCI_FAILURE
3470  */
3471
3472 /*
3473  * *****************************************************************************
3474  * * STOPPED STATE HANDLERS
3475  * ***************************************************************************** */
3476
3477 /*
3478  * *****************************************************************************
3479  * * FAILED STATE HANDLERS
3480  * ***************************************************************************** */
3481
3482 const struct scic_sds_controller_state_handler scic_sds_controller_state_handler_table[] = {
3483         [SCI_BASE_CONTROLLER_STATE_INITIAL] = {
3484                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3485                 .base.complete_io  = scic_sds_controller_default_request_handler,
3486                 .base.continue_io  = scic_sds_controller_default_request_handler,
3487                 .terminate_request = scic_sds_controller_default_request_handler,
3488         },
3489         [SCI_BASE_CONTROLLER_STATE_RESET] = {
3490                 .base.initialize   = scic_sds_controller_reset_state_initialize_handler,
3491                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3492                 .base.complete_io  = scic_sds_controller_default_request_handler,
3493                 .base.continue_io  = scic_sds_controller_default_request_handler,
3494                 .terminate_request = scic_sds_controller_default_request_handler,
3495         },
3496         [SCI_BASE_CONTROLLER_STATE_INITIALIZING] = {
3497                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3498                 .base.complete_io  = scic_sds_controller_default_request_handler,
3499                 .base.continue_io  = scic_sds_controller_default_request_handler,
3500                 .terminate_request = scic_sds_controller_default_request_handler,
3501         },
3502         [SCI_BASE_CONTROLLER_STATE_INITIALIZED] = {
3503                 .base.start        = scic_sds_controller_initialized_state_start_handler,
3504                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3505                 .base.complete_io  = scic_sds_controller_default_request_handler,
3506                 .base.continue_io  = scic_sds_controller_default_request_handler,
3507                 .terminate_request = scic_sds_controller_default_request_handler,
3508         },
3509         [SCI_BASE_CONTROLLER_STATE_STARTING] = {
3510                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3511                 .base.complete_io  = scic_sds_controller_default_request_handler,
3512                 .base.continue_io  = scic_sds_controller_default_request_handler,
3513                 .terminate_request = scic_sds_controller_default_request_handler,
3514                 .link_up           = scic_sds_controller_starting_state_link_up_handler,
3515                 .link_down         = scic_sds_controller_starting_state_link_down_handler
3516         },
3517         [SCI_BASE_CONTROLLER_STATE_READY] = {
3518                 .base.stop         = scic_sds_controller_ready_state_stop_handler,
3519                 .base.reset        = scic_sds_controller_general_reset_handler,
3520                 .base.start_io     = scic_sds_controller_ready_state_start_io_handler,
3521                 .base.complete_io  = scic_sds_controller_ready_state_complete_io_handler,
3522                 .base.continue_io  = scic_sds_controller_ready_state_continue_io_handler,
3523                 .base.start_task   = scic_sds_controller_ready_state_start_task_handler,
3524                 .base.complete_task = scic_sds_controller_ready_state_complete_io_handler,
3525                 .terminate_request = scic_sds_controller_ready_state_terminate_request_handler,
3526                 .link_up           = scic_sds_controller_ready_state_link_up_handler,
3527                 .link_down         = scic_sds_controller_ready_state_link_down_handler
3528         },
3529         [SCI_BASE_CONTROLLER_STATE_RESETTING] = {
3530                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3531                 .base.complete_io  = scic_sds_controller_default_request_handler,
3532                 .base.continue_io  = scic_sds_controller_default_request_handler,
3533                 .terminate_request = scic_sds_controller_default_request_handler,
3534         },
3535         [SCI_BASE_CONTROLLER_STATE_STOPPING] = {
3536                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3537                 .base.complete_io  = scic_sds_controller_stopping_state_complete_io_handler,
3538                 .base.continue_io  = scic_sds_controller_default_request_handler,
3539                 .terminate_request = scic_sds_controller_default_request_handler,
3540         },
3541         [SCI_BASE_CONTROLLER_STATE_STOPPED] = {
3542                 .base.reset        = scic_sds_controller_general_reset_handler,
3543                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3544                 .base.complete_io  = scic_sds_controller_default_request_handler,
3545                 .base.continue_io  = scic_sds_controller_default_request_handler,
3546                 .terminate_request = scic_sds_controller_default_request_handler,
3547         },
3548         [SCI_BASE_CONTROLLER_STATE_FAILED] = {
3549                 .base.reset        = scic_sds_controller_general_reset_handler,
3550                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3551                 .base.complete_io  = scic_sds_controller_default_request_handler,
3552                 .base.continue_io  = scic_sds_controller_default_request_handler,
3553                 .terminate_request = scic_sds_controller_default_request_handler,
3554         },
3555 };
3556
3557 /**
3558  *
3559  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3560  *    object.
3561  *
3562  * This method implements the actions taken by the struct scic_sds_controller on entry
3563  * to the SCI_BASE_CONTROLLER_STATE_INITIAL. - Set the state handlers to the
3564  * controllers initial state. none This function should initialze the
3565  * controller object.
3566  */
3567 static void scic_sds_controller_initial_state_enter(
3568         struct sci_base_object *object)
3569 {
3570         struct scic_sds_controller *this_controller;
3571
3572         this_controller = (struct scic_sds_controller *)object;
3573
3574         sci_base_state_machine_change_state(
3575                 &this_controller->parent.state_machine, SCI_BASE_CONTROLLER_STATE_RESET);
3576 }
3577
3578 /**
3579  *
3580  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3581  *    object.
3582  *
3583  * This method implements the actions taken by the struct scic_sds_controller on exit
3584  * from the SCI_BASE_CONTROLLER_STATE_STARTING. - This function stops the
3585  * controller starting timeout timer. none
3586  */
3587 static void scic_sds_controller_starting_state_exit(
3588         struct sci_base_object *object)
3589 {
3590         struct scic_sds_controller *scic = (struct scic_sds_controller *)object;
3591
3592         isci_event_timer_stop(scic, scic->timeout_timer);
3593 }
3594
3595 /**
3596  *
3597  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3598  *    object.
3599  *
3600  * This method implements the actions taken by the struct scic_sds_controller on entry
3601  * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the
3602  * controllers ready state. none
3603  */
3604 static void scic_sds_controller_ready_state_enter(
3605         struct sci_base_object *object)
3606 {
3607         struct scic_sds_controller *this_controller;
3608
3609         this_controller = (struct scic_sds_controller *)object;
3610
3611         /* set the default interrupt coalescence number and timeout value. */
3612         scic_controller_set_interrupt_coalescence(
3613                 this_controller, 0x10, 250);
3614 }
3615
3616 /**
3617  *
3618  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3619  *    object.
3620  *
3621  * This method implements the actions taken by the struct scic_sds_controller on exit
3622  * from the SCI_BASE_CONTROLLER_STATE_READY. - This function does nothing. none
3623  */
3624 static void scic_sds_controller_ready_state_exit(
3625         struct sci_base_object *object)
3626 {
3627         struct scic_sds_controller *this_controller;
3628
3629         this_controller = (struct scic_sds_controller *)object;
3630
3631         /* disable interrupt coalescence. */
3632         scic_controller_set_interrupt_coalescence(this_controller, 0, 0);
3633 }
3634
3635 /**
3636  *
3637  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3638  *    object.
3639  *
3640  * This method implements the actions taken by the struct scic_sds_controller on entry
3641  * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the
3642  * controllers ready state. - Stop the phys on this controller - Stop the ports
3643  * on this controller - Stop all of the remote devices on this controller none
3644  */
3645 static void scic_sds_controller_stopping_state_enter(
3646         struct sci_base_object *object)
3647 {
3648         struct scic_sds_controller *this_controller;
3649
3650         this_controller = (struct scic_sds_controller *)object;
3651
3652         /* Stop all of the components for this controller */
3653         scic_sds_controller_stop_phys(this_controller);
3654         scic_sds_controller_stop_ports(this_controller);
3655         scic_sds_controller_stop_devices(this_controller);
3656 }
3657
3658 /**
3659  *
3660  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3661  *    object.
3662  *
3663  * This method implements the actions taken by the struct scic_sds_controller on exit
3664  * from the SCI_BASE_CONTROLLER_STATE_STOPPING. - This function stops the
3665  * controller stopping timeout timer. none
3666  */
3667 static void scic_sds_controller_stopping_state_exit(
3668         struct sci_base_object *object)
3669 {
3670         struct scic_sds_controller *this_controller;
3671
3672         this_controller = (struct scic_sds_controller *)object;
3673
3674         isci_event_timer_stop(this_controller, this_controller->timeout_timer);
3675 }
3676
3677 /**
3678  *
3679  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3680  *    object.
3681  *
3682  * This method implements the actions taken by the struct scic_sds_controller on entry
3683  * to the SCI_BASE_CONTROLLER_STATE_RESETTING. - Set the state handlers to the
3684  * controllers resetting state. - Write to the SCU hardware reset register to
3685  * force a reset - Transition to the SCI_BASE_CONTROLLER_STATE_RESET none
3686  */
3687 static void scic_sds_controller_resetting_state_enter(
3688         struct sci_base_object *object)
3689 {
3690         struct scic_sds_controller *this_controller;
3691
3692         this_controller = (struct scic_sds_controller *)object;
3693
3694         scic_sds_controller_reset_hardware(this_controller);
3695
3696         sci_base_state_machine_change_state(
3697                 scic_sds_controller_get_base_state_machine(this_controller),
3698                 SCI_BASE_CONTROLLER_STATE_RESET
3699                 );
3700 }
3701
3702 /* --------------------------------------------------------------------------- */
3703
3704 const struct sci_base_state scic_sds_controller_state_table[] = {
3705         [SCI_BASE_CONTROLLER_STATE_INITIAL] = {
3706                 .enter_state = scic_sds_controller_initial_state_enter,
3707         },
3708         [SCI_BASE_CONTROLLER_STATE_RESET] = {},
3709         [SCI_BASE_CONTROLLER_STATE_INITIALIZING] = {},
3710         [SCI_BASE_CONTROLLER_STATE_INITIALIZED] = {},
3711         [SCI_BASE_CONTROLLER_STATE_STARTING] = {
3712                 .exit_state  = scic_sds_controller_starting_state_exit,
3713         },
3714         [SCI_BASE_CONTROLLER_STATE_READY] = {
3715                 .enter_state = scic_sds_controller_ready_state_enter,
3716                 .exit_state  = scic_sds_controller_ready_state_exit,
3717         },
3718         [SCI_BASE_CONTROLLER_STATE_RESETTING] = {
3719                 .enter_state = scic_sds_controller_resetting_state_enter,
3720         },
3721         [SCI_BASE_CONTROLLER_STATE_STOPPING] = {
3722                 .enter_state = scic_sds_controller_stopping_state_enter,
3723                 .exit_state = scic_sds_controller_stopping_state_exit,
3724         },
3725         [SCI_BASE_CONTROLLER_STATE_STOPPED] = {},
3726         [SCI_BASE_CONTROLLER_STATE_FAILED] = {}
3727 };
3728