1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __KVM_X86_VMX_VMCS_H
3 #define __KVM_X86_VMX_VMCS_H
5 #include <linux/ktime.h>
6 #include <linux/list.h>
7 #include <linux/nospec.h>
12 #include "capabilities.h"
25 DECLARE_PER_CPU(struct vmcs *, current_vmcs);
28 * vmcs_host_state tracks registers that are loaded from the VMCS on VMEXIT
29 * and whose values change infrequently, but are not constant. I.e. this is
30 * used as a write-through cache of the corresponding VMCS fields.
32 struct vmcs_host_state {
33 unsigned long cr3; /* May not match real cr3 */
34 unsigned long cr4; /* May not match real cr4 */
35 unsigned long gs_base;
36 unsigned long fs_base;
38 u16 fs_sel, gs_sel, ldt_sel;
45 * Track a VMCS that may be loaded on a certain CPU. If it is (cpu!=-1), also
46 * remember whether it was VMLAUNCHed, and maintain a linked list of all VMCSs
47 * loaded on this CPU (so we can clear them if the CPU goes down).
51 struct vmcs *shadow_vmcs;
54 bool nmi_known_unmasked;
56 /* Support for vnmi-less CPUs */
57 int soft_vnmi_blocked;
59 s64 vnmi_blocked_time;
60 unsigned long *msr_bitmap;
61 struct list_head loaded_vmcss_on_cpu_link;
62 struct vmcs_host_state host_state;
65 static inline bool is_exception_n(u32 intr_info, u8 vector)
67 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
68 INTR_INFO_VALID_MASK)) ==
69 (INTR_TYPE_HARD_EXCEPTION | vector | INTR_INFO_VALID_MASK);
72 static inline bool is_debug(u32 intr_info)
74 return is_exception_n(intr_info, DB_VECTOR);
77 static inline bool is_breakpoint(u32 intr_info)
79 return is_exception_n(intr_info, BP_VECTOR);
82 static inline bool is_page_fault(u32 intr_info)
84 return is_exception_n(intr_info, PF_VECTOR);
87 static inline bool is_invalid_opcode(u32 intr_info)
89 return is_exception_n(intr_info, UD_VECTOR);
92 static inline bool is_gp_fault(u32 intr_info)
94 return is_exception_n(intr_info, GP_VECTOR);
97 static inline bool is_machine_check(u32 intr_info)
99 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
100 INTR_INFO_VALID_MASK)) ==
101 (INTR_TYPE_HARD_EXCEPTION | MC_VECTOR | INTR_INFO_VALID_MASK);
104 /* Undocumented: icebp/int1 */
105 static inline bool is_icebp(u32 intr_info)
107 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
108 == (INTR_TYPE_PRIV_SW_EXCEPTION | INTR_INFO_VALID_MASK);
111 static inline bool is_nmi(u32 intr_info)
113 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
114 == (INTR_TYPE_NMI_INTR | INTR_INFO_VALID_MASK);
117 enum vmcs_field_width {
118 VMCS_FIELD_WIDTH_U16 = 0,
119 VMCS_FIELD_WIDTH_U64 = 1,
120 VMCS_FIELD_WIDTH_U32 = 2,
121 VMCS_FIELD_WIDTH_NATURAL_WIDTH = 3
124 static inline int vmcs_field_width(unsigned long field)
126 if (0x1 & field) /* the *_HIGH fields are all 32 bit */
127 return VMCS_FIELD_WIDTH_U32;
128 return (field >> 13) & 0x3;
131 static inline int vmcs_field_readonly(unsigned long field)
133 return (((field >> 10) & 0x3) == 1);
136 #endif /* __KVM_X86_VMX_VMCS_H */