2 * SPDX-License-Identifier: MIT
4 * Copyright © 2019 Intel Corporation
8 #include "i915_request.h"
10 #include "intel_context.h"
11 #include "intel_engine_heartbeat.h"
12 #include "intel_engine_pm.h"
13 #include "intel_engine.h"
15 #include "intel_reset.h"
18 * While the engine is active, we send a periodic pulse along the engine
19 * to check on its health and to flush any idle-barriers. If that request
20 * is stuck, and we fail to preempt it, we declare the engine hung and
21 * issue a reset -- in the hope that restores progress.
24 static bool next_heartbeat(struct intel_engine_cs *engine)
28 delay = READ_ONCE(engine->props.heartbeat_interval_ms);
32 delay = msecs_to_jiffies_timeout(delay);
34 delay = round_jiffies_up_relative(delay);
35 mod_delayed_work(system_highpri_wq, &engine->heartbeat.work, delay);
40 static struct i915_request *
41 heartbeat_create(struct intel_context *ce, gfp_t gfp)
43 struct i915_request *rq;
45 intel_context_enter(ce);
46 rq = __i915_request_create(ce, gfp);
47 intel_context_exit(ce);
52 static void idle_pulse(struct intel_engine_cs *engine, struct i915_request *rq)
54 engine->wakeref_serial = READ_ONCE(engine->serial) + 1;
55 i915_request_add_active_barriers(rq);
56 if (!engine->heartbeat.systole && intel_engine_has_heartbeat(engine))
57 engine->heartbeat.systole = i915_request_get(rq);
60 static void heartbeat_commit(struct i915_request *rq,
61 const struct i915_sched_attr *attr)
63 idle_pulse(rq->engine, rq);
65 __i915_request_commit(rq);
66 __i915_request_queue(rq, attr);
69 static void show_heartbeat(const struct i915_request *rq,
70 struct intel_engine_cs *engine)
72 struct drm_printer p = drm_debug_printer("heartbeat");
74 intel_engine_dump(engine, &p,
75 "%s heartbeat {seqno:%llx:%lld, prio:%d} not ticking\n",
79 rq->sched.attr.priority);
82 static void heartbeat(struct work_struct *wrk)
84 struct i915_sched_attr attr = {
85 .priority = I915_USER_PRIORITY(I915_PRIORITY_MIN),
87 struct intel_engine_cs *engine =
88 container_of(wrk, typeof(*engine), heartbeat.work.work);
89 struct intel_context *ce = engine->kernel_context;
90 struct i915_request *rq;
93 /* Just in case everything has gone horribly wrong, give it a kick */
94 intel_engine_flush_submission(engine);
96 rq = engine->heartbeat.systole;
97 if (rq && i915_request_completed(rq)) {
99 engine->heartbeat.systole = NULL;
102 if (!intel_engine_pm_get_if_awake(engine))
105 if (intel_gt_is_wedged(engine->gt))
108 if (engine->heartbeat.systole) {
109 if (!i915_sw_fence_signaled(&rq->submit)) {
111 * Not yet submitted, system is stalled.
113 * This more often happens for ring submission,
114 * where all contexts are funnelled into a common
115 * ringbuffer. If one context is blocked on an
116 * external fence, not only is it not submitted,
117 * but all other contexts, including the kernel
118 * context are stuck waiting for the signal.
120 } else if (engine->schedule &&
121 rq->sched.attr.priority < I915_PRIORITY_BARRIER) {
123 * Gradually raise the priority of the heartbeat to
124 * give high priority work [which presumably desires
125 * low latency and no jitter] the chance to naturally
126 * complete before being preempted.
128 attr.priority = I915_PRIORITY_MASK;
129 if (rq->sched.attr.priority >= attr.priority)
130 attr.priority |= I915_USER_PRIORITY(I915_PRIORITY_HEARTBEAT);
131 if (rq->sched.attr.priority >= attr.priority)
132 attr.priority = I915_PRIORITY_BARRIER;
135 engine->schedule(rq, &attr);
138 if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
139 show_heartbeat(rq, engine);
141 intel_gt_handle_error(engine->gt, engine->mask,
143 "stopped heartbeat on %s",
149 serial = READ_ONCE(engine->serial);
150 if (engine->wakeref_serial == serial)
153 if (!mutex_trylock(&ce->timeline->mutex)) {
154 /* Unable to lock the kernel timeline, is the engine stuck? */
155 if (xchg(&engine->heartbeat.blocked, serial) == serial)
156 intel_gt_handle_error(engine->gt, engine->mask,
158 "no heartbeat on %s",
163 rq = heartbeat_create(ce, GFP_NOWAIT | __GFP_NOWARN);
167 heartbeat_commit(rq, &attr);
170 mutex_unlock(&ce->timeline->mutex);
172 if (!engine->i915->params.enable_hangcheck || !next_heartbeat(engine))
173 i915_request_put(fetch_and_zero(&engine->heartbeat.systole));
174 intel_engine_pm_put(engine);
177 void intel_engine_unpark_heartbeat(struct intel_engine_cs *engine)
179 if (!IS_ACTIVE(CONFIG_DRM_I915_HEARTBEAT_INTERVAL))
182 next_heartbeat(engine);
185 void intel_engine_park_heartbeat(struct intel_engine_cs *engine)
187 if (cancel_delayed_work(&engine->heartbeat.work))
188 i915_request_put(fetch_and_zero(&engine->heartbeat.systole));
191 void intel_engine_init_heartbeat(struct intel_engine_cs *engine)
193 INIT_DELAYED_WORK(&engine->heartbeat.work, heartbeat);
196 static int __intel_engine_pulse(struct intel_engine_cs *engine)
198 struct i915_sched_attr attr = { .priority = I915_PRIORITY_BARRIER };
199 struct intel_context *ce = engine->kernel_context;
200 struct i915_request *rq;
202 lockdep_assert_held(&ce->timeline->mutex);
203 GEM_BUG_ON(!intel_engine_has_preemption(engine));
204 GEM_BUG_ON(!intel_engine_pm_is_awake(engine));
206 rq = heartbeat_create(ce, GFP_NOWAIT | __GFP_NOWARN);
210 __set_bit(I915_FENCE_FLAG_SENTINEL, &rq->fence.flags);
212 heartbeat_commit(rq, &attr);
213 GEM_BUG_ON(rq->sched.attr.priority < I915_PRIORITY_BARRIER);
218 static unsigned long set_heartbeat(struct intel_engine_cs *engine,
223 old = xchg(&engine->props.heartbeat_interval_ms, delay);
225 intel_engine_unpark_heartbeat(engine);
227 intel_engine_park_heartbeat(engine);
232 int intel_engine_set_heartbeat(struct intel_engine_cs *engine,
235 struct intel_context *ce = engine->kernel_context;
238 if (!delay && !intel_engine_has_preempt_reset(engine))
241 intel_engine_pm_get(engine);
243 err = mutex_lock_interruptible(&ce->timeline->mutex);
247 if (delay != engine->props.heartbeat_interval_ms) {
248 unsigned long saved = set_heartbeat(engine, delay);
250 /* recheck current execution */
251 if (intel_engine_has_preemption(engine)) {
252 err = __intel_engine_pulse(engine);
254 set_heartbeat(engine, saved);
258 mutex_unlock(&ce->timeline->mutex);
261 intel_engine_pm_put(engine);
265 int intel_engine_pulse(struct intel_engine_cs *engine)
267 struct intel_context *ce = engine->kernel_context;
270 if (!intel_engine_has_preemption(engine))
273 if (!intel_engine_pm_get_if_awake(engine))
277 if (!mutex_lock_interruptible(&ce->timeline->mutex)) {
278 err = __intel_engine_pulse(engine);
279 mutex_unlock(&ce->timeline->mutex);
282 intel_engine_pm_put(engine);
286 int intel_engine_flush_barriers(struct intel_engine_cs *engine)
288 struct i915_sched_attr attr = {
289 .priority = I915_USER_PRIORITY(I915_PRIORITY_MIN),
291 struct intel_context *ce = engine->kernel_context;
292 struct i915_request *rq;
295 if (llist_empty(&engine->barrier_tasks))
298 if (!intel_engine_pm_get_if_awake(engine))
301 if (mutex_lock_interruptible(&ce->timeline->mutex)) {
306 rq = heartbeat_create(ce, GFP_KERNEL);
312 heartbeat_commit(rq, &attr);
316 mutex_unlock(&ce->timeline->mutex);
318 intel_engine_pm_put(engine);
322 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
323 #include "selftest_engine_heartbeat.c"