1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 - ARM Ltd
7 #include <linux/arm-smccc.h>
8 #include <linux/preempt.h>
9 #include <linux/kvm_host.h>
10 #include <linux/uaccess.h>
11 #include <linux/wait.h>
13 #include <asm/cputype.h>
14 #include <asm/kvm_emulate.h>
16 #include <kvm/arm_psci.h>
17 #include <kvm/arm_hypercalls.h>
20 * This is an implementation of the Power State Coordination Interface
21 * as described in ARM document number ARM DEN 0022A.
24 #define AFFINITY_MASK(level) ~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1)
26 static unsigned long psci_affinity_mask(unsigned long affinity_level)
28 if (affinity_level <= 3)
29 return MPIDR_HWID_BITMASK & AFFINITY_MASK(affinity_level);
34 static unsigned long kvm_psci_vcpu_suspend(struct kvm_vcpu *vcpu)
37 * NOTE: For simplicity, we make VCPU suspend emulation to be
38 * same-as WFI (Wait-for-interrupt) emulation.
40 * This means for KVM the wakeup events are interrupts and
41 * this is consistent with intended use of StateID as described
42 * in section 5.4.1 of PSCI v0.2 specification (ARM DEN 0022A).
44 * Further, we also treat power-down request to be same as
45 * stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2
46 * specification (ARM DEN 0022A). This means all suspend states
47 * for KVM will preserve the register state.
50 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
52 return PSCI_RET_SUCCESS;
55 static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
57 vcpu->arch.power_off = true;
58 kvm_make_request(KVM_REQ_SLEEP, vcpu);
62 static inline bool kvm_psci_valid_affinity(struct kvm_vcpu *vcpu,
63 unsigned long affinity)
65 return !(affinity & ~MPIDR_HWID_BITMASK);
68 static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
70 struct vcpu_reset_state *reset_state;
71 struct kvm *kvm = source_vcpu->kvm;
72 struct kvm_vcpu *vcpu = NULL;
75 cpu_id = smccc_get_arg1(source_vcpu);
76 if (!kvm_psci_valid_affinity(source_vcpu, cpu_id))
77 return PSCI_RET_INVALID_PARAMS;
79 vcpu = kvm_mpidr_to_vcpu(kvm, cpu_id);
82 * Make sure the caller requested a valid CPU and that the CPU is
86 return PSCI_RET_INVALID_PARAMS;
87 if (!vcpu->arch.power_off) {
88 if (kvm_psci_version(source_vcpu, kvm) != KVM_ARM_PSCI_0_1)
89 return PSCI_RET_ALREADY_ON;
91 return PSCI_RET_INVALID_PARAMS;
94 reset_state = &vcpu->arch.reset_state;
96 reset_state->pc = smccc_get_arg2(source_vcpu);
98 /* Propagate caller endianness */
99 reset_state->be = kvm_vcpu_is_be(source_vcpu);
102 * NOTE: We always update r0 (or x0) because for PSCI v0.1
103 * the general purpose registers are undefined upon CPU_ON.
105 reset_state->r0 = smccc_get_arg3(source_vcpu);
107 WRITE_ONCE(reset_state->reset, true);
108 kvm_make_request(KVM_REQ_VCPU_RESET, vcpu);
111 * Make sure the reset request is observed if the change to
112 * power_off is observed.
116 vcpu->arch.power_off = false;
117 kvm_vcpu_wake_up(vcpu);
119 return PSCI_RET_SUCCESS;
122 static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
124 int matching_cpus = 0;
125 unsigned long i, mpidr;
126 unsigned long target_affinity;
127 unsigned long target_affinity_mask;
128 unsigned long lowest_affinity_level;
129 struct kvm *kvm = vcpu->kvm;
130 struct kvm_vcpu *tmp;
132 target_affinity = smccc_get_arg1(vcpu);
133 lowest_affinity_level = smccc_get_arg2(vcpu);
135 if (!kvm_psci_valid_affinity(vcpu, target_affinity))
136 return PSCI_RET_INVALID_PARAMS;
138 /* Determine target affinity mask */
139 target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
140 if (!target_affinity_mask)
141 return PSCI_RET_INVALID_PARAMS;
143 /* Ignore other bits of target affinity */
144 target_affinity &= target_affinity_mask;
147 * If one or more VCPU matching target affinity are running
150 kvm_for_each_vcpu(i, tmp, kvm) {
151 mpidr = kvm_vcpu_get_mpidr_aff(tmp);
152 if ((mpidr & target_affinity_mask) == target_affinity) {
154 if (!tmp->arch.power_off)
155 return PSCI_0_2_AFFINITY_LEVEL_ON;
160 return PSCI_RET_INVALID_PARAMS;
162 return PSCI_0_2_AFFINITY_LEVEL_OFF;
165 static void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type)
168 struct kvm_vcpu *tmp;
171 * The KVM ABI specifies that a system event exit may call KVM_RUN
172 * again and may perform shutdown/reboot at a later time that when the
173 * actual request is made. Since we are implementing PSCI and a
174 * caller of PSCI reboot and shutdown expects that the system shuts
175 * down or reboots immediately, let's make sure that VCPUs are not run
176 * after this call is handled and before the VCPUs have been
179 kvm_for_each_vcpu(i, tmp, vcpu->kvm)
180 tmp->arch.power_off = true;
181 kvm_make_all_cpus_request(vcpu->kvm, KVM_REQ_SLEEP);
183 memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event));
184 vcpu->run->system_event.type = type;
185 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
188 static void kvm_psci_system_off(struct kvm_vcpu *vcpu)
190 kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_SHUTDOWN);
193 static void kvm_psci_system_reset(struct kvm_vcpu *vcpu)
195 kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET);
198 static void kvm_psci_narrow_to_32bit(struct kvm_vcpu *vcpu)
203 * Zero the input registers' upper 32 bits. They will be fully
204 * zeroed on exit, so we're fine changing them in place.
206 for (i = 1; i < 4; i++)
207 vcpu_set_reg(vcpu, i, lower_32_bits(vcpu_get_reg(vcpu, i)));
210 static unsigned long kvm_psci_check_allowed_function(struct kvm_vcpu *vcpu, u32 fn)
213 case PSCI_0_2_FN64_CPU_SUSPEND:
214 case PSCI_0_2_FN64_CPU_ON:
215 case PSCI_0_2_FN64_AFFINITY_INFO:
216 /* Disallow these functions for 32bit guests */
217 if (vcpu_mode_is_32bit(vcpu))
218 return PSCI_RET_NOT_SUPPORTED;
225 static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
227 struct kvm *kvm = vcpu->kvm;
228 u32 psci_fn = smccc_get_function(vcpu);
232 val = kvm_psci_check_allowed_function(vcpu, psci_fn);
237 case PSCI_0_2_FN_PSCI_VERSION:
239 * Bits[31:16] = Major Version = 0
240 * Bits[15:0] = Minor Version = 2
242 val = KVM_ARM_PSCI_0_2;
244 case PSCI_0_2_FN_CPU_SUSPEND:
245 case PSCI_0_2_FN64_CPU_SUSPEND:
246 val = kvm_psci_vcpu_suspend(vcpu);
248 case PSCI_0_2_FN_CPU_OFF:
249 kvm_psci_vcpu_off(vcpu);
250 val = PSCI_RET_SUCCESS;
252 case PSCI_0_2_FN_CPU_ON:
253 kvm_psci_narrow_to_32bit(vcpu);
255 case PSCI_0_2_FN64_CPU_ON:
256 mutex_lock(&kvm->lock);
257 val = kvm_psci_vcpu_on(vcpu);
258 mutex_unlock(&kvm->lock);
260 case PSCI_0_2_FN_AFFINITY_INFO:
261 kvm_psci_narrow_to_32bit(vcpu);
263 case PSCI_0_2_FN64_AFFINITY_INFO:
264 val = kvm_psci_vcpu_affinity_info(vcpu);
266 case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
268 * Trusted OS is MP hence does not require migration
270 * Trusted OS is not present
272 val = PSCI_0_2_TOS_MP;
274 case PSCI_0_2_FN_SYSTEM_OFF:
275 kvm_psci_system_off(vcpu);
277 * We shouldn't be going back to guest VCPU after
278 * receiving SYSTEM_OFF request.
280 * If user space accidentally/deliberately resumes
281 * guest VCPU after SYSTEM_OFF request then guest
282 * VCPU should see internal failure from PSCI return
283 * value. To achieve this, we preload r0 (or x0) with
284 * PSCI return value INTERNAL_FAILURE.
286 val = PSCI_RET_INTERNAL_FAILURE;
289 case PSCI_0_2_FN_SYSTEM_RESET:
290 kvm_psci_system_reset(vcpu);
292 * Same reason as SYSTEM_OFF for preloading r0 (or x0)
293 * with PSCI return value INTERNAL_FAILURE.
295 val = PSCI_RET_INTERNAL_FAILURE;
299 val = PSCI_RET_NOT_SUPPORTED;
304 smccc_set_retval(vcpu, val, 0, 0, 0);
308 static int kvm_psci_1_0_call(struct kvm_vcpu *vcpu)
310 u32 psci_fn = smccc_get_function(vcpu);
316 case PSCI_0_2_FN_PSCI_VERSION:
317 val = KVM_ARM_PSCI_1_0;
319 case PSCI_1_0_FN_PSCI_FEATURES:
320 feature = smccc_get_arg1(vcpu);
321 val = kvm_psci_check_allowed_function(vcpu, feature);
326 case PSCI_0_2_FN_PSCI_VERSION:
327 case PSCI_0_2_FN_CPU_SUSPEND:
328 case PSCI_0_2_FN64_CPU_SUSPEND:
329 case PSCI_0_2_FN_CPU_OFF:
330 case PSCI_0_2_FN_CPU_ON:
331 case PSCI_0_2_FN64_CPU_ON:
332 case PSCI_0_2_FN_AFFINITY_INFO:
333 case PSCI_0_2_FN64_AFFINITY_INFO:
334 case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
335 case PSCI_0_2_FN_SYSTEM_OFF:
336 case PSCI_0_2_FN_SYSTEM_RESET:
337 case PSCI_1_0_FN_PSCI_FEATURES:
338 case ARM_SMCCC_VERSION_FUNC_ID:
342 val = PSCI_RET_NOT_SUPPORTED;
347 return kvm_psci_0_2_call(vcpu);
350 smccc_set_retval(vcpu, val, 0, 0, 0);
354 static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
356 struct kvm *kvm = vcpu->kvm;
357 u32 psci_fn = smccc_get_function(vcpu);
361 case KVM_PSCI_FN_CPU_OFF:
362 kvm_psci_vcpu_off(vcpu);
363 val = PSCI_RET_SUCCESS;
365 case KVM_PSCI_FN_CPU_ON:
366 mutex_lock(&kvm->lock);
367 val = kvm_psci_vcpu_on(vcpu);
368 mutex_unlock(&kvm->lock);
371 val = PSCI_RET_NOT_SUPPORTED;
375 smccc_set_retval(vcpu, val, 0, 0, 0);
380 * kvm_psci_call - handle PSCI call if r0 value is in range
381 * @vcpu: Pointer to the VCPU struct
383 * Handle PSCI calls from guests through traps from HVC instructions.
384 * The calling convention is similar to SMC calls to the secure world
385 * where the function number is placed in r0.
387 * This function returns: > 0 (success), 0 (success but exit to user
388 * space), and < 0 (errors)
391 * -EINVAL: Unrecognized PSCI function
393 int kvm_psci_call(struct kvm_vcpu *vcpu)
395 switch (kvm_psci_version(vcpu, vcpu->kvm)) {
396 case KVM_ARM_PSCI_1_0:
397 return kvm_psci_1_0_call(vcpu);
398 case KVM_ARM_PSCI_0_2:
399 return kvm_psci_0_2_call(vcpu);
400 case KVM_ARM_PSCI_0_1:
401 return kvm_psci_0_1_call(vcpu);
407 int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu)
409 return 4; /* PSCI version and three workaround registers */
412 int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
414 if (put_user(KVM_REG_ARM_PSCI_VERSION, uindices++))
417 if (put_user(KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1, uindices++))
420 if (put_user(KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2, uindices++))
423 if (put_user(KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3, uindices++))
429 #define KVM_REG_FEATURE_LEVEL_WIDTH 4
430 #define KVM_REG_FEATURE_LEVEL_MASK (BIT(KVM_REG_FEATURE_LEVEL_WIDTH) - 1)
433 * Convert the workaround level into an easy-to-compare number, where higher
434 * values mean better protection.
436 static int get_kernel_wa_level(u64 regid)
439 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
440 switch (arm64_get_spectre_v2_state()) {
441 case SPECTRE_VULNERABLE:
442 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL;
443 case SPECTRE_MITIGATED:
444 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL;
445 case SPECTRE_UNAFFECTED:
446 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED;
448 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL;
449 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
450 switch (arm64_get_spectre_v4_state()) {
451 case SPECTRE_MITIGATED:
453 * As for the hypercall discovery, we pretend we
454 * don't have any FW mitigation if SSBS is there at
457 if (cpus_have_final_cap(ARM64_SSBS))
458 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
460 case SPECTRE_UNAFFECTED:
461 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED;
462 case SPECTRE_VULNERABLE:
463 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
466 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
467 switch (arm64_get_spectre_bhb_state()) {
468 case SPECTRE_VULNERABLE:
469 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL;
470 case SPECTRE_MITIGATED:
471 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_AVAIL;
472 case SPECTRE_UNAFFECTED:
473 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_REQUIRED;
475 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL;
481 int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
483 void __user *uaddr = (void __user *)(long)reg->addr;
487 case KVM_REG_ARM_PSCI_VERSION:
488 val = kvm_psci_version(vcpu, vcpu->kvm);
490 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
491 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
492 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
493 val = get_kernel_wa_level(reg->id) & KVM_REG_FEATURE_LEVEL_MASK;
499 if (copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)))
505 int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
507 void __user *uaddr = (void __user *)(long)reg->addr;
511 if (copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id)))
515 case KVM_REG_ARM_PSCI_VERSION:
519 wants_02 = test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features);
522 case KVM_ARM_PSCI_0_1:
525 vcpu->kvm->arch.psci_version = val;
527 case KVM_ARM_PSCI_0_2:
528 case KVM_ARM_PSCI_1_0:
531 vcpu->kvm->arch.psci_version = val;
537 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
538 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
539 if (val & ~KVM_REG_FEATURE_LEVEL_MASK)
542 if (get_kernel_wa_level(reg->id) < val)
547 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
548 if (val & ~(KVM_REG_FEATURE_LEVEL_MASK |
549 KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED))
552 /* The enabled bit must not be set unless the level is AVAIL. */
553 if ((val & KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED) &&
554 (val & KVM_REG_FEATURE_LEVEL_MASK) != KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL)
558 * Map all the possible incoming states to the only two we
559 * really want to deal with.
561 switch (val & KVM_REG_FEATURE_LEVEL_MASK) {
562 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL:
563 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN:
564 wa_level = KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
566 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL:
567 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED:
568 wa_level = KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED;
575 * We can deal with NOT_AVAIL on NOT_REQUIRED, but not the
578 if (get_kernel_wa_level(reg->id) < wa_level)