drivers/rtc/rtc-sh.c

   1 /*
   2  * SuperH On-Chip RTC Support
   3  *
   4  * Copyright (C) 2006 - 2009  Paul Mundt
   5  * Copyright (C) 2006  Jamie Lenehan
   6  * Copyright (C) 2008  Angelo Castello
   7  *
   8  * Based on the old arch/sh/kernel/cpu/rtc.c by:
   9  *
  10  *  Copyright (C) 2000  Philipp Rumpf <[email protected]>
  11  *  Copyright (C) 1999  Tetsuya Okada & Niibe Yutaka
  12  *
  13  * This file is subject to the terms and conditions of the GNU General Public
  14  * License.  See the file "COPYING" in the main directory of this archive
  15  * for more details.
  16  */
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/bcd.h>
  20 #include <linux/rtc.h>
  21 #include <linux/init.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/seq_file.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/spinlock.h>
  26 #include <linux/io.h>
  27 #include <linux/log2.h>
  28 #include <linux/clk.h>
  29 #include <linux/slab.h>
  30 #ifdef CONFIG_SUPERH
  31 #include <asm/rtc.h>
  32 #else
  33 /* Default values for RZ/A RTC */
  34 #define rtc_reg_size            sizeof(u16)
  35 #define RTC_BIT_INVERTED        0       /* no chip bugs */
  36 #define RTC_CAP_4_DIGIT_YEAR    (1 << 0)
  37 #define RTC_DEF_CAPABILITIES    RTC_CAP_4_DIGIT_YEAR
  38 #endif
  39
  40 #define DRV_NAME        "sh-rtc"
  41
  42 #define RTC_REG(r)      ((r) * rtc_reg_size)
  43
  44 #define R64CNT          RTC_REG(0)
  45
  46 #define RSECCNT         RTC_REG(1)      /* RTC sec */
  47 #define RMINCNT         RTC_REG(2)      /* RTC min */
  48 #define RHRCNT          RTC_REG(3)      /* RTC hour */
  49 #define RWKCNT          RTC_REG(4)      /* RTC week */
  50 #define RDAYCNT         RTC_REG(5)      /* RTC day */
  51 #define RMONCNT         RTC_REG(6)      /* RTC month */
  52 #define RYRCNT          RTC_REG(7)      /* RTC year */
  53 #define RSECAR          RTC_REG(8)      /* ALARM sec */
  54 #define RMINAR          RTC_REG(9)      /* ALARM min */
  55 #define RHRAR           RTC_REG(10)     /* ALARM hour */
  56 #define RWKAR           RTC_REG(11)     /* ALARM week */
  57 #define RDAYAR          RTC_REG(12)     /* ALARM day */
  58 #define RMONAR          RTC_REG(13)     /* ALARM month */
  59 #define RCR1            RTC_REG(14)     /* Control */
  60 #define RCR2            RTC_REG(15)     /* Control */
  61
  62 /*
  63  * Note on RYRAR and RCR3: Up until this point most of the register
  64  * definitions are consistent across all of the available parts. However,
  65  * the placement of the optional RYRAR and RCR3 (the RYRAR control
  66  * register used to control RYRCNT/RYRAR compare) varies considerably
  67  * across various parts, occasionally being mapped in to a completely
  68  * unrelated address space. For proper RYRAR support a separate resource
  69  * would have to be handed off, but as this is purely optional in
  70  * practice, we simply opt not to support it, thereby keeping the code
  71  * quite a bit more simplified.
  72  */
  73
  74 /* ALARM Bits - or with BCD encoded value */
  75 #define AR_ENB          0x80    /* Enable for alarm cmp   */
  76
  77 /* Period Bits */
  78 #define PF_HP           0x100   /* Enable Half Period to support 8,32,128Hz */
  79 #define PF_COUNT        0x200   /* Half periodic counter */
  80 #define PF_OXS          0x400   /* Periodic One x Second */
  81 #define PF_KOU          0x800   /* Kernel or User periodic request 1=kernel */
  82 #define PF_MASK         0xf00
  83
  84 /* RCR1 Bits */
  85 #define RCR1_CF         0x80    /* Carry Flag             */
  86 #define RCR1_CIE        0x10    /* Carry Interrupt Enable */
  87 #define RCR1_AIE        0x08    /* Alarm Interrupt Enable */
  88 #define RCR1_AF         0x01    /* Alarm Flag             */
  89
  90 /* RCR2 Bits */
  91 #define RCR2_PEF        0x80    /* PEriodic interrupt Flag */
  92 #define RCR2_PESMASK    0x70    /* Periodic interrupt Set  */
  93 #define RCR2_RTCEN      0x08    /* ENable RTC              */
  94 #define RCR2_ADJ        0x04    /* ADJustment (30-second)  */
  95 #define RCR2_RESET      0x02    /* Reset bit               */
  96 #define RCR2_START      0x01    /* Start bit               */
  97
  98 struct sh_rtc {
  99         void __iomem            *regbase;
 100         unsigned long           regsize;
 101         struct resource         *res;
 102         int                     alarm_irq;
 103         int                     periodic_irq;
 104         int                     carry_irq;
 105         struct clk              *clk;
 106         struct rtc_device       *rtc_dev;
 107         spinlock_t              lock;
 108         unsigned long           capabilities;   /* See asm/rtc.h for cap bits */
 109         unsigned short          periodic_freq;
 110 };
 111
 112 static int __sh_rtc_interrupt(struct sh_rtc *rtc)
 113 {
 114         unsigned int tmp, pending;
 115
 116         tmp = readb(rtc->regbase + RCR1);
 117         pending = tmp & RCR1_CF;
 118         tmp &= ~RCR1_CF;
 119         writeb(tmp, rtc->regbase + RCR1);
 120
 121         /* Users have requested One x Second IRQ */
 122         if (pending && rtc->periodic_freq & PF_OXS)
 123                 rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
 124
 125         return pending;
 126 }
 127
 128 static int __sh_rtc_alarm(struct sh_rtc *rtc)
 129 {
 130         unsigned int tmp, pending;
 131
 132         tmp = readb(rtc->regbase + RCR1);
 133         pending = tmp & RCR1_AF;
 134         tmp &= ~(RCR1_AF | RCR1_AIE);
 135         writeb(tmp, rtc->regbase + RCR1);
 136
 137         if (pending)
 138                 rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
 139
 140         return pending;
 141 }
 142
 143 static int __sh_rtc_periodic(struct sh_rtc *rtc)
 144 {
 145         struct rtc_device *rtc_dev = rtc->rtc_dev;
 146         struct rtc_task *irq_task;
 147         unsigned int tmp, pending;
 148
 149         tmp = readb(rtc->regbase + RCR2);
 150         pending = tmp & RCR2_PEF;
 151         tmp &= ~RCR2_PEF;
 152         writeb(tmp, rtc->regbase + RCR2);
 153
 154         if (!pending)
 155                 return 0;
 156
 157         /* Half period enabled than one skipped and the next notified */
 158         if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT))
 159                 rtc->periodic_freq &= ~PF_COUNT;
 160         else {
 161                 if (rtc->periodic_freq & PF_HP)
 162                         rtc->periodic_freq |= PF_COUNT;
 163                 if (rtc->periodic_freq & PF_KOU) {
 164                         spin_lock(&rtc_dev->irq_task_lock);
 165                         irq_task = rtc_dev->irq_task;
 166                         if (irq_task)
 167                                 irq_task->func(irq_task->private_data);
 168                         spin_unlock(&rtc_dev->irq_task_lock);
 169                 } else
 170                         rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF);
 171         }
 172
 173         return pending;
 174 }
 175
 176 static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
 177 {
 178         struct sh_rtc *rtc = dev_id;
 179         int ret;
 180
 181         spin_lock(&rtc->lock);
 182         ret = __sh_rtc_interrupt(rtc);
 183         spin_unlock(&rtc->lock);
 184
 185         return IRQ_RETVAL(ret);
 186 }
 187
 188 static irqreturn_t sh_rtc_alarm(int irq, void *dev_id)
 189 {
 190         struct sh_rtc *rtc = dev_id;
 191         int ret;
 192
 193         spin_lock(&rtc->lock);
 194         ret = __sh_rtc_alarm(rtc);
 195         spin_unlock(&rtc->lock);
 196
 197         return IRQ_RETVAL(ret);
 198 }
 199
 200 static irqreturn_t sh_rtc_periodic(int irq, void *dev_id)
 201 {
 202         struct sh_rtc *rtc = dev_id;
 203         int ret;
 204
 205         spin_lock(&rtc->lock);
 206         ret = __sh_rtc_periodic(rtc);
 207         spin_unlock(&rtc->lock);
 208
 209         return IRQ_RETVAL(ret);
 210 }
 211
 212 static irqreturn_t sh_rtc_shared(int irq, void *dev_id)
 213 {
 214         struct sh_rtc *rtc = dev_id;
 215         int ret;
 216
 217         spin_lock(&rtc->lock);
 218         ret = __sh_rtc_interrupt(rtc);
 219         ret |= __sh_rtc_alarm(rtc);
 220         ret |= __sh_rtc_periodic(rtc);
 221         spin_unlock(&rtc->lock);
 222
 223         return IRQ_RETVAL(ret);
 224 }
 225
 226 static int sh_rtc_irq_set_state(struct device *dev, int enable)
 227 {
 228         struct sh_rtc *rtc = dev_get_drvdata(dev);
 229         unsigned int tmp;
 230
 231         spin_lock_irq(&rtc->lock);
 232
 233         tmp = readb(rtc->regbase + RCR2);
 234
 235         if (enable) {
 236                 rtc->periodic_freq |= PF_KOU;
 237                 tmp &= ~RCR2_PEF;       /* Clear PES bit */
 238                 tmp |= (rtc->periodic_freq & ~PF_HP);   /* Set PES2-0 */
 239         } else {
 240                 rtc->periodic_freq &= ~PF_KOU;
 241                 tmp &= ~(RCR2_PESMASK | RCR2_PEF);
 242         }
 243
 244         writeb(tmp, rtc->regbase + RCR2);
 245
 246         spin_unlock_irq(&rtc->lock);
 247
 248         return 0;
 249 }
 250
 251 static int sh_rtc_irq_set_freq(struct device *dev, int freq)
 252 {
 253         struct sh_rtc *rtc = dev_get_drvdata(dev);
 254         int tmp, ret = 0;
 255
 256         spin_lock_irq(&rtc->lock);
 257         tmp = rtc->periodic_freq & PF_MASK;
 258
 259         switch (freq) {
 260         case 0:
 261                 rtc->periodic_freq = 0x00;
 262                 break;
 263         case 1:
 264                 rtc->periodic_freq = 0x60;
 265                 break;
 266         case 2:
 267                 rtc->periodic_freq = 0x50;
 268                 break;
 269         case 4:
 270                 rtc->periodic_freq = 0x40;
 271                 break;
 272         case 8:
 273                 rtc->periodic_freq = 0x30 | PF_HP;
 274                 break;
 275         case 16:
 276                 rtc->periodic_freq = 0x30;
 277                 break;
 278         case 32:
 279                 rtc->periodic_freq = 0x20 | PF_HP;
 280                 break;
 281         case 64:
 282                 rtc->periodic_freq = 0x20;
 283                 break;
 284         case 128:
 285                 rtc->periodic_freq = 0x10 | PF_HP;
 286                 break;
 287         case 256:
 288                 rtc->periodic_freq = 0x10;
 289                 break;
 290         default:
 291                 ret = -ENOTSUPP;
 292         }
 293
 294         if (ret == 0)
 295                 rtc->periodic_freq |= tmp;
 296
 297         spin_unlock_irq(&rtc->lock);
 298         return ret;
 299 }
 300
 301 static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
 302 {
 303         struct sh_rtc *rtc = dev_get_drvdata(dev);
 304         unsigned int tmp;
 305
 306         spin_lock_irq(&rtc->lock);
 307
 308         tmp = readb(rtc->regbase + RCR1);
 309
 310         if (enable)
 311                 tmp |= RCR1_AIE;
 312         else
 313                 tmp &= ~RCR1_AIE;
 314
 315         writeb(tmp, rtc->regbase + RCR1);
 316
 317         spin_unlock_irq(&rtc->lock);
 318 }
 319
 320 static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
 321 {
 322         struct sh_rtc *rtc = dev_get_drvdata(dev);
 323         unsigned int tmp;
 324
 325         tmp = readb(rtc->regbase + RCR1);
 326         seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no");
 327
 328         tmp = readb(rtc->regbase + RCR2);
 329         seq_printf(seq, "periodic_IRQ\t: %s\n",
 330                    (tmp & RCR2_PESMASK) ? "yes" : "no");
 331
 332         return 0;
 333 }
 334
 335 static inline void sh_rtc_setcie(struct device *dev, unsigned int enable)
 336 {
 337         struct sh_rtc *rtc = dev_get_drvdata(dev);
 338         unsigned int tmp;
 339
 340         spin_lock_irq(&rtc->lock);
 341
 342         tmp = readb(rtc->regbase + RCR1);
 343
 344         if (!enable)
 345                 tmp &= ~RCR1_CIE;
 346         else
 347                 tmp |= RCR1_CIE;
 348
 349         writeb(tmp, rtc->regbase + RCR1);
 350
 351         spin_unlock_irq(&rtc->lock);
 352 }
 353
 354 static int sh_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 355 {
 356         sh_rtc_setaie(dev, enabled);
 357         return 0;
 358 }
 359
 360 static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm)
 361 {
 362         struct sh_rtc *rtc = dev_get_drvdata(dev);
 363         unsigned int sec128, sec2, yr, yr100, cf_bit;
 364
 365         do {
 366                 unsigned int tmp;
 367
 368                 spin_lock_irq(&rtc->lock);
 369
 370                 tmp = readb(rtc->regbase + RCR1);
 371                 tmp &= ~RCR1_CF; /* Clear CF-bit */
 372                 tmp |= RCR1_CIE;
 373                 writeb(tmp, rtc->regbase + RCR1);
 374
 375                 sec128 = readb(rtc->regbase + R64CNT);
 376
 377                 tm->tm_sec      = bcd2bin(readb(rtc->regbase + RSECCNT));
 378                 tm->tm_min      = bcd2bin(readb(rtc->regbase + RMINCNT));
 379                 tm->tm_hour     = bcd2bin(readb(rtc->regbase + RHRCNT));
 380                 tm->tm_wday     = bcd2bin(readb(rtc->regbase + RWKCNT));
 381                 tm->tm_mday     = bcd2bin(readb(rtc->regbase + RDAYCNT));
 382                 tm->tm_mon      = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1;
 383
 384                 if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
 385                         yr  = readw(rtc->regbase + RYRCNT);
 386                         yr100 = bcd2bin(yr >> 8);
 387                         yr &= 0xff;
 388                 } else {
 389                         yr  = readb(rtc->regbase + RYRCNT);
 390                         yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20);
 391                 }
 392
 393                 tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900;
 394
 395                 sec2 = readb(rtc->regbase + R64CNT);
 396                 cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF;
 397
 398                 spin_unlock_irq(&rtc->lock);
 399         } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
 400
 401 #if RTC_BIT_INVERTED != 0
 402         if ((sec128 & RTC_BIT_INVERTED))
 403                 tm->tm_sec--;
 404 #endif
 405
 406         /* only keep the carry interrupt enabled if UIE is on */
 407         if (!(rtc->periodic_freq & PF_OXS))
 408                 sh_rtc_setcie(dev, 0);
 409
 410         dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
 411                 "mday=%d, mon=%d, year=%d, wday=%d\n",
 412                 __func__,
 413                 tm->tm_sec, tm->tm_min, tm->tm_hour,
 414                 tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
 415
 416         return 0;
 417 }
 418
 419 static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
 420 {
 421         struct sh_rtc *rtc = dev_get_drvdata(dev);
 422         unsigned int tmp;
 423         int year;
 424
 425         spin_lock_irq(&rtc->lock);
 426
 427         /* Reset pre-scaler & stop RTC */
 428         tmp = readb(rtc->regbase + RCR2);
 429         tmp |= RCR2_RESET;
 430         tmp &= ~RCR2_START;
 431         writeb(tmp, rtc->regbase + RCR2);
 432
 433         writeb(bin2bcd(tm->tm_sec),  rtc->regbase + RSECCNT);
 434         writeb(bin2bcd(tm->tm_min),  rtc->regbase + RMINCNT);
 435         writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT);
 436         writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT);
 437         writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT);
 438         writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT);
 439
 440         if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
 441                 year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) |
 442                         bin2bcd(tm->tm_year % 100);
 443                 writew(year, rtc->regbase + RYRCNT);
 444         } else {
 445                 year = tm->tm_year % 100;
 446                 writeb(bin2bcd(year), rtc->regbase + RYRCNT);
 447         }
 448
 449         /* Start RTC */
 450         tmp = readb(rtc->regbase + RCR2);
 451         tmp &= ~RCR2_RESET;
 452         tmp |= RCR2_RTCEN | RCR2_START;
 453         writeb(tmp, rtc->regbase + RCR2);
 454
 455         spin_unlock_irq(&rtc->lock);
 456
 457         return 0;
 458 }
 459
 460 static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off)
 461 {
 462         unsigned int byte;
 463         int value = 0xff;       /* return 0xff for ignored values */
 464
 465         byte = readb(rtc->regbase + reg_off);
 466         if (byte & AR_ENB) {
 467                 byte &= ~AR_ENB;        /* strip the enable bit */
 468                 value = bcd2bin(byte);
 469         }
 470
 471         return value;
 472 }
 473
 474 static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
 475 {
 476         struct sh_rtc *rtc = dev_get_drvdata(dev);
 477         struct rtc_time *tm = &wkalrm->time;
 478
 479         spin_lock_irq(&rtc->lock);
 480
 481         tm->tm_sec      = sh_rtc_read_alarm_value(rtc, RSECAR);
 482         tm->tm_min      = sh_rtc_read_alarm_value(rtc, RMINAR);
 483         tm->tm_hour     = sh_rtc_read_alarm_value(rtc, RHRAR);
 484         tm->tm_wday     = sh_rtc_read_alarm_value(rtc, RWKAR);
 485         tm->tm_mday     = sh_rtc_read_alarm_value(rtc, RDAYAR);
 486         tm->tm_mon      = sh_rtc_read_alarm_value(rtc, RMONAR);
 487         if (tm->tm_mon > 0)
 488                 tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
 489
 490         wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0;
 491
 492         spin_unlock_irq(&rtc->lock);
 493
 494         return 0;
 495 }
 496
 497 static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc,
 498                                             int value, int reg_off)
 499 {
 500         /* < 0 for a value that is ignored */
 501         if (value < 0)
 502                 writeb(0, rtc->regbase + reg_off);
 503         else
 504                 writeb(bin2bcd(value) | AR_ENB,  rtc->regbase + reg_off);
 505 }
 506
 507 static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
 508 {
 509         struct sh_rtc *rtc = dev_get_drvdata(dev);
 510         unsigned int rcr1;
 511         struct rtc_time *tm = &wkalrm->time;
 512         int mon;
 513
 514         spin_lock_irq(&rtc->lock);
 515
 516         /* disable alarm interrupt and clear the alarm flag */
 517         rcr1 = readb(rtc->regbase + RCR1);
 518         rcr1 &= ~(RCR1_AF | RCR1_AIE);
 519         writeb(rcr1, rtc->regbase + RCR1);
 520
 521         /* set alarm time */
 522         sh_rtc_write_alarm_value(rtc, tm->tm_sec,  RSECAR);
 523         sh_rtc_write_alarm_value(rtc, tm->tm_min,  RMINAR);
 524         sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR);
 525         sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR);
 526         sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR);
 527         mon = tm->tm_mon;
 528         if (mon >= 0)
 529                 mon += 1;
 530         sh_rtc_write_alarm_value(rtc, mon, RMONAR);
 531
 532         if (wkalrm->enabled) {
 533                 rcr1 |= RCR1_AIE;
 534                 writeb(rcr1, rtc->regbase + RCR1);
 535         }
 536
 537         spin_unlock_irq(&rtc->lock);
 538
 539         return 0;
 540 }
 541
 542 static const struct rtc_class_ops sh_rtc_ops = {
 543         .read_time      = sh_rtc_read_time,
 544         .set_time       = sh_rtc_set_time,
 545         .read_alarm     = sh_rtc_read_alarm,
 546         .set_alarm      = sh_rtc_set_alarm,
 547         .proc           = sh_rtc_proc,
 548         .alarm_irq_enable = sh_rtc_alarm_irq_enable,
 549 };
 550
 551 static int __init sh_rtc_probe(struct platform_device *pdev)
 552 {
 553         struct sh_rtc *rtc;
 554         struct resource *res;
 555         struct rtc_time r;
 556         char clk_name[6];
 557         int clk_id, ret;
 558
 559         rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
 560         if (unlikely(!rtc))
 561                 return -ENOMEM;
 562
 563         spin_lock_init(&rtc->lock);
 564
 565         /* get periodic/carry/alarm irqs */
 566         ret = platform_get_irq(pdev, 0);
 567         if (unlikely(ret <= 0)) {
 568                 dev_err(&pdev->dev, "No IRQ resource\n");
 569                 return -ENOENT;
 570         }
 571
 572         rtc->periodic_irq = ret;
 573         rtc->carry_irq = platform_get_irq(pdev, 1);
 574         rtc->alarm_irq = platform_get_irq(pdev, 2);
 575
 576         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
 577         if (!res)
 578                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 579         if (unlikely(res == NULL)) {
 580                 dev_err(&pdev->dev, "No IO resource\n");
 581                 return -ENOENT;
 582         }
 583
 584         rtc->regsize = resource_size(res);
 585
 586         rtc->res = devm_request_mem_region(&pdev->dev, res->start,
 587                                         rtc->regsize, pdev->name);
 588         if (unlikely(!rtc->res))
 589                 return -EBUSY;
 590
 591         rtc->regbase = devm_ioremap_nocache(&pdev->dev, rtc->res->start,
 592                                         rtc->regsize);
 593         if (unlikely(!rtc->regbase))
 594                 return -EINVAL;
 595
 596         if (!pdev->dev.of_node) {
 597                 clk_id = pdev->id;
 598                 /* With a single device, the clock id is still "rtc0" */
 599                 if (clk_id < 0)
 600                         clk_id = 0;
 601
 602                 snprintf(clk_name, sizeof(clk_name), "rtc%d", clk_id);
 603         } else
 604                 snprintf(clk_name, sizeof(clk_name), "fck");
 605
 606         rtc->clk = devm_clk_get(&pdev->dev, clk_name);
 607         if (IS_ERR(rtc->clk)) {
 608                 /*
 609                  * No error handling for rtc->clk intentionally, not all
 610                  * platforms will have a unique clock for the RTC, and
 611                  * the clk API can handle the struct clk pointer being
 612                  * NULL.
 613                  */
 614                 rtc->clk = NULL;
 615         }
 616
 617         clk_enable(rtc->clk);
 618
 619         rtc->capabilities = RTC_DEF_CAPABILITIES;
 620
 621 #ifdef CONFIG_SUPERH
 622         if (dev_get_platdata(&pdev->dev)) {
 623                 struct sh_rtc_platform_info *pinfo =
 624                         dev_get_platdata(&pdev->dev);
 625
 626                 /*
 627                  * Some CPUs have special capabilities in addition to the
 628                  * default set. Add those in here.
 629                  */
 630                 rtc->capabilities |= pinfo->capabilities;
 631         }
 632 #endif
 633
 634         if (rtc->carry_irq <= 0) {
 635                 /* register shared periodic/carry/alarm irq */
 636                 ret = devm_request_irq(&pdev->dev, rtc->periodic_irq,
 637                                 sh_rtc_shared, 0, "sh-rtc", rtc);
 638                 if (unlikely(ret)) {
 639                         dev_err(&pdev->dev,
 640                                 "request IRQ failed with %d, IRQ %d\n", ret,
 641                                 rtc->periodic_irq);
 642                         goto err_unmap;
 643                 }
 644         } else {
 645                 /* register periodic/carry/alarm irqs */
 646                 ret = devm_request_irq(&pdev->dev, rtc->periodic_irq,
 647                                 sh_rtc_periodic, 0, "sh-rtc period", rtc);
 648                 if (unlikely(ret)) {
 649                         dev_err(&pdev->dev,
 650                                 "request period IRQ failed with %d, IRQ %d\n",
 651                                 ret, rtc->periodic_irq);
 652                         goto err_unmap;
 653                 }
 654
 655                 ret = devm_request_irq(&pdev->dev, rtc->carry_irq,
 656                                 sh_rtc_interrupt, 0, "sh-rtc carry", rtc);
 657                 if (unlikely(ret)) {
 658                         dev_err(&pdev->dev,
 659                                 "request carry IRQ failed with %d, IRQ %d\n",
 660                                 ret, rtc->carry_irq);
 661                         goto err_unmap;
 662                 }
 663
 664                 ret = devm_request_irq(&pdev->dev, rtc->alarm_irq,
 665                                 sh_rtc_alarm, 0, "sh-rtc alarm", rtc);
 666                 if (unlikely(ret)) {
 667                         dev_err(&pdev->dev,
 668                                 "request alarm IRQ failed with %d, IRQ %d\n",
 669                                 ret, rtc->alarm_irq);
 670                         goto err_unmap;
 671                 }
 672         }
 673
 674         platform_set_drvdata(pdev, rtc);
 675
 676         /* everything disabled by default */
 677         sh_rtc_irq_set_freq(&pdev->dev, 0);
 678         sh_rtc_irq_set_state(&pdev->dev, 0);
 679         sh_rtc_setaie(&pdev->dev, 0);
 680         sh_rtc_setcie(&pdev->dev, 0);
 681
 682         rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, "sh",
 683                                            &sh_rtc_ops, THIS_MODULE);
 684         if (IS_ERR(rtc->rtc_dev)) {
 685                 ret = PTR_ERR(rtc->rtc_dev);
 686                 goto err_unmap;
 687         }
 688
 689         rtc->rtc_dev->max_user_freq = 256;
 690
 691         /* reset rtc to epoch 0 if time is invalid */
 692         if (rtc_read_time(rtc->rtc_dev, &r) < 0) {
 693                 rtc_time_to_tm(0, &r);
 694                 rtc_set_time(rtc->rtc_dev, &r);
 695         }
 696
 697         device_init_wakeup(&pdev->dev, 1);
 698         return 0;
 699
 700 err_unmap:
 701         clk_disable(rtc->clk);
 702
 703         return ret;
 704 }
 705
 706 static int __exit sh_rtc_remove(struct platform_device *pdev)
 707 {
 708         struct sh_rtc *rtc = platform_get_drvdata(pdev);
 709
 710         sh_rtc_irq_set_state(&pdev->dev, 0);
 711
 712         sh_rtc_setaie(&pdev->dev, 0);
 713         sh_rtc_setcie(&pdev->dev, 0);
 714
 715         clk_disable(rtc->clk);
 716
 717         return 0;
 718 }
 719
 720 static void sh_rtc_set_irq_wake(struct device *dev, int enabled)
 721 {
 722         struct sh_rtc *rtc = dev_get_drvdata(dev);
 723
 724         irq_set_irq_wake(rtc->periodic_irq, enabled);
 725
 726         if (rtc->carry_irq > 0) {
 727                 irq_set_irq_wake(rtc->carry_irq, enabled);
 728                 irq_set_irq_wake(rtc->alarm_irq, enabled);
 729         }
 730 }
 731
 732 static int __maybe_unused sh_rtc_suspend(struct device *dev)
 733 {
 734         if (device_may_wakeup(dev))
 735                 sh_rtc_set_irq_wake(dev, 1);
 736
 737         return 0;
 738 }
 739
 740 static int __maybe_unused sh_rtc_resume(struct device *dev)
 741 {
 742         if (device_may_wakeup(dev))
 743                 sh_rtc_set_irq_wake(dev, 0);
 744
 745         return 0;
 746 }
 747
 748 static SIMPLE_DEV_PM_OPS(sh_rtc_pm_ops, sh_rtc_suspend, sh_rtc_resume);
 749
 750 static const struct of_device_id sh_rtc_of_match[] = {
 751         { .compatible = "renesas,sh-rtc", },
 752         { /* sentinel */ }
 753 };
 754 MODULE_DEVICE_TABLE(of, sh_rtc_of_match);
 755
 756 static struct platform_driver sh_rtc_platform_driver = {
 757         .driver         = {
 758                 .name   = DRV_NAME,
 759                 .pm     = &sh_rtc_pm_ops,
 760                 .of_match_table = sh_rtc_of_match,
 761         },
 762         .remove         = __exit_p(sh_rtc_remove),
 763 };
 764
 765 module_platform_driver_probe(sh_rtc_platform_driver, sh_rtc_probe);
 766
 767 MODULE_DESCRIPTION("SuperH on-chip RTC driver");
 768 MODULE_AUTHOR("Paul Mundt <[email protected]>, "
 769               "Jamie Lenehan <[email protected]>, "
 770               "Angelo Castello <[email protected]>");
 771 MODULE_LICENSE("GPL");
 772 MODULE_ALIAS("platform:" DRV_NAME);