drivers/gpu/drm/imx/imx-ldb.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * i.MX drm driver - LVDS display bridge
   4  *
   5  * Copyright (C) 2012 Sascha Hauer, Pengutronix
   6  */
   7
   8 #include <linux/clk.h>
   9 #include <linux/component.h>
  10 #include <linux/mfd/syscon.h>
  11 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  12 #include <linux/module.h>
  13 #include <linux/of_device.h>
  14 #include <linux/of_graph.h>
  15 #include <linux/regmap.h>
  16 #include <linux/videodev2.h>
  17
  18 #include <video/of_display_timing.h>
  19 #include <video/of_videomode.h>
  20
  21 #include <drm/drm_atomic.h>
  22 #include <drm/drm_atomic_helper.h>
  23 #include <drm/drm_bridge.h>
  24 #include <drm/drm_fb_helper.h>
  25 #include <drm/drm_of.h>
  26 #include <drm/drm_panel.h>
  27 #include <drm/drm_print.h>
  28 #include <drm/drm_probe_helper.h>
  29 #include <drm/drm_simple_kms_helper.h>
  30
  31 #include "imx-drm.h"
  32
  33 #define DRIVER_NAME "imx-ldb"
  34
  35 #define LDB_CH0_MODE_EN_TO_DI0          (1 << 0)
  36 #define LDB_CH0_MODE_EN_TO_DI1          (3 << 0)
  37 #define LDB_CH0_MODE_EN_MASK            (3 << 0)
  38 #define LDB_CH1_MODE_EN_TO_DI0          (1 << 2)
  39 #define LDB_CH1_MODE_EN_TO_DI1          (3 << 2)
  40 #define LDB_CH1_MODE_EN_MASK            (3 << 2)
  41 #define LDB_SPLIT_MODE_EN               (1 << 4)
  42 #define LDB_DATA_WIDTH_CH0_24           (1 << 5)
  43 #define LDB_BIT_MAP_CH0_JEIDA           (1 << 6)
  44 #define LDB_DATA_WIDTH_CH1_24           (1 << 7)
  45 #define LDB_BIT_MAP_CH1_JEIDA           (1 << 8)
  46 #define LDB_DI0_VS_POL_ACT_LOW          (1 << 9)
  47 #define LDB_DI1_VS_POL_ACT_LOW          (1 << 10)
  48 #define LDB_BGREF_RMODE_INT             (1 << 15)
  49
  50 struct imx_ldb;
  51
  52 struct imx_ldb_channel {
  53         struct imx_ldb *ldb;
  54         struct drm_connector connector;
  55         struct drm_encoder encoder;
  56
  57         /* Defines what is connected to the ldb, only one at a time */
  58         struct drm_panel *panel;
  59         struct drm_bridge *bridge;
  60
  61         struct device_node *child;
  62         struct i2c_adapter *ddc;
  63         int chno;
  64         void *edid;
  65         int edid_len;
  66         struct drm_display_mode mode;
  67         int mode_valid;
  68         u32 bus_format;
  69         u32 bus_flags;
  70 };
  71
  72 static inline struct imx_ldb_channel *con_to_imx_ldb_ch(struct drm_connector *c)
  73 {
  74         return container_of(c, struct imx_ldb_channel, connector);
  75 }
  76
  77 static inline struct imx_ldb_channel *enc_to_imx_ldb_ch(struct drm_encoder *e)
  78 {
  79         return container_of(e, struct imx_ldb_channel, encoder);
  80 }
  81
  82 struct bus_mux {
  83         int reg;
  84         int shift;
  85         int mask;
  86 };
  87
  88 struct imx_ldb {
  89         struct regmap *regmap;
  90         struct device *dev;
  91         struct imx_ldb_channel channel[2];
  92         struct clk *clk[2]; /* our own clock */
  93         struct clk *clk_sel[4]; /* parent of display clock */
  94         struct clk *clk_parent[4]; /* original parent of clk_sel */
  95         struct clk *clk_pll[2]; /* upstream clock we can adjust */
  96         u32 ldb_ctrl;
  97         const struct bus_mux *lvds_mux;
  98 };
  99
 100 static void imx_ldb_ch_set_bus_format(struct imx_ldb_channel *imx_ldb_ch,
 101                                       u32 bus_format)
 102 {
 103         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 104         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 105
 106         switch (bus_format) {
 107         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 108                 break;
 109         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 110                 if (imx_ldb_ch->chno == 0 || dual)
 111                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
 112                 if (imx_ldb_ch->chno == 1 || dual)
 113                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
 114                 break;
 115         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 116                 if (imx_ldb_ch->chno == 0 || dual)
 117                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |
 118                                          LDB_BIT_MAP_CH0_JEIDA;
 119                 if (imx_ldb_ch->chno == 1 || dual)
 120                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |
 121                                          LDB_BIT_MAP_CH1_JEIDA;
 122                 break;
 123         }
 124 }
 125
 126 static int imx_ldb_connector_get_modes(struct drm_connector *connector)
 127 {
 128         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 129         int num_modes;
 130
 131         num_modes = drm_panel_get_modes(imx_ldb_ch->panel, connector);
 132         if (num_modes > 0)
 133                 return num_modes;
 134
 135         if (!imx_ldb_ch->edid && imx_ldb_ch->ddc)
 136                 imx_ldb_ch->edid = drm_get_edid(connector, imx_ldb_ch->ddc);
 137
 138         if (imx_ldb_ch->edid) {
 139                 drm_connector_update_edid_property(connector,
 140                                                         imx_ldb_ch->edid);
 141                 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
 142         }
 143
 144         if (imx_ldb_ch->mode_valid) {
 145                 struct drm_display_mode *mode;
 146
 147                 mode = drm_mode_create(connector->dev);
 148                 if (!mode)
 149                         return -EINVAL;
 150                 drm_mode_copy(mode, &imx_ldb_ch->mode);
 151                 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
 152                 drm_mode_probed_add(connector, mode);
 153                 num_modes++;
 154         }
 155
 156         return num_modes;
 157 }
 158
 159 static struct drm_encoder *imx_ldb_connector_best_encoder(
 160                 struct drm_connector *connector)
 161 {
 162         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 163
 164         return &imx_ldb_ch->encoder;
 165 }
 166
 167 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
 168                 unsigned long serial_clk, unsigned long di_clk)
 169 {
 170         int ret;
 171
 172         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 173                         clk_get_rate(ldb->clk_pll[chno]), serial_clk);
 174         clk_set_rate(ldb->clk_pll[chno], serial_clk);
 175
 176         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 177                         clk_get_rate(ldb->clk_pll[chno]));
 178
 179         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 180                         clk_get_rate(ldb->clk[chno]),
 181                         (long int)di_clk);
 182         clk_set_rate(ldb->clk[chno], di_clk);
 183
 184         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 185                         clk_get_rate(ldb->clk[chno]));
 186
 187         /* set display clock mux to LDB input clock */
 188         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
 189         if (ret)
 190                 dev_err(ldb->dev,
 191                         "unable to set di%d parent clock to ldb_di%d\n", mux,
 192                         chno);
 193 }
 194
 195 static void imx_ldb_encoder_enable(struct drm_encoder *encoder)
 196 {
 197         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 198         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 199         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 200         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 201
 202         drm_panel_prepare(imx_ldb_ch->panel);
 203
 204         if (dual) {
 205                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[0]);
 206                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[1]);
 207
 208                 clk_prepare_enable(ldb->clk[0]);
 209                 clk_prepare_enable(ldb->clk[1]);
 210         } else {
 211                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[imx_ldb_ch->chno]);
 212         }
 213
 214         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 215                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 216                 if (mux == 0 || ldb->lvds_mux)
 217                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
 218                 else if (mux == 1)
 219                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
 220         }
 221         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 222                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 223                 if (mux == 1 || ldb->lvds_mux)
 224                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
 225                 else if (mux == 0)
 226                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
 227         }
 228
 229         if (ldb->lvds_mux) {
 230                 const struct bus_mux *lvds_mux = NULL;
 231
 232                 if (imx_ldb_ch == &ldb->channel[0])
 233                         lvds_mux = &ldb->lvds_mux[0];
 234                 else if (imx_ldb_ch == &ldb->channel[1])
 235                         lvds_mux = &ldb->lvds_mux[1];
 236
 237                 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
 238                                    mux << lvds_mux->shift);
 239         }
 240
 241         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 242
 243         drm_panel_enable(imx_ldb_ch->panel);
 244 }
 245
 246 static void
 247 imx_ldb_encoder_atomic_mode_set(struct drm_encoder *encoder,
 248                                 struct drm_crtc_state *crtc_state,
 249                                 struct drm_connector_state *connector_state)
 250 {
 251         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 252         struct drm_display_mode *mode = &crtc_state->adjusted_mode;
 253         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 254         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 255         unsigned long serial_clk;
 256         unsigned long di_clk = mode->clock * 1000;
 257         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 258         u32 bus_format = imx_ldb_ch->bus_format;
 259
 260         if (mode->clock > 170000) {
 261                 dev_warn(ldb->dev,
 262                          "%s: mode exceeds 170 MHz pixel clock\n", __func__);
 263         }
 264         if (mode->clock > 85000 && !dual) {
 265                 dev_warn(ldb->dev,
 266                          "%s: mode exceeds 85 MHz pixel clock\n", __func__);
 267         }
 268
 269         if (dual) {
 270                 serial_clk = 3500UL * mode->clock;
 271                 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
 272                 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
 273         } else {
 274                 serial_clk = 7000UL * mode->clock;
 275                 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
 276                                   di_clk);
 277         }
 278
 279         /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
 280         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 281                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 282                         ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
 283                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 284                         ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
 285         }
 286         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 287                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 288                         ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
 289                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 290                         ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
 291         }
 292
 293         if (!bus_format) {
 294                 struct drm_connector *connector = connector_state->connector;
 295                 struct drm_display_info *di = &connector->display_info;
 296
 297                 if (di->num_bus_formats)
 298                         bus_format = di->bus_formats[0];
 299         }
 300         imx_ldb_ch_set_bus_format(imx_ldb_ch, bus_format);
 301 }
 302
 303 static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
 304 {
 305         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 306         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 307         int mux, ret;
 308
 309         drm_panel_disable(imx_ldb_ch->panel);
 310
 311         if (imx_ldb_ch == &ldb->channel[0])
 312                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 313         else if (imx_ldb_ch == &ldb->channel[1])
 314                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 315
 316         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 317
 318         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 319                 clk_disable_unprepare(ldb->clk[0]);
 320                 clk_disable_unprepare(ldb->clk[1]);
 321         }
 322
 323         if (ldb->lvds_mux) {
 324                 const struct bus_mux *lvds_mux = NULL;
 325
 326                 if (imx_ldb_ch == &ldb->channel[0])
 327                         lvds_mux = &ldb->lvds_mux[0];
 328                 else if (imx_ldb_ch == &ldb->channel[1])
 329                         lvds_mux = &ldb->lvds_mux[1];
 330
 331                 regmap_read(ldb->regmap, lvds_mux->reg, &mux);
 332                 mux &= lvds_mux->mask;
 333                 mux >>= lvds_mux->shift;
 334         } else {
 335                 mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;
 336         }
 337
 338         /* set display clock mux back to original input clock */
 339         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);
 340         if (ret)
 341                 dev_err(ldb->dev,
 342                         "unable to set di%d parent clock to original parent\n",
 343                         mux);
 344
 345         drm_panel_unprepare(imx_ldb_ch->panel);
 346 }
 347
 348 static int imx_ldb_encoder_atomic_check(struct drm_encoder *encoder,
 349                                         struct drm_crtc_state *crtc_state,
 350                                         struct drm_connector_state *conn_state)
 351 {
 352         struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc_state);
 353         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 354         struct drm_display_info *di = &conn_state->connector->display_info;
 355         u32 bus_format = imx_ldb_ch->bus_format;
 356
 357         /* Bus format description in DT overrides connector display info. */
 358         if (!bus_format && di->num_bus_formats) {
 359                 bus_format = di->bus_formats[0];
 360                 imx_crtc_state->bus_flags = di->bus_flags;
 361         } else {
 362                 bus_format = imx_ldb_ch->bus_format;
 363                 imx_crtc_state->bus_flags = imx_ldb_ch->bus_flags;
 364         }
 365         switch (bus_format) {
 366         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 367                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB666_1X18;
 368                 break;
 369         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 370         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 371                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 372                 break;
 373         default:
 374                 return -EINVAL;
 375         }
 376
 377         imx_crtc_state->di_hsync_pin = 2;
 378         imx_crtc_state->di_vsync_pin = 3;
 379
 380         return 0;
 381 }
 382
 383
 384 static const struct drm_connector_funcs imx_ldb_connector_funcs = {
 385         .fill_modes = drm_helper_probe_single_connector_modes,
 386         .destroy = imx_drm_connector_destroy,
 387         .reset = drm_atomic_helper_connector_reset,
 388         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 389         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 390 };
 391
 392 static const struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
 393         .get_modes = imx_ldb_connector_get_modes,
 394         .best_encoder = imx_ldb_connector_best_encoder,
 395 };
 396
 397 static const struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
 398         .atomic_mode_set = imx_ldb_encoder_atomic_mode_set,
 399         .enable = imx_ldb_encoder_enable,
 400         .disable = imx_ldb_encoder_disable,
 401         .atomic_check = imx_ldb_encoder_atomic_check,
 402 };
 403
 404 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
 405 {
 406         char clkname[16];
 407
 408         snprintf(clkname, sizeof(clkname), "di%d", chno);
 409         ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
 410         if (IS_ERR(ldb->clk[chno]))
 411                 return PTR_ERR(ldb->clk[chno]);
 412
 413         snprintf(clkname, sizeof(clkname), "di%d_pll", chno);
 414         ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
 415
 416         return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
 417 }
 418
 419 static int imx_ldb_register(struct drm_device *drm,
 420         struct imx_ldb_channel *imx_ldb_ch)
 421 {
 422         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 423         struct drm_encoder *encoder = &imx_ldb_ch->encoder;
 424         int ret;
 425
 426         ret = imx_drm_encoder_parse_of(drm, encoder, imx_ldb_ch->child);
 427         if (ret)
 428                 return ret;
 429
 430         ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
 431         if (ret)
 432                 return ret;
 433
 434         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 435                 ret = imx_ldb_get_clk(ldb, 1);
 436                 if (ret)
 437                         return ret;
 438         }
 439
 440         drm_encoder_helper_add(encoder, &imx_ldb_encoder_helper_funcs);
 441         drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_LVDS);
 442
 443         if (imx_ldb_ch->bridge) {
 444                 ret = drm_bridge_attach(&imx_ldb_ch->encoder,
 445                                         imx_ldb_ch->bridge, NULL, 0);
 446                 if (ret) {
 447                         DRM_ERROR("Failed to initialize bridge with drm\n");
 448                         return ret;
 449                 }
 450         } else {
 451                 /*
 452                  * We want to add the connector whenever there is no bridge
 453                  * that brings its own, not only when there is a panel. For
 454                  * historical reasons, the ldb driver can also work without
 455                  * a panel.
 456                  */
 457                 drm_connector_helper_add(&imx_ldb_ch->connector,
 458                                 &imx_ldb_connector_helper_funcs);
 459                 drm_connector_init_with_ddc(drm, &imx_ldb_ch->connector,
 460                                             &imx_ldb_connector_funcs,
 461                                             DRM_MODE_CONNECTOR_LVDS,
 462                                             imx_ldb_ch->ddc);
 463                 drm_connector_attach_encoder(&imx_ldb_ch->connector, encoder);
 464         }
 465
 466         if (imx_ldb_ch->panel) {
 467                 ret = drm_panel_attach(imx_ldb_ch->panel,
 468                                        &imx_ldb_ch->connector);
 469                 if (ret)
 470                         return ret;
 471         }
 472
 473         return 0;
 474 }
 475
 476 enum {
 477         LVDS_BIT_MAP_SPWG,
 478         LVDS_BIT_MAP_JEIDA
 479 };
 480
 481 struct imx_ldb_bit_mapping {
 482         u32 bus_format;
 483         u32 datawidth;
 484         const char * const mapping;
 485 };
 486
 487 static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings[] = {
 488         { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,  18, "spwg" },
 489         { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,  24, "spwg" },
 490         { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, "jeida" },
 491 };
 492
 493 static u32 of_get_bus_format(struct device *dev, struct device_node *np)
 494 {
 495         const char *bm;
 496         u32 datawidth = 0;
 497         int ret, i;
 498
 499         ret = of_property_read_string(np, "fsl,data-mapping", &bm);
 500         if (ret < 0)
 501                 return ret;
 502
 503         of_property_read_u32(np, "fsl,data-width", &datawidth);
 504
 505         for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++) {
 506                 if (!strcasecmp(bm, imx_ldb_bit_mappings[i].mapping) &&
 507                     datawidth == imx_ldb_bit_mappings[i].datawidth)
 508                         return imx_ldb_bit_mappings[i].bus_format;
 509         }
 510
 511         dev_err(dev, "invalid data mapping: %d-bit \"%s\"\n", datawidth, bm);
 512
 513         return -ENOENT;
 514 }
 515
 516 static struct bus_mux imx6q_lvds_mux[2] = {
 517         {
 518                 .reg = IOMUXC_GPR3,
 519                 .shift = 6,
 520                 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
 521         }, {
 522                 .reg = IOMUXC_GPR3,
 523                 .shift = 8,
 524                 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
 525         }
 526 };
 527
 528 /*
 529  * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
 530  * of_match_device will walk through this list and take the first entry
 531  * matching any of its compatible values. Therefore, the more generic
 532  * entries (in this case fsl,imx53-ldb) need to be ordered last.
 533  */
 534 static const struct of_device_id imx_ldb_dt_ids[] = {
 535         { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
 536         { .compatible = "fsl,imx53-ldb", .data = NULL, },
 537         { }
 538 };
 539 MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
 540
 541 static int imx_ldb_panel_ddc(struct device *dev,
 542                 struct imx_ldb_channel *channel, struct device_node *child)
 543 {
 544         struct device_node *ddc_node;
 545         const u8 *edidp;
 546         int ret;
 547
 548         ddc_node = of_parse_phandle(child, "ddc-i2c-bus", 0);
 549         if (ddc_node) {
 550                 channel->ddc = of_find_i2c_adapter_by_node(ddc_node);
 551                 of_node_put(ddc_node);
 552                 if (!channel->ddc) {
 553                         dev_warn(dev, "failed to get ddc i2c adapter\n");
 554                         return -EPROBE_DEFER;
 555                 }
 556         }
 557
 558         if (!channel->ddc) {
 559                 /* if no DDC available, fallback to hardcoded EDID */
 560                 dev_dbg(dev, "no ddc available\n");
 561
 562                 edidp = of_get_property(child, "edid",
 563                                         &channel->edid_len);
 564                 if (edidp) {
 565                         channel->edid = kmemdup(edidp,
 566                                                 channel->edid_len,
 567                                                 GFP_KERNEL);
 568                 } else if (!channel->panel) {
 569                         /* fallback to display-timings node */
 570                         ret = of_get_drm_display_mode(child,
 571                                                       &channel->mode,
 572                                                       &channel->bus_flags,
 573                                                       OF_USE_NATIVE_MODE);
 574                         if (!ret)
 575                                 channel->mode_valid = 1;
 576                 }
 577         }
 578         return 0;
 579 }
 580
 581 static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
 582 {
 583         struct drm_device *drm = data;
 584         struct device_node *np = dev->of_node;
 585         const struct of_device_id *of_id =
 586                         of_match_device(imx_ldb_dt_ids, dev);
 587         struct device_node *child;
 588         struct imx_ldb *imx_ldb;
 589         int dual;
 590         int ret;
 591         int i;
 592
 593         imx_ldb = devm_kzalloc(dev, sizeof(*imx_ldb), GFP_KERNEL);
 594         if (!imx_ldb)
 595                 return -ENOMEM;
 596
 597         imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
 598         if (IS_ERR(imx_ldb->regmap)) {
 599                 dev_err(dev, "failed to get parent regmap\n");
 600                 return PTR_ERR(imx_ldb->regmap);
 601         }
 602
 603         /* disable LDB by resetting the control register to POR default */
 604         regmap_write(imx_ldb->regmap, IOMUXC_GPR2, 0);
 605
 606         imx_ldb->dev = dev;
 607
 608         if (of_id)
 609                 imx_ldb->lvds_mux = of_id->data;
 610
 611         dual = of_property_read_bool(np, "fsl,dual-channel");
 612         if (dual)
 613                 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
 614
 615         /*
 616          * There are three different possible clock mux configurations:
 617          * i.MX53:  ipu1_di0_sel, ipu1_di1_sel
 618          * i.MX6q:  ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
 619          * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
 620          * Map them all to di0_sel...di3_sel.
 621          */
 622         for (i = 0; i < 4; i++) {
 623                 char clkname[16];
 624
 625                 sprintf(clkname, "di%d_sel", i);
 626                 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
 627                 if (IS_ERR(imx_ldb->clk_sel[i])) {
 628                         ret = PTR_ERR(imx_ldb->clk_sel[i]);
 629                         imx_ldb->clk_sel[i] = NULL;
 630                         break;
 631                 }
 632
 633                 imx_ldb->clk_parent[i] = clk_get_parent(imx_ldb->clk_sel[i]);
 634         }
 635         if (i == 0)
 636                 return ret;
 637
 638         for_each_child_of_node(np, child) {
 639                 struct imx_ldb_channel *channel;
 640                 int bus_format;
 641
 642                 ret = of_property_read_u32(child, "reg", &i);
 643                 if (ret || i < 0 || i > 1) {
 644                         ret = -EINVAL;
 645                         goto free_child;
 646                 }
 647
 648                 if (!of_device_is_available(child))
 649                         continue;
 650
 651                 if (dual && i > 0) {
 652                         dev_warn(dev, "dual-channel mode, ignoring second output\n");
 653                         continue;
 654                 }
 655
 656                 channel = &imx_ldb->channel[i];
 657                 channel->ldb = imx_ldb;
 658                 channel->chno = i;
 659
 660                 /*
 661                  * The output port is port@4 with an external 4-port mux or
 662                  * port@2 with the internal 2-port mux.
 663                  */
 664                 ret = drm_of_find_panel_or_bridge(child,
 665                                                   imx_ldb->lvds_mux ? 4 : 2, 0,
 666                                                   &channel->panel, &channel->bridge);
 667                 if (ret && ret != -ENODEV)
 668                         goto free_child;
 669
 670                 /* panel ddc only if there is no bridge */
 671                 if (!channel->bridge) {
 672                         ret = imx_ldb_panel_ddc(dev, channel, child);
 673                         if (ret)
 674                                 goto free_child;
 675                 }
 676
 677                 bus_format = of_get_bus_format(dev, child);
 678                 if (bus_format == -EINVAL) {
 679                         /*
 680                          * If no bus format was specified in the device tree,
 681                          * we can still get it from the connected panel later.
 682                          */
 683                         if (channel->panel && channel->panel->funcs &&
 684                             channel->panel->funcs->get_modes)
 685                                 bus_format = 0;
 686                 }
 687                 if (bus_format < 0) {
 688                         dev_err(dev, "could not determine data mapping: %d\n",
 689                                 bus_format);
 690                         ret = bus_format;
 691                         goto free_child;
 692                 }
 693                 channel->bus_format = bus_format;
 694                 channel->child = child;
 695
 696                 ret = imx_ldb_register(drm, channel);
 697                 if (ret) {
 698                         channel->child = NULL;
 699                         goto free_child;
 700                 }
 701         }
 702
 703         dev_set_drvdata(dev, imx_ldb);
 704
 705         return 0;
 706
 707 free_child:
 708         of_node_put(child);
 709         return ret;
 710 }
 711
 712 static void imx_ldb_unbind(struct device *dev, struct device *master,
 713         void *data)
 714 {
 715         struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
 716         int i;
 717
 718         for (i = 0; i < 2; i++) {
 719                 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
 720
 721                 if (channel->panel)
 722                         drm_panel_detach(channel->panel);
 723
 724                 kfree(channel->edid);
 725                 i2c_put_adapter(channel->ddc);
 726         }
 727 }
 728
 729 static const struct component_ops imx_ldb_ops = {
 730         .bind   = imx_ldb_bind,
 731         .unbind = imx_ldb_unbind,
 732 };
 733
 734 static int imx_ldb_probe(struct platform_device *pdev)
 735 {
 736         return component_add(&pdev->dev, &imx_ldb_ops);
 737 }
 738
 739 static int imx_ldb_remove(struct platform_device *pdev)
 740 {
 741         component_del(&pdev->dev, &imx_ldb_ops);
 742         return 0;
 743 }
 744
 745 static struct platform_driver imx_ldb_driver = {
 746         .probe          = imx_ldb_probe,
 747         .remove         = imx_ldb_remove,
 748         .driver         = {
 749                 .of_match_table = imx_ldb_dt_ids,
 750                 .name   = DRIVER_NAME,
 751         },
 752 };
 753
 754 module_platform_driver(imx_ldb_driver);
 755
 756 MODULE_DESCRIPTION("i.MX LVDS driver");
 757 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 758 MODULE_LICENSE("GPL");
 759 MODULE_ALIAS("platform:" DRIVER_NAME);