2 * HCI based Driver for NXP PN544 NFC Chip
4 * Copyright (C) 2012 Intel Corporation. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the
17 * Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 #include <linux/crc-ccitt.h>
22 #include <linux/module.h>
23 #include <linux/delay.h>
24 #include <linux/slab.h>
25 #include <linux/miscdevice.h>
26 #include <linux/interrupt.h>
27 #include <linux/gpio.h>
28 #include <linux/i2c.h>
30 #include <linux/nfc.h>
31 #include <net/nfc/hci.h>
32 #include <net/nfc/shdlc.h>
34 #include <linux/nfc/pn544.h>
36 #define DRIVER_DESC "HCI NFC driver for PN544"
38 #define PN544_HCI_DRIVER_NAME "pn544_hci"
40 /* Timing restrictions (ms) */
41 #define PN544_HCI_RESETVEN_TIME 30
43 static struct i2c_device_id pn544_hci_id_table[] = {
48 MODULE_DEVICE_TABLE(i2c, pn544_hci_id_table);
53 /* framing in HCI mode */
54 #define PN544_HCI_LLC_LEN 1
55 #define PN544_HCI_LLC_CRC 2
56 #define PN544_HCI_LLC_LEN_CRC (PN544_HCI_LLC_LEN + PN544_HCI_LLC_CRC)
57 #define PN544_HCI_LLC_MIN_SIZE (1 + PN544_HCI_LLC_LEN_CRC)
58 #define PN544_HCI_LLC_MAX_PAYLOAD 29
59 #define PN544_HCI_LLC_MAX_SIZE (PN544_HCI_LLC_LEN_CRC + 1 + \
60 PN544_HCI_LLC_MAX_PAYLOAD)
68 #define FULL_VERSION_LEN 11
70 /* Proprietary commands */
71 #define PN544_WRITE 0x3f
73 /* Proprietary gates, events, commands and registers */
75 /* NFC_HCI_RF_READER_A_GATE additional registers and commands */
76 #define PN544_RF_READER_A_AUTO_ACTIVATION 0x10
77 #define PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION 0x12
78 #define PN544_MIFARE_CMD 0x21
80 /* Commands that apply to all RF readers */
81 #define PN544_RF_READER_CMD_PRESENCE_CHECK 0x30
82 #define PN544_RF_READER_CMD_ACTIVATE_NEXT 0x32
84 /* NFC_HCI_ID_MGMT_GATE additional registers */
85 #define PN544_ID_MGMT_FULL_VERSION_SW 0x10
87 #define PN544_RF_READER_ISO15693_GATE 0x12
89 #define PN544_RF_READER_F_GATE 0x14
90 #define PN544_FELICA_ID 0x04
91 #define PN544_FELICA_RAW 0x20
93 #define PN544_RF_READER_JEWEL_GATE 0x15
94 #define PN544_JEWEL_RAW_CMD 0x23
96 #define PN544_RF_READER_NFCIP1_INITIATOR_GATE 0x30
97 #define PN544_RF_READER_NFCIP1_TARGET_GATE 0x31
99 #define PN544_SYS_MGMT_GATE 0x90
100 #define PN544_SYS_MGMT_INFO_NOTIFICATION 0x02
102 #define PN544_POLLING_LOOP_MGMT_GATE 0x94
103 #define PN544_PL_RDPHASES 0x06
104 #define PN544_PL_EMULATION 0x07
105 #define PN544_PL_NFCT_DEACTIVATED 0x09
107 #define PN544_SWP_MGMT_GATE 0xA0
109 #define PN544_NFC_WI_MGMT_GATE 0xA1
111 static struct nfc_hci_gate pn544_gates[] = {
112 {NFC_HCI_ADMIN_GATE, NFC_HCI_INVALID_PIPE},
113 {NFC_HCI_LOOPBACK_GATE, NFC_HCI_INVALID_PIPE},
114 {NFC_HCI_ID_MGMT_GATE, NFC_HCI_INVALID_PIPE},
115 {NFC_HCI_LINK_MGMT_GATE, NFC_HCI_INVALID_PIPE},
116 {NFC_HCI_RF_READER_B_GATE, NFC_HCI_INVALID_PIPE},
117 {NFC_HCI_RF_READER_A_GATE, NFC_HCI_INVALID_PIPE},
118 {PN544_SYS_MGMT_GATE, NFC_HCI_INVALID_PIPE},
119 {PN544_SWP_MGMT_GATE, NFC_HCI_INVALID_PIPE},
120 {PN544_POLLING_LOOP_MGMT_GATE, NFC_HCI_INVALID_PIPE},
121 {PN544_NFC_WI_MGMT_GATE, NFC_HCI_INVALID_PIPE},
122 {PN544_RF_READER_F_GATE, NFC_HCI_INVALID_PIPE},
123 {PN544_RF_READER_JEWEL_GATE, NFC_HCI_INVALID_PIPE},
124 {PN544_RF_READER_ISO15693_GATE, NFC_HCI_INVALID_PIPE},
125 {PN544_RF_READER_NFCIP1_INITIATOR_GATE, NFC_HCI_INVALID_PIPE},
126 {PN544_RF_READER_NFCIP1_TARGET_GATE, NFC_HCI_INVALID_PIPE}
129 /* Largest headroom needed for outgoing custom commands */
130 #define PN544_CMDS_HEADROOM 2
132 struct pn544_hci_info {
133 struct i2c_client *i2c_dev;
134 struct nfc_shdlc *shdlc;
136 enum pn544_state state;
138 struct mutex info_lock;
140 unsigned int gpio_en;
141 unsigned int gpio_irq;
142 unsigned int gpio_fw;
143 unsigned int en_polarity;
146 * < 0 if hardware error occured (e.g. i2c err)
147 * and prevents normal operation.
151 static void pn544_hci_platform_init(struct pn544_hci_info *info)
153 int polarity, retry, ret;
154 char rset_cmd[] = { 0x05, 0xF9, 0x04, 0x00, 0xC3, 0xE5 };
155 int count = sizeof(rset_cmd);
157 pr_info(DRIVER_DESC ": %s\n", __func__);
158 dev_info(&info->i2c_dev->dev, "Detecting nfc_en polarity\n");
160 /* Disable fw download */
161 gpio_set_value(info->gpio_fw, 0);
163 for (polarity = 0; polarity < 2; polarity++) {
164 info->en_polarity = polarity;
168 gpio_set_value(info->gpio_en, !info->en_polarity);
169 usleep_range(10000, 15000);
172 gpio_set_value(info->gpio_en, info->en_polarity);
173 usleep_range(10000, 15000);
176 dev_dbg(&info->i2c_dev->dev, "Sending reset cmd\n");
177 ret = i2c_master_send(info->i2c_dev, rset_cmd, count);
179 dev_info(&info->i2c_dev->dev,
180 "nfc_en polarity : active %s\n",
181 (polarity == 0 ? "low" : "high"));
187 dev_err(&info->i2c_dev->dev,
188 "Could not detect nfc_en polarity, fallback to active high\n");
191 gpio_set_value(info->gpio_en, !info->en_polarity);
194 static int pn544_hci_enable(struct pn544_hci_info *info, int mode)
196 pr_info(DRIVER_DESC ": %s\n", __func__);
198 gpio_set_value(info->gpio_fw, 0);
199 gpio_set_value(info->gpio_en, info->en_polarity);
200 usleep_range(10000, 15000);
205 static void pn544_hci_disable(struct pn544_hci_info *info)
207 pr_info(DRIVER_DESC ": %s\n", __func__);
209 gpio_set_value(info->gpio_fw, 0);
210 gpio_set_value(info->gpio_en, !info->en_polarity);
211 usleep_range(10000, 15000);
213 gpio_set_value(info->gpio_en, info->en_polarity);
214 usleep_range(10000, 15000);
216 gpio_set_value(info->gpio_en, !info->en_polarity);
217 usleep_range(10000, 15000);
220 static int pn544_hci_i2c_write(struct i2c_client *client, u8 *buf, int len)
224 usleep_range(3000, 6000);
226 r = i2c_master_send(client, buf, len);
228 if (r == -EREMOTEIO) { /* Retry, chip was in standby */
229 usleep_range(6000, 10000);
230 r = i2c_master_send(client, buf, len);
233 if (r >= 0 && r != len)
239 static int check_crc(u8 *buf, int buflen)
245 crc = crc_ccitt(0xffff, buf, len - 2);
248 if (buf[len - 2] != (crc & 0xff) || buf[len - 1] != (crc >> 8)) {
249 pr_err(PN544_HCI_DRIVER_NAME ": CRC error 0x%x != 0x%x 0x%x\n",
250 crc, buf[len - 1], buf[len - 2]);
252 pr_info(DRIVER_DESC ": %s : BAD CRC\n", __func__);
253 print_hex_dump(KERN_DEBUG, "crc: ", DUMP_PREFIX_NONE,
254 16, 2, buf, buflen, false);
261 * Reads an shdlc frame and returns it in a newly allocated sk_buff. Guarantees
262 * that i2c bus will be flushed and that next read will start on a new frame.
263 * returned skb contains only LLC header and payload.
265 * -EREMOTEIO : i2c read error (fatal)
266 * -EBADMSG : frame was incorrect and discarded
267 * -ENOMEM : cannot allocate skb, frame dropped
269 static int pn544_hci_i2c_read(struct i2c_client *client, struct sk_buff **skb)
273 u8 tmp[PN544_HCI_LLC_MAX_SIZE - 1];
275 r = i2c_master_recv(client, &len, 1);
277 dev_err(&client->dev, "cannot read len byte\n");
281 if ((len < (PN544_HCI_LLC_MIN_SIZE - 1)) ||
282 (len > (PN544_HCI_LLC_MAX_SIZE - 1))) {
283 dev_err(&client->dev, "invalid len byte\n");
288 *skb = alloc_skb(1 + len, GFP_KERNEL);
294 *skb_put(*skb, 1) = len;
296 r = i2c_master_recv(client, skb_put(*skb, len), len);
302 r = check_crc((*skb)->data, (*skb)->len);
310 skb_trim(*skb, (*skb)->len - 2);
312 usleep_range(3000, 6000);
317 if (i2c_master_recv(client, tmp, sizeof(tmp)) < 0)
320 usleep_range(3000, 6000);
326 * Reads an shdlc frame from the chip. This is not as straightforward as it
327 * seems. There are cases where we could loose the frame start synchronization.
328 * The frame format is len-data-crc, and corruption can occur anywhere while
329 * transiting on i2c bus, such that we could read an invalid len.
330 * In order to recover synchronization with the next frame, we must be sure
331 * to read the real amount of data without using the len byte. We do this by
332 * assuming the following:
333 * - the chip will always present only one single complete frame on the bus
334 * before triggering the interrupt
335 * - the chip will not present a new frame until we have completely read
336 * the previous one (or until we have handled the interrupt).
337 * The tricky case is when we read a corrupted len that is less than the real
338 * len. We must detect this here in order to determine that we need to flush
339 * the bus. This is the reason why we check the crc here.
341 static irqreturn_t pn544_hci_irq_thread_fn(int irq, void *dev_id)
343 struct pn544_hci_info *info = dev_id;
344 struct i2c_client *client = info->i2c_dev;
345 struct sk_buff *skb = NULL;
349 BUG_ON(irq != info->i2c_dev->irq);
351 dev_dbg(&client->dev, "IRQ\n");
353 if (info->hard_fault != 0)
356 r = pn544_hci_i2c_read(client, &skb);
357 if (r == -EREMOTEIO) {
358 info->hard_fault = r;
360 nfc_shdlc_recv_frame(info->shdlc, NULL);
363 } else if ((r == -ENOMEM) || (r == -EBADMSG)) {
367 nfc_shdlc_recv_frame(info->shdlc, skb);
372 static int pn544_hci_open(struct nfc_shdlc *shdlc)
374 struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc);
377 mutex_lock(&info->info_lock);
379 if (info->state != PN544_ST_COLD) {
384 r = pn544_hci_enable(info, HCI_MODE);
387 info->state = PN544_ST_READY;
390 mutex_unlock(&info->info_lock);
394 static void pn544_hci_close(struct nfc_shdlc *shdlc)
396 struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc);
398 mutex_lock(&info->info_lock);
400 if (info->state == PN544_ST_COLD)
403 pn544_hci_disable(info);
405 info->state = PN544_ST_COLD;
408 mutex_unlock(&info->info_lock);
411 static int pn544_hci_ready(struct nfc_shdlc *shdlc)
413 struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
415 static struct hw_config {
419 {{0x9f, 0x9a}, 0x00},
421 {{0x98, 0x10}, 0xbc},
423 {{0x9e, 0x71}, 0x00},
425 {{0x98, 0x09}, 0x00},
427 {{0x9e, 0xb4}, 0x00},
429 {{0x9e, 0xd9}, 0xff},
430 {{0x9e, 0xda}, 0xff},
431 {{0x9e, 0xdb}, 0x23},
432 {{0x9e, 0xdc}, 0x21},
433 {{0x9e, 0xdd}, 0x22},
434 {{0x9e, 0xde}, 0x24},
436 {{0x9c, 0x01}, 0x08},
438 {{0x9e, 0xaa}, 0x01},
440 {{0x9b, 0xd1}, 0x0d},
441 {{0x9b, 0xd2}, 0x24},
442 {{0x9b, 0xd3}, 0x0a},
443 {{0x9b, 0xd4}, 0x22},
444 {{0x9b, 0xd5}, 0x08},
445 {{0x9b, 0xd6}, 0x1e},
446 {{0x9b, 0xdd}, 0x1c},
448 {{0x9b, 0x84}, 0x13},
449 {{0x99, 0x81}, 0x7f},
450 {{0x99, 0x31}, 0x70},
452 {{0x98, 0x00}, 0x3f},
454 {{0x9f, 0x09}, 0x00},
456 {{0x9f, 0x0a}, 0x05},
458 {{0x9e, 0xd1}, 0xa1},
459 {{0x99, 0x23}, 0x00},
461 {{0x9e, 0x74}, 0x80},
463 {{0x9f, 0x28}, 0x10},
465 {{0x9f, 0x35}, 0x14},
467 {{0x9f, 0x36}, 0x60},
469 {{0x9c, 0x31}, 0x00},
471 {{0x9c, 0x32}, 0xc8},
473 {{0x9c, 0x19}, 0x40},
475 {{0x9c, 0x1a}, 0x40},
477 {{0x9c, 0x0c}, 0x00},
479 {{0x9c, 0x0d}, 0x00},
481 {{0x9c, 0x12}, 0x00},
483 {{0x9c, 0x13}, 0x00},
485 {{0x98, 0xa2}, 0x0e},
487 {{0x98, 0x93}, 0x40},
489 {{0x98, 0x7d}, 0x02},
490 {{0x98, 0x7e}, 0x00},
491 {{0x9f, 0xc8}, 0x01},
493 struct hw_config *p = hw_config;
494 int count = ARRAY_SIZE(hw_config);
495 struct sk_buff *res_skb;
501 param[1] = p->adr[0];
502 param[2] = p->adr[1];
505 r = nfc_hci_send_cmd(hdev, PN544_SYS_MGMT_GATE, PN544_WRITE,
510 if (res_skb->len != 1) {
515 if (res_skb->data[0] != p->value) {
525 param[0] = NFC_HCI_UICC_HOST_ID;
526 r = nfc_hci_set_param(hdev, NFC_HCI_ADMIN_GATE,
527 NFC_HCI_ADMIN_WHITELIST, param, 1);
532 r = nfc_hci_set_param(hdev, PN544_SYS_MGMT_GATE,
533 PN544_SYS_MGMT_INFO_NOTIFICATION, param, 1);
538 r = nfc_hci_set_param(hdev, NFC_HCI_RF_READER_A_GATE,
539 PN544_RF_READER_A_AUTO_ACTIVATION, param, 1);
543 r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
544 NFC_HCI_EVT_END_OPERATION, NULL, 0);
549 r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
550 PN544_PL_NFCT_DEACTIVATED, param, 1);
555 r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
556 PN544_PL_RDPHASES, param, 1);
560 r = nfc_hci_get_param(hdev, NFC_HCI_ID_MGMT_GATE,
561 PN544_ID_MGMT_FULL_VERSION_SW, &skb);
565 if (skb->len != FULL_VERSION_LEN) {
570 print_hex_dump(KERN_DEBUG, "FULL VERSION SOFTWARE INFO: ",
571 DUMP_PREFIX_NONE, 16, 1,
572 skb->data, FULL_VERSION_LEN, false);
579 static int pn544_hci_xmit(struct nfc_shdlc *shdlc, struct sk_buff *skb)
581 struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc);
582 struct i2c_client *client = info->i2c_dev;
584 if (info->hard_fault != 0)
585 return info->hard_fault;
587 return pn544_hci_i2c_write(client, skb->data, skb->len);
590 static int pn544_hci_start_poll(struct nfc_shdlc *shdlc,
591 u32 im_protocols, u32 tm_protocols)
593 struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
599 pr_info(DRIVER_DESC ": %s protocols 0x%x 0x%x\n",
600 __func__, im_protocols, tm_protocols);
602 r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
603 NFC_HCI_EVT_END_OPERATION, NULL, 0);
609 r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
610 PN544_PL_EMULATION, duration, 2);
615 r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
616 PN544_PL_NFCT_DEACTIVATED, &activated, 1);
620 if (im_protocols & (NFC_PROTO_ISO14443_MASK | NFC_PROTO_MIFARE_MASK |
621 NFC_PROTO_JEWEL_MASK))
622 phases |= 1; /* Type A */
623 if (im_protocols & NFC_PROTO_FELICA_MASK) {
624 phases |= (1 << 2); /* Type F 212 */
625 phases |= (1 << 3); /* Type F 424 */
628 phases |= (1 << 5); /* NFC active */
630 r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
631 PN544_PL_RDPHASES, &phases, 1);
635 r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
636 NFC_HCI_EVT_READER_REQUESTED, NULL, 0);
638 nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
639 NFC_HCI_EVT_END_OPERATION, NULL, 0);
644 static int pn544_hci_target_from_gate(struct nfc_shdlc *shdlc, u8 gate,
645 struct nfc_target *target)
648 case PN544_RF_READER_F_GATE:
649 target->supported_protocols = NFC_PROTO_FELICA_MASK;
651 case PN544_RF_READER_JEWEL_GATE:
652 target->supported_protocols = NFC_PROTO_JEWEL_MASK;
653 target->sens_res = 0x0c00;
662 static int pn544_hci_complete_target_discovered(struct nfc_shdlc *shdlc,
664 struct nfc_target *target)
666 struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
667 struct sk_buff *uid_skb;
670 if (target->supported_protocols & NFC_PROTO_MIFARE_MASK) {
671 if (target->nfcid1_len != 4 && target->nfcid1_len != 7 &&
672 target->nfcid1_len != 10)
675 r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE,
676 PN544_RF_READER_CMD_ACTIVATE_NEXT,
677 target->nfcid1, target->nfcid1_len, NULL);
678 } else if (target->supported_protocols & NFC_PROTO_FELICA_MASK) {
679 r = nfc_hci_get_param(hdev, PN544_RF_READER_F_GATE,
680 PN544_FELICA_ID, &uid_skb);
684 if (uid_skb->len != 8) {
689 r = nfc_hci_send_cmd(hdev, PN544_RF_READER_F_GATE,
690 PN544_RF_READER_CMD_ACTIVATE_NEXT,
691 uid_skb->data, uid_skb->len, NULL);
693 } else if (target->supported_protocols & NFC_PROTO_ISO14443_MASK) {
695 * TODO: maybe other ISO 14443 require some kind of continue
696 * activation, but for now we've seen only this one below.
698 if (target->sens_res == 0x4403) /* Type 4 Mifare DESFire */
699 r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE,
700 PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION,
707 #define MIFARE_CMD_AUTH_KEY_A 0x60
708 #define MIFARE_CMD_AUTH_KEY_B 0x61
709 #define MIFARE_CMD_HEADER 2
710 #define MIFARE_UID_LEN 4
711 #define MIFARE_KEY_LEN 6
712 #define MIFARE_CMD_LEN 12
715 * <= 0: driver handled the data exchange
716 * 1: driver doesn't especially handle, please do standard processing
718 static int pn544_hci_data_exchange(struct nfc_shdlc *shdlc,
719 struct nfc_target *target,
721 struct sk_buff **res_skb)
723 struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
726 pr_info(DRIVER_DESC ": %s for gate=%d\n", __func__,
727 target->hci_reader_gate);
729 switch (target->hci_reader_gate) {
730 case NFC_HCI_RF_READER_A_GATE:
731 if (target->supported_protocols & NFC_PROTO_MIFARE_MASK) {
733 * It seems that pn544 is inverting key and UID for
734 * MIFARE authentication commands.
736 if (skb->len == MIFARE_CMD_LEN &&
737 (skb->data[0] == MIFARE_CMD_AUTH_KEY_A ||
738 skb->data[0] == MIFARE_CMD_AUTH_KEY_B)) {
739 u8 uid[MIFARE_UID_LEN];
740 u8 *data = skb->data + MIFARE_CMD_HEADER;
742 memcpy(uid, data + MIFARE_KEY_LEN,
744 memmove(data + MIFARE_UID_LEN, data,
746 memcpy(data, uid, MIFARE_UID_LEN);
749 return nfc_hci_send_cmd(hdev, target->hci_reader_gate,
751 skb->data, skb->len, res_skb);
754 case PN544_RF_READER_F_GATE:
755 *skb_push(skb, 1) = 0;
756 *skb_push(skb, 1) = 0;
758 r = nfc_hci_send_cmd(hdev, target->hci_reader_gate,
760 skb->data, skb->len, res_skb);
762 skb_pull(*res_skb, 1);
764 case PN544_RF_READER_JEWEL_GATE:
765 return nfc_hci_send_cmd(hdev, target->hci_reader_gate,
767 skb->data, skb->len, res_skb);
773 static int pn544_hci_check_presence(struct nfc_shdlc *shdlc,
774 struct nfc_target *target)
776 struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
778 return nfc_hci_send_cmd(hdev, target->hci_reader_gate,
779 PN544_RF_READER_CMD_PRESENCE_CHECK,
783 static struct nfc_shdlc_ops pn544_shdlc_ops = {
784 .open = pn544_hci_open,
785 .close = pn544_hci_close,
786 .hci_ready = pn544_hci_ready,
787 .xmit = pn544_hci_xmit,
788 .start_poll = pn544_hci_start_poll,
789 .target_from_gate = pn544_hci_target_from_gate,
790 .complete_target_discovered = pn544_hci_complete_target_discovered,
791 .data_exchange = pn544_hci_data_exchange,
792 .check_presence = pn544_hci_check_presence,
795 static int __devinit pn544_hci_probe(struct i2c_client *client,
796 const struct i2c_device_id *id)
798 struct pn544_hci_info *info;
799 struct pn544_nfc_platform_data *pdata;
802 struct nfc_hci_init_data init_data;
804 dev_dbg(&client->dev, "%s\n", __func__);
805 dev_dbg(&client->dev, "IRQ: %d\n", client->irq);
807 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
808 dev_err(&client->dev, "Need I2C_FUNC_I2C\n");
812 info = kzalloc(sizeof(struct pn544_hci_info), GFP_KERNEL);
814 dev_err(&client->dev,
815 "Cannot allocate memory for pn544_hci_info.\n");
820 info->i2c_dev = client;
821 info->state = PN544_ST_COLD;
822 mutex_init(&info->info_lock);
823 i2c_set_clientdata(client, info);
825 pdata = client->dev.platform_data;
827 dev_err(&client->dev, "No platform data\n");
832 if (pdata->request_resources == NULL) {
833 dev_err(&client->dev, "request_resources() missing\n");
838 r = pdata->request_resources(client);
840 dev_err(&client->dev, "Cannot get platform resources\n");
844 info->gpio_en = pdata->get_gpio(NFC_GPIO_ENABLE);
845 info->gpio_fw = pdata->get_gpio(NFC_GPIO_FW_RESET);
846 info->gpio_irq = pdata->get_gpio(NFC_GPIO_IRQ);
848 pn544_hci_platform_init(info);
850 r = request_threaded_irq(client->irq, NULL, pn544_hci_irq_thread_fn,
851 IRQF_TRIGGER_RISING, PN544_HCI_DRIVER_NAME,
854 dev_err(&client->dev, "Unable to register IRQ handler\n");
858 init_data.gate_count = ARRAY_SIZE(pn544_gates);
860 memcpy(init_data.gates, pn544_gates, sizeof(pn544_gates));
863 * TODO: Session id must include the driver name + some bus addr
864 * persistent info to discriminate 2 identical chips
866 strcpy(init_data.session_id, "ID544HCI");
868 protocols = NFC_PROTO_JEWEL_MASK |
869 NFC_PROTO_MIFARE_MASK |
870 NFC_PROTO_FELICA_MASK |
871 NFC_PROTO_ISO14443_MASK |
872 NFC_PROTO_NFC_DEP_MASK;
874 info->shdlc = nfc_shdlc_allocate(&pn544_shdlc_ops,
875 &init_data, protocols,
876 PN544_CMDS_HEADROOM, 0,
877 PN544_HCI_LLC_MAX_PAYLOAD,
878 dev_name(&client->dev));
880 dev_err(&client->dev, "Cannot allocate nfc shdlc.\n");
885 nfc_shdlc_set_clientdata(info->shdlc, info);
890 free_irq(client->irq, info);
893 if (pdata->free_resources != NULL)
894 pdata->free_resources();
903 static __devexit int pn544_hci_remove(struct i2c_client *client)
905 struct pn544_hci_info *info = i2c_get_clientdata(client);
906 struct pn544_nfc_platform_data *pdata = client->dev.platform_data;
908 dev_dbg(&client->dev, "%s\n", __func__);
910 nfc_shdlc_free(info->shdlc);
912 if (info->state != PN544_ST_COLD) {
917 free_irq(client->irq, info);
918 if (pdata->free_resources)
919 pdata->free_resources();
926 static struct i2c_driver pn544_hci_driver = {
928 .name = PN544_HCI_DRIVER_NAME,
930 .probe = pn544_hci_probe,
931 .id_table = pn544_hci_id_table,
932 .remove = __devexit_p(pn544_hci_remove),
935 static int __init pn544_hci_init(void)
939 pr_debug(DRIVER_DESC ": %s\n", __func__);
941 r = i2c_add_driver(&pn544_hci_driver);
943 pr_err(PN544_HCI_DRIVER_NAME ": driver registration failed\n");
950 static void __exit pn544_hci_exit(void)
952 i2c_del_driver(&pn544_hci_driver);
955 module_init(pn544_hci_init);
956 module_exit(pn544_hci_exit);
958 MODULE_LICENSE("GPL");
959 MODULE_DESCRIPTION(DRIVER_DESC);