1 /* SPDX-License-Identifier: GPL-2.0 */
6 #define SPRD_DMA_REQ_SHIFT 16
7 #define SPRD_DMA_FLAGS(req_mode, int_type) \
8 ((req_mode) << SPRD_DMA_REQ_SHIFT | (int_type))
11 * enum sprd_dma_req_mode: define the DMA request mode
12 * @SPRD_DMA_FRAG_REQ: fragment request mode
13 * @SPRD_DMA_BLK_REQ: block request mode
14 * @SPRD_DMA_TRANS_REQ: transaction request mode
15 * @SPRD_DMA_LIST_REQ: link-list request mode
17 * We have 4 types request mode: fragment mode, block mode, transaction mode
18 * and linklist mode. One transaction can contain several blocks, one block can
19 * contain several fragments. Link-list mode means we can save several DMA
20 * configuration into one reserved memory, then DMA can fetch each DMA
21 * configuration automatically to start transfer.
23 enum sprd_dma_req_mode {
31 * enum sprd_dma_int_type: define the DMA interrupt type
32 * @SPRD_DMA_NO_INT: do not need generate DMA interrupts.
33 * @SPRD_DMA_FRAG_INT: fragment done interrupt when one fragment request
35 * @SPRD_DMA_BLK_INT: block done interrupt when one block request is done.
36 * @SPRD_DMA_BLK_FRAG_INT: block and fragment interrupt when one fragment
37 * or one block request is done.
38 * @SPRD_DMA_TRANS_INT: tansaction done interrupt when one transaction
40 * @SPRD_DMA_TRANS_FRAG_INT: transaction and fragment interrupt when one
41 * transaction request or fragment request is done.
42 * @SPRD_DMA_TRANS_BLK_INT: transaction and block interrupt when one
43 * transaction request or block request is done.
44 * @SPRD_DMA_LIST_INT: link-list done interrupt when one link-list request
46 * @SPRD_DMA_CFGERR_INT: configure error interrupt when configuration is
49 enum sprd_dma_int_type {
53 SPRD_DMA_BLK_FRAG_INT,
55 SPRD_DMA_TRANS_FRAG_INT,
56 SPRD_DMA_TRANS_BLK_INT,
62 * struct sprd_dma_linklist - DMA link-list address structure
63 * @virt_addr: link-list virtual address to configure link-list node
64 * @phy_addr: link-list physical address to link DMA transfer
66 * The Spreadtrum DMA controller supports the link-list mode, that means slaves
67 * can supply several groups configurations (each configuration represents one
68 * DMA transfer) saved in memory, and DMA controller will link these groups
69 * configurations by writing the physical address of each configuration into the
72 * Just as shown below, the link-list pointer register will be pointed to the
73 * physical address of 'configuration 1', and the 'configuration 1' link-list
74 * pointer will be pointed to 'configuration 2', and so on.
75 * Once trigger the DMA transfer, the DMA controller will load 'configuration
76 * 1' to its registers automatically, after 'configuration 1' transaction is
77 * done, DMA controller will load 'configuration 2' automatically, until all
78 * DMA transactions are done.
80 * Note: The last link-list pointer should point to the physical address
81 * of 'configuration 1', which can avoid DMA controller loads incorrect
82 * configuration when the last configuration transaction is done.
84 * DMA controller linklist memory
85 * ====================== -----------------------
86 *| | | configuration 1 |<---
87 *| DMA controller | ------->| | |
91 *| linklist pointer reg |---- ----| linklist pointer | |
92 * ====================== | ----------------------- |
94 * | ----------------------- |
95 * | | configuration 2 | |
100 * ----| linklist pointer | |
101 * | ----------------------- |
103 * | ----------------------- |
104 * | | configuration 3 | |
112 * | ----------------------- |
113 * | | configuration n | |
118 * | linklist pointer |----
119 * -----------------------
121 * To support the link-list mode, DMA slaves should allocate one segment memory
122 * from always-on IRAM or dma coherent memory to store these groups of DMA
123 * configuration, and pass the virtual and physical address to DMA controller.
125 struct sprd_dma_linklist {
126 unsigned long virt_addr;
127 phys_addr_t phy_addr;