sound/soc/codecs/es8326.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 //
   3 // es8326.c -- es8326 ALSA SoC audio driver
   4 // Copyright Everest Semiconductor Co., Ltd
   5 //
   6 // Authors: David Yang <[email protected]>
   7 //
   8
   9 #include <linux/clk.h>
  10 #include <linux/i2c.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/irq.h>
  13 #include <linux/module.h>
  14 #include <sound/jack.h>
  15 #include <sound/pcm_params.h>
  16 #include <sound/soc.h>
  17 #include <sound/soc-dapm.h>
  18 #include <sound/tlv.h>
  19 #include "es8326.h"
  20
  21 struct es8326_priv {
  22         struct clk *mclk;
  23         struct i2c_client *i2c;
  24         struct regmap *regmap;
  25         struct snd_soc_component *component;
  26         struct delayed_work jack_detect_work;
  27         struct delayed_work button_press_work;
  28         struct snd_soc_jack *jack;
  29         int irq;
  30         /* The lock protects the situation that an irq is generated
  31          * while enabling or disabling or during an irq.
  32          */
  33         struct mutex lock;
  34         u8 jack_pol;
  35         u8 interrupt_src;
  36         u8 interrupt_clk;
  37         u8 hpl_vol;
  38         u8 hpr_vol;
  39         bool jd_inverted;
  40         unsigned int sysclk;
  41
  42         bool calibrated;
  43         int version;
  44         int hp;
  45         int jack_remove_retry;
  46 };
  47
  48 static int es8326_crosstalk1_get(struct snd_kcontrol *kcontrol,
  49                 struct snd_ctl_elem_value *ucontrol)
  50 {
  51         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
  52         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
  53         unsigned int crosstalk_h, crosstalk_l;
  54         unsigned int crosstalk;
  55
  56         regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h);
  57         regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
  58         crosstalk_h &= 0x20;
  59         crosstalk_l &= 0xf0;
  60         crosstalk = crosstalk_h >> 1 | crosstalk_l >> 4;
  61         ucontrol->value.integer.value[0] = crosstalk;
  62
  63         return 0;
  64 }
  65
  66 static int es8326_crosstalk1_set(struct snd_kcontrol *kcontrol,
  67                 struct snd_ctl_elem_value *ucontrol)
  68 {
  69         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
  70         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
  71         unsigned int crosstalk_h, crosstalk_l;
  72         unsigned int crosstalk;
  73
  74         crosstalk = ucontrol->value.integer.value[0];
  75         regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
  76         crosstalk_h = (crosstalk & 0x10) << 1;
  77         crosstalk_l &= 0x0f;
  78         crosstalk_l |= (crosstalk & 0x0f) << 4;
  79         regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE,
  80                         0x20, crosstalk_h);
  81         regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l);
  82
  83         return 0;
  84 }
  85
  86 static int es8326_crosstalk2_get(struct snd_kcontrol *kcontrol,
  87                 struct snd_ctl_elem_value *ucontrol)
  88 {
  89         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
  90         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
  91         unsigned int crosstalk_h, crosstalk_l;
  92         unsigned int crosstalk;
  93
  94         regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h);
  95         regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
  96         crosstalk_h &= 0x10;
  97         crosstalk_l &= 0x0f;
  98         crosstalk = crosstalk_h  | crosstalk_l;
  99         ucontrol->value.integer.value[0] = crosstalk;
 100
 101         return 0;
 102 }
 103
 104 static int es8326_crosstalk2_set(struct snd_kcontrol *kcontrol,
 105                 struct snd_ctl_elem_value *ucontrol)
 106 {
 107         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 108         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
 109         unsigned int crosstalk_h, crosstalk_l;
 110         unsigned int crosstalk;
 111
 112         crosstalk = ucontrol->value.integer.value[0];
 113         regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
 114         crosstalk_h = crosstalk & 0x10;
 115         crosstalk_l &= 0xf0;
 116         crosstalk_l |= crosstalk & 0x0f;
 117         regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE,
 118                         0x10, crosstalk_h);
 119         regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l);
 120
 121         return 0;
 122 }
 123
 124 static int es8326_hplvol_get(struct snd_kcontrol *kcontrol,
 125                 struct snd_ctl_elem_value *ucontrol)
 126 {
 127         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 128         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
 129
 130         ucontrol->value.integer.value[0] = es8326->hpl_vol;
 131
 132         return 0;
 133 }
 134
 135 static int es8326_hplvol_set(struct snd_kcontrol *kcontrol,
 136                 struct snd_ctl_elem_value *ucontrol)
 137 {
 138         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 139         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
 140         unsigned int hp_vol;
 141
 142         hp_vol = ucontrol->value.integer.value[0];
 143         if (hp_vol > 5)
 144                 return -EINVAL;
 145         if (es8326->hpl_vol != hp_vol) {
 146                 es8326->hpl_vol = hp_vol;
 147                 if (hp_vol >= 3)
 148                         hp_vol++;
 149                 regmap_update_bits(es8326->regmap, ES8326_HP_VOL,
 150                                 0x70, (hp_vol << 4));
 151                 return 1;
 152         }
 153
 154         return 0;
 155 }
 156
 157 static int es8326_hprvol_get(struct snd_kcontrol *kcontrol,
 158                 struct snd_ctl_elem_value *ucontrol)
 159 {
 160         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 161         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
 162
 163         ucontrol->value.integer.value[0] = es8326->hpr_vol;
 164
 165         return 0;
 166 }
 167
 168 static int es8326_hprvol_set(struct snd_kcontrol *kcontrol,
 169                 struct snd_ctl_elem_value *ucontrol)
 170 {
 171         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 172         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
 173         unsigned int hp_vol;
 174
 175         hp_vol = ucontrol->value.integer.value[0];
 176         if (hp_vol > 5)
 177                 return -EINVAL;
 178         if (es8326->hpr_vol != hp_vol) {
 179                 es8326->hpr_vol = hp_vol;
 180                 if (hp_vol >= 3)
 181                         hp_vol++;
 182                 regmap_update_bits(es8326->regmap, ES8326_HP_VOL,
 183                                 0x07, hp_vol);
 184                 return 1;
 185         }
 186
 187         return 0;
 188 }
 189
 190 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9550, 50, 0);
 191 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9550, 50, 0);
 192 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_analog_pga_tlv, 0, 300, 0);
 193 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_pga_tlv, 0, 600, 0);
 194 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(softramp_rate, 0, 100, 0);
 195 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_target_tlv, -3200, 200, 0);
 196 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_recovery_tlv, -125, 250, 0);
 197
 198 static const char *const winsize[] = {
 199         "0.25db/2  LRCK",
 200         "0.25db/4  LRCK",
 201         "0.25db/8  LRCK",
 202         "0.25db/16  LRCK",
 203         "0.25db/32  LRCK",
 204         "0.25db/64  LRCK",
 205         "0.25db/128  LRCK",
 206         "0.25db/256  LRCK",
 207         "0.25db/512  LRCK",
 208         "0.25db/1024  LRCK",
 209         "0.25db/2048  LRCK",
 210         "0.25db/4096  LRCK",
 211         "0.25db/8192  LRCK",
 212         "0.25db/16384  LRCK",
 213         "0.25db/32768  LRCK",
 214         "0.25db/65536  LRCK",
 215 };
 216
 217 static const char *const dacpol_txt[] = {
 218         "Normal", "R Invert", "L Invert", "L + R Invert" };
 219
 220 static const char *const hp_spkvol_switch[] = {
 221         "HPVOL: HPL+HPL, SPKVOL: HPL+HPL",
 222         "HPVOL: HPL+HPR, SPKVOL: HPL+HPR",
 223         "HPVOL: HPL+HPL, SPKVOL: SPKL+SPKR",
 224         "HPVOL: HPL+HPR, SPKVOL: SPKL+SPKR",
 225 };
 226
 227 static const struct soc_enum dacpol =
 228         SOC_ENUM_SINGLE(ES8326_DAC_DSM, 4, 4, dacpol_txt);
 229 static const struct soc_enum alc_winsize =
 230         SOC_ENUM_SINGLE(ES8326_ADC_RAMPRATE, 4, 16, winsize);
 231 static const struct soc_enum drc_winsize =
 232         SOC_ENUM_SINGLE(ES8326_DRC_WINSIZE, 4, 16, winsize);
 233 static const struct soc_enum hpvol_spkvol_switch =
 234         SOC_ENUM_SINGLE(ES8326_HP_MISC, 6, 4, hp_spkvol_switch);
 235
 236 static const struct snd_kcontrol_new es8326_snd_controls[] = {
 237         SOC_SINGLE_TLV("DAC Playback Volume", ES8326_DACL_VOL, 0, 0xbf, 0, dac_vol_tlv),
 238         SOC_ENUM("Playback Polarity", dacpol),
 239         SOC_SINGLE_TLV("DAC Ramp Rate", ES8326_DAC_RAMPRATE, 0, 0x0f, 0, softramp_rate),
 240         SOC_SINGLE_TLV("DRC Recovery Level", ES8326_DRC_RECOVERY, 0, 4, 0, drc_recovery_tlv),
 241         SOC_ENUM("DRC Winsize", drc_winsize),
 242         SOC_SINGLE_TLV("DRC Target Level", ES8326_DRC_WINSIZE, 0, 0x0f, 0, drc_target_tlv),
 243
 244         SOC_DOUBLE_R_TLV("ADC Capture Volume", ES8326_ADC1_VOL, ES8326_ADC2_VOL, 0, 0xff, 0,
 245                          adc_vol_tlv),
 246         SOC_DOUBLE_TLV("ADC PGA Volume", ES8326_ADC_SCALE, 4, 0, 5, 0, adc_pga_tlv),
 247         SOC_SINGLE_TLV("ADC PGA Gain Volume", ES8326_PGAGAIN, 0, 10, 0, adc_analog_pga_tlv),
 248         SOC_SINGLE_TLV("ADC Ramp Rate", ES8326_ADC_RAMPRATE, 0, 0x0f, 0, softramp_rate),
 249         SOC_SINGLE("ALC Capture Switch", ES8326_ALC_RECOVERY, 3, 1, 0),
 250         SOC_SINGLE_TLV("ALC Capture Recovery Level", ES8326_ALC_LEVEL,
 251                         0, 4, 0, drc_recovery_tlv),
 252         SOC_ENUM("ALC Capture Winsize", alc_winsize),
 253         SOC_SINGLE_TLV("ALC Capture Target Level", ES8326_ALC_LEVEL,
 254                         0, 0x0f, 0, drc_target_tlv),
 255
 256         SOC_SINGLE_EXT("CROSSTALK1", SND_SOC_NOPM, 0, 31, 0,
 257                         es8326_crosstalk1_get, es8326_crosstalk1_set),
 258         SOC_SINGLE_EXT("CROSSTALK2", SND_SOC_NOPM, 0, 31, 0,
 259                         es8326_crosstalk2_get, es8326_crosstalk2_set),
 260         SOC_SINGLE_EXT("HPL Volume", SND_SOC_NOPM, 0, 5, 0,
 261                         es8326_hplvol_get, es8326_hplvol_set),
 262         SOC_SINGLE_EXT("HPR Volume", SND_SOC_NOPM, 0, 5, 0,
 263                         es8326_hprvol_get, es8326_hprvol_set),
 264
 265         SOC_SINGLE_TLV("HPL Playback Volume", ES8326_DACL_VOL, 0, 0xbf, 0, dac_vol_tlv),
 266         SOC_SINGLE_TLV("HPR Playback Volume", ES8326_DACR_VOL, 0, 0xbf, 0, dac_vol_tlv),
 267         SOC_SINGLE_TLV("SPKL Playback Volume", ES8326_SPKL_VOL, 0, 0xbf, 0, dac_vol_tlv),
 268         SOC_SINGLE_TLV("SPKR Playback Volume", ES8326_SPKR_VOL, 0, 0xbf, 0, dac_vol_tlv),
 269
 270         SOC_ENUM("HPVol SPKVol Switch", hpvol_spkvol_switch),
 271 };
 272
 273 static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = {
 274         SND_SOC_DAPM_INPUT("MIC1"),
 275         SND_SOC_DAPM_INPUT("MIC2"),
 276         SND_SOC_DAPM_INPUT("MIC3"),
 277         SND_SOC_DAPM_INPUT("MIC4"),
 278
 279         SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
 280         SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
 281
 282         /* Digital Interface */
 283         SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S1 Capture", 0, SND_SOC_NOPM, 0, 0),
 284         SND_SOC_DAPM_AIF_IN("I2S IN", "I2S1 Playback", 0, SND_SOC_NOPM, 0, 0),
 285
 286         /* Analog Power Supply*/
 287         SND_SOC_DAPM_DAC("Right DAC", NULL, ES8326_ANA_PDN, 0, 1),
 288         SND_SOC_DAPM_DAC("Left DAC", NULL, ES8326_ANA_PDN, 1, 1),
 289         SND_SOC_DAPM_SUPPLY("MICBIAS1", ES8326_ANA_MICBIAS, 2, 0, NULL, 0),
 290         SND_SOC_DAPM_SUPPLY("MICBIAS2", ES8326_ANA_MICBIAS, 3, 0, NULL, 0),
 291
 292         SND_SOC_DAPM_PGA("LHPMIX", ES8326_DAC2HPMIX, 7, 0, NULL, 0),
 293         SND_SOC_DAPM_PGA("RHPMIX", ES8326_DAC2HPMIX, 3, 0, NULL, 0),
 294
 295         SND_SOC_DAPM_OUTPUT("HPOL"),
 296         SND_SOC_DAPM_OUTPUT("HPOR"),
 297 };
 298
 299 static const struct snd_soc_dapm_route es8326_dapm_routes[] = {
 300         {"ADC L", NULL, "MIC1"},
 301         {"ADC R", NULL, "MIC2"},
 302         {"ADC L", NULL, "MIC3"},
 303         {"ADC R", NULL, "MIC4"},
 304
 305         {"I2S OUT", NULL, "ADC L"},
 306         {"I2S OUT", NULL, "ADC R"},
 307
 308         {"Right DAC", NULL, "I2S IN"},
 309         {"Left DAC", NULL, "I2S IN"},
 310
 311         {"LHPMIX", NULL, "Left DAC"},
 312         {"RHPMIX", NULL, "Right DAC"},
 313
 314         {"HPOL", NULL, "LHPMIX"},
 315         {"HPOR", NULL, "RHPMIX"},
 316 };
 317
 318 static bool es8326_volatile_register(struct device *dev, unsigned int reg)
 319 {
 320         switch (reg) {
 321         case ES8326_HPL_OFFSET_INI:
 322         case ES8326_HPR_OFFSET_INI:
 323         case ES8326_HPDET_STA:
 324         case ES8326_CTIA_OMTP_STA:
 325         case ES8326_CSM_MUTE_STA:
 326                 return true;
 327         default:
 328                 return false;
 329         }
 330 }
 331
 332 static bool es8326_writeable_register(struct device *dev, unsigned int reg)
 333 {
 334         switch (reg) {
 335         case ES8326_BIAS_SW1:
 336         case ES8326_BIAS_SW2:
 337         case ES8326_BIAS_SW3:
 338         case ES8326_BIAS_SW4:
 339         case ES8326_ADC_HPFS1:
 340         case ES8326_ADC_HPFS2:
 341                 return false;
 342         default:
 343                 return true;
 344         }
 345 }
 346
 347 static const struct regmap_config es8326_regmap_config = {
 348         .reg_bits = 8,
 349         .val_bits = 8,
 350         .max_register = 0xff,
 351         .use_single_read = true,
 352         .use_single_write = true,
 353         .volatile_reg = es8326_volatile_register,
 354         .writeable_reg = es8326_writeable_register,
 355         .cache_type = REGCACHE_RBTREE,
 356 };
 357
 358 struct _coeff_div {
 359         u16 fs;
 360         u32 rate;
 361         u32 mclk;
 362         u8 reg4;
 363         u8 reg5;
 364         u8 reg6;
 365         u8 reg7;
 366         u8 reg8;
 367         u8 reg9;
 368         u8 rega;
 369         u8 regb;
 370 };
 371
 372 /* codec hifi mclk clock divider coefficients */
 373 /* {ratio, LRCK, MCLK, REG04, REG05, REG06, REG07, REG08, REG09, REG10, REG11} */
 374 static const struct _coeff_div coeff_div_v0[] = {
 375         {64, 8000, 512000, 0x60, 0x01, 0x0F, 0x75, 0x0A, 0x1B, 0x1F, 0x7F},
 376         {64, 16000, 1024000, 0x20, 0x00, 0x33, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
 377         {64, 44100, 2822400, 0xE0, 0x00, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 378         {64, 48000, 3072000, 0xE0, 0x00, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 379         {128, 8000, 1024000, 0x60, 0x00, 0x33, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
 380         {128, 16000, 2048000, 0x20, 0x00, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
 381         {128, 44100, 5644800, 0xE0, 0x01, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 382         {128, 48000, 6144000, 0xE0, 0x01, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 383
 384         {192, 32000, 6144000, 0xE0, 0x02, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 385         {256, 8000, 2048000, 0x60, 0x00, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
 386         {256, 16000, 4096000, 0x20, 0x01, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
 387         {256, 44100, 11289600, 0xE0, 0x00, 0x30, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 388         {256, 48000, 12288000, 0xE0, 0x00, 0x30, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 389         {384, 32000, 12288000, 0xE0, 0x05, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 390         {400, 48000, 19200000, 0xE9, 0x04, 0x0F, 0x6d, 0x4A, 0x0A, 0x1F, 0x1F},
 391
 392         {500, 48000, 24000000, 0xF8, 0x04, 0x3F, 0x6D, 0x4A, 0x0A, 0x1F, 0x1F},
 393         {512, 8000, 4096000, 0x60, 0x01, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
 394         {512, 16000, 8192000, 0x20, 0x00, 0x30, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
 395         {512, 44100, 22579200, 0xE0, 0x00, 0x00, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 396         {512, 48000, 24576000, 0xE0, 0x00, 0x00, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 397         {768, 32000, 24576000, 0xE0, 0x02, 0x30, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 398         {1024, 8000, 8192000, 0x60, 0x00, 0x30, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
 399         {1024, 16000, 16384000, 0x20, 0x00, 0x00, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
 400 };
 401
 402 static const struct _coeff_div coeff_div_v3[] = {
 403         {32, 8000, 256000, 0x60, 0x00, 0x0F, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
 404         {32, 16000, 512000, 0x20, 0x00, 0x0D, 0x75, 0x8A, 0x1B, 0x1F, 0x3F},
 405         {32, 44100, 1411200, 0x00, 0x00, 0x13, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},
 406         {32, 48000, 1536000, 0x00, 0x00, 0x13, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},
 407         {36, 8000, 288000, 0x20, 0x00, 0x0D, 0x75, 0x8A, 0x1B, 0x23, 0x47},
 408         {36, 16000, 576000, 0x20, 0x00, 0x0D, 0x75, 0x8A, 0x1B, 0x23, 0x47},
 409         {48, 8000, 384000, 0x60, 0x02, 0x1F, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
 410         {48, 16000, 768000, 0x20, 0x02, 0x0F, 0x75, 0x8A, 0x1B, 0x1F, 0x3F},
 411         {48, 48000, 2304000, 0x00, 0x02, 0x0D, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},
 412
 413         {64, 8000, 512000, 0x60, 0x00, 0x35, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
 414         {64, 16000, 1024000, 0x20, 0x00, 0x05, 0x75, 0x8A, 0x1B, 0x1F, 0x3F},
 415         {64, 44100, 2822400, 0xE0, 0x00, 0x31, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
 416         {64, 48000, 3072000, 0xE0, 0x00, 0x31, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
 417         {72, 8000, 576000, 0x20, 0x00, 0x13, 0x35, 0x8A, 0x1B, 0x23, 0x47},
 418         {72, 16000, 1152000, 0x20, 0x00, 0x05, 0x75, 0x8A, 0x1B, 0x23, 0x47},
 419         {96, 8000, 768000, 0x60, 0x02, 0x1D, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
 420         {96, 16000, 1536000, 0x20, 0x02, 0x0D, 0x75, 0x8A, 0x1B, 0x1F, 0x3F},
 421         {100, 48000, 4800000, 0x04, 0x04, 0x3F, 0x6D, 0xB8, 0x08, 0x4f, 0x1f},
 422         {125, 48000, 6000000, 0x04, 0x04, 0x1F, 0x2D, 0x8A, 0x0A, 0x27, 0x27},
 423
 424         {128, 8000, 1024000, 0x60, 0x00, 0x05, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
 425         {128, 16000, 2048000, 0x20, 0x00, 0x31, 0x35, 0x08, 0x19, 0x1F, 0x3F},
 426         {128, 44100, 5644800, 0xE0, 0x00, 0x01, 0x2D, 0x48, 0x08, 0x1F, 0x1F},
 427         {128, 48000, 6144000, 0xE0, 0x00, 0x01, 0x2D, 0x48, 0x08, 0x1F, 0x1F},
 428         {144, 8000, 1152000, 0x20, 0x00, 0x03, 0x35, 0x8A, 0x1B, 0x23, 0x47},
 429         {144, 16000, 2304000, 0x20, 0x00, 0x11, 0x35, 0x8A, 0x1B, 0x23, 0x47},
 430         {192, 8000, 1536000, 0x60, 0x02, 0x0D, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
 431         {192, 32000, 6144000, 0xE0, 0x02, 0x31, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
 432         {192, 16000, 3072000, 0x20, 0x02, 0x05, 0x75, 0xCA, 0x1B, 0x1F, 0x3F},
 433
 434         {200, 48000, 9600000, 0x04, 0x04, 0x0F, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
 435         {250, 48000, 12000000, 0x04, 0x04, 0x0F, 0x2D, 0xCA, 0x0A, 0x27, 0x27},
 436         {256, 8000, 2048000, 0x60, 0x00, 0x31, 0x35, 0x08, 0x19, 0x1F, 0x7F},
 437         {256, 16000, 4096000, 0x20, 0x00, 0x01, 0x35, 0x08, 0x19, 0x1F, 0x3F},
 438         {256, 44100, 11289600, 0xE0, 0x01, 0x01, 0x2D, 0x48, 0x08, 0x1F, 0x1F},
 439         {256, 48000, 12288000, 0xE0, 0x01, 0x01, 0x2D, 0x48, 0x08, 0x1F, 0x1F},
 440         {288, 8000, 2304000, 0x20, 0x00, 0x01, 0x35, 0x8A, 0x1B, 0x23, 0x47},
 441         {384, 8000, 3072000, 0x60, 0x02, 0x05, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
 442         {384, 16000, 6144000, 0x20, 0x02, 0x03, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},
 443         {384, 32000, 12288000, 0xE0, 0x02, 0x01, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
 444         {384, 48000, 18432000, 0x00, 0x02, 0x01, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},
 445
 446         {400, 48000, 19200000, 0xE4, 0x04, 0x35, 0x6d, 0xCA, 0x0A, 0x1F, 0x1F},
 447         {500, 48000, 24000000, 0xF8, 0x04, 0x3F, 0x6D, 0xCA, 0x0A, 0x1F, 0x1F},
 448         {512, 8000, 4096000, 0x60, 0x00, 0x01, 0x08, 0x19, 0x1B, 0x1F, 0x7F},
 449         {512, 16000, 8192000, 0x20, 0x00, 0x30, 0x35, 0x08, 0x19, 0x1F, 0x3F},
 450         {512, 44100, 22579200, 0xE0, 0x00, 0x00, 0x2D, 0x48, 0x08, 0x1F, 0x1F},
 451         {512, 48000, 24576000, 0xE0, 0x00, 0x00, 0x2D, 0x48, 0x08, 0x1F, 0x1F},
 452         {768, 8000, 6144000, 0x60, 0x02, 0x11, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},
 453         {768, 16000, 12288000, 0x20, 0x02, 0x01, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},
 454         {768, 32000, 24576000, 0xE0, 0x02, 0x30, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
 455         {800, 48000, 38400000, 0x00, 0x18, 0x13, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},
 456
 457         {1024, 8000, 8192000, 0x60, 0x00, 0x30, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},
 458         {1024, 16000, 16384000, 0x20, 0x00, 0x00, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},
 459         {1152, 16000, 18432000, 0x20, 0x08, 0x11, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},
 460         {1536, 8000, 12288000, 0x60, 0x02, 0x01, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},
 461         {1536, 16000, 24576000, 0x20, 0x02, 0x10, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},
 462         {1625, 8000, 13000000, 0x0C, 0x18, 0x1F, 0x2D, 0x8A, 0x0A, 0x27, 0x27},
 463         {1625, 16000, 26000000, 0x0C, 0x18, 0x1F, 0x2D, 0x8A, 0x0A, 0x27, 0x27},
 464         {2048, 8000, 16384000, 0x60, 0x00, 0x00, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},
 465         {2304, 8000, 18432000, 0x40, 0x02, 0x10, 0x35, 0x8A, 0x1B, 0x1F, 0x5F},
 466         {3072, 8000, 24576000, 0x60, 0x02, 0x10, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},
 467         {3250, 8000, 26000000, 0x0C, 0x18, 0x0F, 0x2D, 0x8A, 0x0A, 0x27, 0x27},
 468 };
 469
 470 static inline int get_coeff(int mclk, int rate, int array,
 471                                 const struct _coeff_div *coeff_div)
 472 {
 473         int i;
 474
 475         for (i = 0; i < array; i++) {
 476                 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
 477                         return i;
 478         }
 479
 480         return -EINVAL;
 481 }
 482
 483 static int es8326_set_dai_sysclk(struct snd_soc_dai *codec_dai,
 484                                  int clk_id, unsigned int freq, int dir)
 485 {
 486         struct snd_soc_component *codec = codec_dai->component;
 487         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(codec);
 488
 489         es8326->sysclk = freq;
 490
 491         return 0;
 492 }
 493
 494 static int es8326_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
 495 {
 496         struct snd_soc_component *component = codec_dai->component;
 497         u8 iface = 0;
 498
 499         switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
 500         case SND_SOC_DAIFMT_CBC_CFP:
 501                 snd_soc_component_update_bits(component, ES8326_RESET,
 502                                               ES8326_MASTER_MODE_EN, ES8326_MASTER_MODE_EN);
 503                 break;
 504         case SND_SOC_DAIFMT_CBC_CFC:
 505                 break;
 506         default:
 507                 return -EINVAL;
 508         }
 509
 510         /* interface format */
 511         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 512         case SND_SOC_DAIFMT_I2S:
 513                 break;
 514         case SND_SOC_DAIFMT_RIGHT_J:
 515                 dev_err(component->dev, "Codec driver does not support right justified\n");
 516                 return -EINVAL;
 517         case SND_SOC_DAIFMT_LEFT_J:
 518                 iface |= ES8326_DAIFMT_LEFT_J;
 519                 break;
 520         case SND_SOC_DAIFMT_DSP_A:
 521                 iface |= ES8326_DAIFMT_DSP_A;
 522                 break;
 523         case SND_SOC_DAIFMT_DSP_B:
 524                 iface |= ES8326_DAIFMT_DSP_B;
 525                 break;
 526         default:
 527                 return -EINVAL;
 528         }
 529
 530         snd_soc_component_update_bits(component, ES8326_FMT, ES8326_DAIFMT_MASK, iface);
 531
 532         return 0;
 533 }
 534
 535 static int es8326_pcm_hw_params(struct snd_pcm_substream *substream,
 536                                 struct snd_pcm_hw_params *params,
 537                                 struct snd_soc_dai *dai)
 538 {
 539         struct snd_soc_component *component = dai->component;
 540         const struct _coeff_div *coeff_div;
 541         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
 542         u8 srate = 0;
 543         int coeff, array;
 544
 545         if (es8326->version == 0) {
 546                 coeff_div =  coeff_div_v0;
 547                 array = ARRAY_SIZE(coeff_div_v0);
 548         } else {
 549                 coeff_div =  coeff_div_v3;
 550                 array = ARRAY_SIZE(coeff_div_v3);
 551         }
 552         coeff = get_coeff(es8326->sysclk, params_rate(params), array, coeff_div);
 553         /* bit size */
 554         switch (params_format(params)) {
 555         case SNDRV_PCM_FORMAT_S16_LE:
 556                 srate |= ES8326_S16_LE;
 557                 break;
 558         case SNDRV_PCM_FORMAT_S20_3LE:
 559                 srate |= ES8326_S20_3_LE;
 560                 break;
 561         case SNDRV_PCM_FORMAT_S18_3LE:
 562                 srate |= ES8326_S18_LE;
 563                 break;
 564         case SNDRV_PCM_FORMAT_S24_LE:
 565                 srate |= ES8326_S24_LE;
 566                 break;
 567         case SNDRV_PCM_FORMAT_S32_LE:
 568                 srate |= ES8326_S32_LE;
 569                 break;
 570         default:
 571                 return -EINVAL;
 572         }
 573
 574         /* set iface & srate */
 575         snd_soc_component_update_bits(component, ES8326_FMT, ES8326_DATA_LEN_MASK, srate);
 576
 577         if (coeff >= 0) {
 578                 regmap_write(es8326->regmap,  ES8326_CLK_DIV1,
 579                              coeff_div[coeff].reg4);
 580                 regmap_write(es8326->regmap,  ES8326_CLK_DIV2,
 581                              coeff_div[coeff].reg5);
 582                 regmap_write(es8326->regmap,  ES8326_CLK_DLL,
 583                              coeff_div[coeff].reg6);
 584                 regmap_write(es8326->regmap,  ES8326_CLK_MUX,
 585                              coeff_div[coeff].reg7);
 586                 regmap_write(es8326->regmap,  ES8326_CLK_ADC_SEL,
 587                              coeff_div[coeff].reg8);
 588                 regmap_write(es8326->regmap,  ES8326_CLK_DAC_SEL,
 589                              coeff_div[coeff].reg9);
 590                 regmap_write(es8326->regmap,  ES8326_CLK_ADC_OSR,
 591                              coeff_div[coeff].rega);
 592                 regmap_write(es8326->regmap,  ES8326_CLK_DAC_OSR,
 593                              coeff_div[coeff].regb);
 594         } else {
 595                 dev_warn(component->dev, "Clock coefficients do not match");
 596         }
 597
 598         return 0;
 599 }
 600
 601 static int es8326_mute(struct snd_soc_dai *dai, int mute, int direction)
 602 {
 603         struct snd_soc_component *component = dai->component;
 604         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
 605         unsigned int offset_l, offset_r;
 606
 607         if (mute) {
 608                 if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
 609                         regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);
 610                         regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
 611                                         ES8326_MUTE_MASK, ES8326_MUTE);
 612                         regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF,
 613                                         0x30, 0x00);
 614                 } else {
 615                         regmap_update_bits(es8326->regmap,  ES8326_ADC_MUTE,
 616                                         0x0F, 0x0F);
 617                         if (es8326->version > ES8326_VERSION_B) {
 618                                 regmap_update_bits(es8326->regmap, ES8326_VMIDSEL, 0x40, 0x40);
 619                                 regmap_update_bits(es8326->regmap, ES8326_ANA_MICBIAS, 0x70, 0x30);
 620                         }
 621                 }
 622         } else {
 623                 if (!es8326->calibrated) {
 624                         regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_FORCE_CAL);
 625                         msleep(30);
 626                         regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);
 627                         regmap_read(es8326->regmap, ES8326_HPL_OFFSET_INI, &offset_l);
 628                         regmap_read(es8326->regmap, ES8326_HPR_OFFSET_INI, &offset_r);
 629                         regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c);
 630                         regmap_write(es8326->regmap, ES8326_HPL_OFFSET_INI, offset_l);
 631                         regmap_write(es8326->regmap, ES8326_HPR_OFFSET_INI, offset_r);
 632                         es8326->calibrated = true;
 633                 }
 634                 regmap_update_bits(es8326->regmap, ES8326_CLK_INV, 0xc0, 0x00);
 635                 regmap_update_bits(es8326->regmap, ES8326_CLK_MUX, 0x80, 0x00);
 636                 if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
 637                         regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x01);
 638                         usleep_range(1000, 5000);
 639                         regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x00);
 640                         usleep_range(1000, 5000);
 641                         regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x20);
 642                         regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x30);
 643                         regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);
 644                         regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON);
 645                         regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
 646                                         ES8326_MUTE_MASK, ~(ES8326_MUTE));
 647                 } else {
 648                         msleep(300);
 649                         if (es8326->version > ES8326_VERSION_B) {
 650                                 regmap_update_bits(es8326->regmap, ES8326_ANA_MICBIAS, 0x70, 0x70);
 651                                 regmap_update_bits(es8326->regmap, ES8326_VMIDSEL, 0x40, 0x00);
 652                         }
 653                         regmap_update_bits(es8326->regmap,  ES8326_ADC_MUTE,
 654                                         0x0F, 0x00);
 655                 }
 656         }
 657         return 0;
 658 }
 659
 660 static int es8326_set_bias_level(struct snd_soc_component *codec,
 661                                  enum snd_soc_bias_level level)
 662 {
 663         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(codec);
 664         int ret;
 665
 666         switch (level) {
 667         case SND_SOC_BIAS_ON:
 668                 ret = clk_prepare_enable(es8326->mclk);
 669                 if (ret)
 670                         return ret;
 671
 672                 regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x02);
 673                 usleep_range(5000, 10000);
 674                 regmap_write(es8326->regmap, ES8326_INTOUT_IO, es8326->interrupt_clk);
 675                 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO,
 676                             (ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT));
 677                 regmap_write(es8326->regmap, ES8326_PGA_PDN, 0x40);
 678                 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00);
 679                 regmap_update_bits(es8326->regmap,  ES8326_CLK_CTL, 0x20, 0x20);
 680                 regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x00);
 681                 if (es8326->version > ES8326_VERSION_B) {
 682                         regmap_update_bits(es8326->regmap, ES8326_VMIDSEL, 0x40, 0x40);
 683                         regmap_update_bits(es8326->regmap, ES8326_ANA_MICBIAS, 0x70, 0x30);
 684                 }
 685                 break;
 686         case SND_SOC_BIAS_PREPARE:
 687                 break;
 688         case SND_SOC_BIAS_STANDBY:
 689                 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b);
 690                 regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x00);
 691                 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, ES8326_IO_INPUT);
 692                 if (es8326->version > ES8326_VERSION_B) {
 693                         regmap_update_bits(es8326->regmap, ES8326_VMIDSEL, 0x40, 0x40);
 694                         regmap_update_bits(es8326->regmap, ES8326_ANA_MICBIAS, 0x70, 0x10);
 695                 }
 696                 regmap_update_bits(es8326->regmap, ES8326_CLK_INV, 0xc0, 0xc0);
 697                 regmap_update_bits(es8326->regmap, ES8326_CLK_MUX, 0x80, 0x80);
 698                 break;
 699         case SND_SOC_BIAS_OFF:
 700                 clk_disable_unprepare(es8326->mclk);
 701                 break;
 702         }
 703
 704         return 0;
 705 }
 706
 707 #define es8326_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
 708         SNDRV_PCM_FMTBIT_S24_LE)
 709
 710 static const struct snd_soc_dai_ops es8326_ops = {
 711         .hw_params = es8326_pcm_hw_params,
 712         .set_fmt = es8326_set_dai_fmt,
 713         .set_sysclk = es8326_set_dai_sysclk,
 714         .mute_stream = es8326_mute,
 715         .no_capture_mute = 0,
 716 };
 717
 718 static struct snd_soc_dai_driver es8326_dai = {
 719         .name = "ES8326 HiFi",
 720         .playback = {
 721                 .stream_name = "Playback",
 722                 .channels_min = 1,
 723                 .channels_max = 2,
 724                 .rates = SNDRV_PCM_RATE_8000_48000,
 725                 .formats = es8326_FORMATS,
 726                 },
 727         .capture = {
 728                 .stream_name = "Capture",
 729                 .channels_min = 1,
 730                 .channels_max = 2,
 731                 .rates = SNDRV_PCM_RATE_8000_48000,
 732                 .formats = es8326_FORMATS,
 733                 },
 734         .ops = &es8326_ops,
 735         .symmetric_rate = 1,
 736 };
 737
 738 static void es8326_enable_micbias(struct snd_soc_component *component)
 739 {
 740         struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
 741
 742         snd_soc_dapm_mutex_lock(dapm);
 743         snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS1");
 744         snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS2");
 745         snd_soc_dapm_sync_unlocked(dapm);
 746         snd_soc_dapm_mutex_unlock(dapm);
 747 }
 748
 749 static void es8326_disable_micbias(struct snd_soc_component *component)
 750 {
 751         struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
 752
 753         snd_soc_dapm_mutex_lock(dapm);
 754         snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS1");
 755         snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS2");
 756         snd_soc_dapm_sync_unlocked(dapm);
 757         snd_soc_dapm_mutex_unlock(dapm);
 758 }
 759
 760 /*
 761  *      For button detection, set the following in soundcard
 762  *      snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
 763  *      snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOLUMEUP);
 764  *      snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN);
 765  */
 766 static void es8326_jack_button_handler(struct work_struct *work)
 767 {
 768         struct es8326_priv *es8326 =
 769                 container_of(work, struct es8326_priv, button_press_work.work);
 770         struct snd_soc_component *comp = es8326->component;
 771         unsigned int iface;
 772         static int button_to_report, press_count;
 773         static int prev_button, cur_button;
 774
 775         if (!(es8326->jack->status & SND_JACK_HEADSET)) /* Jack unplugged */
 776                 return;
 777
 778         mutex_lock(&es8326->lock);
 779         iface = snd_soc_component_read(comp, ES8326_HPDET_STA);
 780         switch (iface) {
 781         case 0x93:
 782                 /* pause button detected */
 783                 cur_button = SND_JACK_BTN_0;
 784                 break;
 785         case 0x6f:
 786         case 0x4b:
 787                 /* button volume up */
 788                 if ((iface == 0x6f) && (es8326->version > ES8326_VERSION_B))
 789                         cur_button = SND_JACK_BTN_0;
 790                 else
 791                         cur_button = SND_JACK_BTN_1;
 792                 break;
 793         case 0x27:
 794                 /* button volume down */
 795                 cur_button = SND_JACK_BTN_2;
 796                 break;
 797         case 0x1e:
 798         case 0xe2:
 799                 /* button released or not pressed */
 800                 cur_button = 0;
 801                 break;
 802         default:
 803                 break;
 804         }
 805
 806         if ((prev_button == cur_button) && (cur_button != 0)) {
 807                 press_count++;
 808                 if (press_count > 3) {
 809                         /* report a press every 120ms */
 810                         snd_soc_jack_report(es8326->jack, cur_button,
 811                                         SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2);
 812                         press_count = 0;
 813                 }
 814                 button_to_report = cur_button;
 815                 queue_delayed_work(system_wq, &es8326->button_press_work,
 816                                    msecs_to_jiffies(35));
 817         } else if (prev_button != cur_button) {
 818                 /* mismatch, detect again */
 819                 prev_button = cur_button;
 820                 queue_delayed_work(system_wq, &es8326->button_press_work,
 821                                    msecs_to_jiffies(35));
 822         } else {
 823                 /* released or no pressed */
 824                 if (button_to_report != 0) {
 825                         snd_soc_jack_report(es8326->jack, button_to_report,
 826                                     SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2);
 827                         snd_soc_jack_report(es8326->jack, 0,
 828                                     SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2);
 829                         button_to_report = 0;
 830                 }
 831                 es8326_disable_micbias(es8326->component);
 832         }
 833         mutex_unlock(&es8326->lock);
 834 }
 835
 836 static void es8326_jack_detect_handler(struct work_struct *work)
 837 {
 838         struct es8326_priv *es8326 =
 839                 container_of(work, struct es8326_priv, jack_detect_work.work);
 840         struct snd_soc_component *comp = es8326->component;
 841         unsigned int iface;
 842
 843         mutex_lock(&es8326->lock);
 844         iface = snd_soc_component_read(comp, ES8326_HPDET_STA);
 845         dev_dbg(comp->dev, "gpio flag %#04x", iface);
 846
 847         if ((es8326->jack_remove_retry == 1) && (es8326->version < ES8326_VERSION_B)) {
 848                 if (iface & ES8326_HPINSERT_FLAG)
 849                         es8326->jack_remove_retry = 2;
 850                 else
 851                         es8326->jack_remove_retry = 0;
 852
 853                 dev_dbg(comp->dev, "remove event check, set HPJACK_POL normal, cnt = %d\n",
 854                                 es8326->jack_remove_retry);
 855                 /*
 856                  * Inverted HPJACK_POL bit to trigger one IRQ to double check HP Removal event
 857                  */
 858                 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE,
 859                                         ES8326_HP_DET_JACK_POL, (es8326->jd_inverted ?
 860                                         ~es8326->jack_pol : es8326->jack_pol));
 861                 goto exit;
 862         }
 863
 864         if ((iface & ES8326_HPINSERT_FLAG) == 0) {
 865                 /* Jack unplugged or spurious IRQ */
 866                 dev_dbg(comp->dev, "No headset detected\n");
 867                 es8326_disable_micbias(es8326->component);
 868                 if (es8326->jack->status & SND_JACK_HEADPHONE) {
 869                         dev_dbg(comp->dev, "Report hp remove event\n");
 870                         snd_soc_jack_report(es8326->jack, 0,
 871                                     SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2);
 872                         snd_soc_jack_report(es8326->jack, 0, SND_JACK_HEADSET);
 873                         /* mute adc when mic path switch */
 874                         regmap_write(es8326->regmap, ES8326_ADC1_SRC, 0x44);
 875                         regmap_write(es8326->regmap, ES8326_ADC2_SRC, 0x66);
 876                 }
 877                 es8326->hp = 0;
 878                 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01);
 879                 regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x0a);
 880                 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x03);
 881                 regmap_write(es8326->regmap, ES8326_INT_SOURCE, ES8326_INT_SRC_PIN9);
 882                 /*
 883                  * Inverted HPJACK_POL bit to trigger one IRQ to double check HP Removal event
 884                  */
 885                 if ((es8326->jack_remove_retry == 0) && (es8326->version < ES8326_VERSION_B)) {
 886                         es8326->jack_remove_retry = 1;
 887                         dev_dbg(comp->dev, "remove event check, invert HPJACK_POL, cnt = %d\n",
 888                                         es8326->jack_remove_retry);
 889                         regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE,
 890                                         ES8326_HP_DET_JACK_POL, (es8326->jd_inverted ?
 891                                         es8326->jack_pol : ~es8326->jack_pol));
 892
 893                 } else {
 894                         es8326->jack_remove_retry = 0;
 895                 }
 896         } else if ((iface & ES8326_HPINSERT_FLAG) == ES8326_HPINSERT_FLAG) {
 897                 es8326->jack_remove_retry = 0;
 898                 if (es8326->hp == 0) {
 899                         dev_dbg(comp->dev, "First insert, start OMTP/CTIA type check\n");
 900                         /*
 901                          * set auto-check mode, then restart jack_detect_work after 400ms.
 902                          * Don't report jack status.
 903                          */
 904                         regmap_write(es8326->regmap, ES8326_INT_SOURCE, 0x00);
 905                         regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01);
 906                         regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x10, 0x00);
 907                         usleep_range(50000, 70000);
 908                         regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00);
 909                         regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x10, 0x10);
 910                         usleep_range(50000, 70000);
 911                         regmap_write(es8326->regmap, ES8326_INT_SOURCE,
 912                                         (ES8326_INT_SRC_PIN9 | ES8326_INT_SRC_BUTTON));
 913                         regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x1f);
 914                         regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x0d);
 915                         queue_delayed_work(system_wq, &es8326->jack_detect_work,
 916                                         msecs_to_jiffies(400));
 917                         es8326->hp = 1;
 918                         goto exit;
 919                 }
 920                 if (es8326->jack->status & SND_JACK_HEADSET) {
 921                         /* detect button */
 922                         dev_dbg(comp->dev, "button pressed\n");
 923                         regmap_write(es8326->regmap, ES8326_INT_SOURCE,
 924                                         (ES8326_INT_SRC_PIN9 | ES8326_INT_SRC_BUTTON));
 925                         es8326_enable_micbias(es8326->component);
 926                         queue_delayed_work(system_wq, &es8326->button_press_work, 10);
 927                         goto exit;
 928                 }
 929                 if ((iface & ES8326_HPBUTTON_FLAG) == 0x01) {
 930                         dev_dbg(comp->dev, "Headphone detected\n");
 931                         snd_soc_jack_report(es8326->jack,
 932                                         SND_JACK_HEADPHONE, SND_JACK_HEADSET);
 933                 } else {
 934                         dev_dbg(comp->dev, "Headset detected\n");
 935                         snd_soc_jack_report(es8326->jack,
 936                                         SND_JACK_HEADSET, SND_JACK_HEADSET);
 937
 938                         regmap_update_bits(es8326->regmap, ES8326_PGA_PDN,
 939                                         0x08, 0x08);
 940                         regmap_update_bits(es8326->regmap, ES8326_PGAGAIN,
 941                                         0x80, 0x80);
 942                         regmap_write(es8326->regmap, ES8326_ADC1_SRC, 0x00);
 943                         regmap_write(es8326->regmap, ES8326_ADC2_SRC, 0x00);
 944                         regmap_update_bits(es8326->regmap, ES8326_PGA_PDN,
 945                                         0x08, 0x00);
 946                         usleep_range(10000, 15000);
 947                 }
 948         }
 949 exit:
 950         mutex_unlock(&es8326->lock);
 951 }
 952
 953 static irqreturn_t es8326_irq(int irq, void *dev_id)
 954 {
 955         struct es8326_priv *es8326 = dev_id;
 956
 957         if (!es8326->jack)
 958                 goto out;
 959
 960         if (es8326->jack->status & SND_JACK_HEADSET)
 961                 queue_delayed_work(system_wq, &es8326->jack_detect_work,
 962                                    msecs_to_jiffies(10));
 963         else
 964                 queue_delayed_work(system_wq, &es8326->jack_detect_work,
 965                                    msecs_to_jiffies(300));
 966
 967 out:
 968         return IRQ_HANDLED;
 969 }
 970
 971 static int es8326_calibrate(struct snd_soc_component *component)
 972 {
 973         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
 974         unsigned int reg;
 975         unsigned int offset_l, offset_r;
 976
 977         regmap_read(es8326->regmap, ES8326_CHIP_VERSION, &reg);
 978         es8326->version = reg;
 979
 980         if ((es8326->version >= ES8326_VERSION_B) && (es8326->calibrated == false)) {
 981                 dev_dbg(component->dev, "ES8326_VERSION_B, calibrating\n");
 982                 regmap_write(es8326->regmap, ES8326_CLK_INV, 0xc0);
 983                 regmap_write(es8326->regmap, ES8326_CLK_DIV1, 0x03);
 984                 regmap_write(es8326->regmap, ES8326_CLK_DLL, 0x30);
 985                 regmap_write(es8326->regmap, ES8326_CLK_MUX, 0xed);
 986                 regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, 0x08);
 987                 regmap_write(es8326->regmap, ES8326_CLK_TRI, 0xc1);
 988                 regmap_write(es8326->regmap, ES8326_DAC_MUTE, 0x03);
 989                 regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7f);
 990                 regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x23);
 991                 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x88);
 992                 usleep_range(15000, 20000);
 993                 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c);
 994                 usleep_range(15000, 20000);
 995                 regmap_write(es8326->regmap, ES8326_RESET, 0xc0);
 996                 usleep_range(15000, 20000);
 997
 998                 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, ES8326_HP_OFF);
 999                 regmap_read(es8326->regmap, ES8326_CSM_MUTE_STA, &reg);
1000                 if ((reg & 0xf0) != 0x40)
1001                         msleep(50);
1002
1003                 regmap_write(es8326->regmap, ES8326_HP_CAL, 0xd4);
1004                 msleep(200);
1005                 regmap_write(es8326->regmap, ES8326_HP_CAL, 0x4d);
1006                 msleep(200);
1007                 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);
1008                 regmap_read(es8326->regmap, ES8326_HPL_OFFSET_INI, &offset_l);
1009                 regmap_read(es8326->regmap, ES8326_HPR_OFFSET_INI, &offset_r);
1010                 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c);
1011                 regmap_write(es8326->regmap, ES8326_HPL_OFFSET_INI, offset_l);
1012                 regmap_write(es8326->regmap, ES8326_HPR_OFFSET_INI, offset_r);
1013                 regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00);
1014
1015                 es8326->calibrated = true;
1016         }
1017
1018         return 0;
1019 }
1020
1021 static void es8326_init(struct snd_soc_component *component)
1022 {
1023         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
1024
1025         regmap_write(es8326->regmap, ES8326_RESET, 0x1f);
1026         regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x3E);
1027         regmap_write(es8326->regmap, ES8326_ANA_LP, 0xf0);
1028         usleep_range(10000, 15000);
1029         regmap_write(es8326->regmap, ES8326_HPJACK_TIMER, 0xd9);
1030         regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0xd8);
1031         /* set headphone default type and detect pin */
1032         regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x83);
1033         regmap_write(es8326->regmap, ES8326_CLK_RESAMPLE, 0x05);
1034
1035         /* set internal oscillator as clock source of headpone cp */
1036         regmap_write(es8326->regmap, ES8326_CLK_DIV_CPC, 0x89);
1037         regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_ON);
1038         /* clock manager reset release */
1039         regmap_write(es8326->regmap, ES8326_RESET, 0x17);
1040         /* set headphone detection as half scan mode */
1041         regmap_write(es8326->regmap, ES8326_HP_MISC, 0x3d);
1042         regmap_write(es8326->regmap, ES8326_PULLUP_CTL, 0x00);
1043
1044         /* enable headphone driver */
1045         regmap_write(es8326->regmap, ES8326_HP_VOL, 0xc4);
1046         regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa7);
1047         usleep_range(2000, 5000);
1048         regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x23);
1049         regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x33);
1050         regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);
1051
1052         regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00);
1053         regmap_write(es8326->regmap, ES8326_CLK_VMIDS1, 0xc4);
1054         regmap_write(es8326->regmap, ES8326_CLK_VMIDS2, 0x81);
1055         regmap_write(es8326->regmap, ES8326_CLK_CAL_TIME, 0x00);
1056         /* calibrate for B version */
1057         es8326_calibrate(component);
1058         regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, 0xaa);
1059         regmap_write(es8326->regmap, ES8326_DAC_RAMPRATE, 0x00);
1060         /* turn off headphone out */
1061         regmap_write(es8326->regmap, ES8326_HP_CAL, 0x00);
1062         /* set ADC and DAC in low power mode */
1063         regmap_write(es8326->regmap, ES8326_ANA_LP, 0xf0);
1064
1065         regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7F);
1066         /* select vdda as micbias source */
1067         regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x03);
1068         /* set dac dsmclip = 1 */
1069         regmap_write(es8326->regmap, ES8326_DAC_DSM, 0x08);
1070         regmap_write(es8326->regmap, ES8326_DAC_VPPSCALE, 0x15);
1071
1072         regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x80 |
1073                         ((es8326->version >= ES8326_VERSION_B) ?
1074                         (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol) :
1075                         (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol | 0x04)));
1076         usleep_range(5000, 10000);
1077         es8326_enable_micbias(es8326->component);
1078         usleep_range(50000, 70000);
1079         regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00);
1080         regmap_write(es8326->regmap, ES8326_INTOUT_IO,
1081                      es8326->interrupt_clk);
1082         regmap_write(es8326->regmap, ES8326_SDINOUT1_IO,
1083                     (ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT));
1084         regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT);
1085
1086         regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00);
1087         regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON);
1088         regmap_update_bits(es8326->regmap, ES8326_PGAGAIN, ES8326_MIC_SEL_MASK,
1089                            ES8326_MIC1_SEL);
1090
1091         regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, ES8326_MUTE_MASK,
1092                            ES8326_MUTE);
1093
1094         regmap_write(es8326->regmap, ES8326_ADC_MUTE, 0x0f);
1095         regmap_write(es8326->regmap, ES8326_CLK_DIV_LRCK, 0xff);
1096         regmap_write(es8326->regmap, ES8326_ADC1_SRC, 0x44);
1097         regmap_write(es8326->regmap, ES8326_ADC2_SRC, 0x66);
1098         es8326_disable_micbias(es8326->component);
1099         if (es8326->version > ES8326_VERSION_B) {
1100                 regmap_update_bits(es8326->regmap, ES8326_ANA_MICBIAS, 0x73, 0x10);
1101                 regmap_update_bits(es8326->regmap, ES8326_VMIDSEL, 0x40, 0x40);
1102         }
1103
1104         msleep(200);
1105         regmap_write(es8326->regmap, ES8326_INT_SOURCE, ES8326_INT_SRC_PIN9);
1106 }
1107
1108 static int es8326_resume(struct snd_soc_component *component)
1109 {
1110         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
1111         unsigned int reg;
1112
1113         regcache_cache_only(es8326->regmap, false);
1114         regcache_cache_bypass(es8326->regmap, true);
1115         regmap_read(es8326->regmap, ES8326_CLK_RESAMPLE, &reg);
1116         regcache_cache_bypass(es8326->regmap, false);
1117         /* reset internal clock state */
1118         if (reg == 0x05)
1119                 regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_ON);
1120         else
1121                 es8326_init(component);
1122
1123         regcache_sync(es8326->regmap);
1124
1125         es8326_irq(es8326->irq, es8326);
1126         return 0;
1127 }
1128
1129 static int es8326_suspend(struct snd_soc_component *component)
1130 {
1131         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
1132
1133         cancel_delayed_work_sync(&es8326->jack_detect_work);
1134         es8326_disable_micbias(component);
1135         es8326->calibrated = false;
1136         regmap_write(es8326->regmap, ES8326_CLK_MUX, 0x2d);
1137         regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x00);
1138         regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b);
1139         regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_OFF);
1140         regcache_cache_only(es8326->regmap, true);
1141
1142         /* reset register value to default */
1143         regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x01);
1144         usleep_range(1000, 3000);
1145         regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x00);
1146
1147         regcache_mark_dirty(es8326->regmap);
1148         return 0;
1149 }
1150
1151 static int es8326_probe(struct snd_soc_component *component)
1152 {
1153         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
1154         int ret;
1155
1156         es8326->component = component;
1157         es8326->jd_inverted = device_property_read_bool(component->dev,
1158                                                         "everest,jack-detect-inverted");
1159
1160         ret = device_property_read_u8(component->dev, "everest,jack-pol", &es8326->jack_pol);
1161         if (ret != 0) {
1162                 dev_dbg(component->dev, "jack-pol return %d", ret);
1163                 es8326->jack_pol = ES8326_HP_TYPE_AUTO;
1164         }
1165         dev_dbg(component->dev, "jack-pol %x", es8326->jack_pol);
1166
1167         ret = device_property_read_u8(component->dev, "everest,interrupt-src",
1168                                       &es8326->interrupt_src);
1169         if (ret != 0) {
1170                 dev_dbg(component->dev, "interrupt-src return %d", ret);
1171                 es8326->interrupt_src = ES8326_HP_DET_SRC_PIN9;
1172         }
1173         dev_dbg(component->dev, "interrupt-src %x", es8326->interrupt_src);
1174
1175         ret = device_property_read_u8(component->dev, "everest,interrupt-clk",
1176                                       &es8326->interrupt_clk);
1177         if (ret != 0) {
1178                 dev_dbg(component->dev, "interrupt-clk return %d", ret);
1179                 es8326->interrupt_clk = 0x00;
1180         }
1181         dev_dbg(component->dev, "interrupt-clk %x", es8326->interrupt_clk);
1182
1183         es8326_init(component);
1184         return 0;
1185 }
1186
1187 static void es8326_enable_jack_detect(struct snd_soc_component *component,
1188                                 struct snd_soc_jack *jack)
1189 {
1190         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
1191
1192         mutex_lock(&es8326->lock);
1193         if (es8326->jd_inverted)
1194                 snd_soc_component_update_bits(component, ES8326_HPDET_TYPE,
1195                                               ES8326_HP_DET_JACK_POL, ~es8326->jack_pol);
1196         es8326->jack = jack;
1197
1198         mutex_unlock(&es8326->lock);
1199         es8326_irq(es8326->irq, es8326);
1200 }
1201
1202 static void es8326_disable_jack_detect(struct snd_soc_component *component)
1203 {
1204         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
1205
1206         dev_dbg(component->dev, "Enter into %s\n", __func__);
1207         if (!es8326->jack)
1208                 return; /* Already disabled (or never enabled) */
1209         cancel_delayed_work_sync(&es8326->jack_detect_work);
1210
1211         mutex_lock(&es8326->lock);
1212         if (es8326->jack->status & SND_JACK_MICROPHONE) {
1213                 es8326_disable_micbias(component);
1214                 snd_soc_jack_report(es8326->jack, 0, SND_JACK_HEADSET);
1215         }
1216         es8326->jack = NULL;
1217         mutex_unlock(&es8326->lock);
1218 }
1219
1220 static int es8326_set_jack(struct snd_soc_component *component,
1221                         struct snd_soc_jack *jack, void *data)
1222 {
1223         if (jack)
1224                 es8326_enable_jack_detect(component, jack);
1225         else
1226                 es8326_disable_jack_detect(component);
1227
1228         return 0;
1229 }
1230
1231 static void es8326_remove(struct snd_soc_component *component)
1232 {
1233         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
1234
1235         es8326_disable_jack_detect(component);
1236         es8326_set_bias_level(component, SND_SOC_BIAS_OFF);
1237         regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x01);
1238         usleep_range(1000, 3000);
1239         regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x00);
1240 }
1241
1242 static const struct snd_soc_component_driver soc_component_dev_es8326 = {
1243         .probe          = es8326_probe,
1244         .remove         = es8326_remove,
1245         .resume         = es8326_resume,
1246         .suspend        = es8326_suspend,
1247         .set_bias_level = es8326_set_bias_level,
1248         .set_jack       = es8326_set_jack,
1249         .dapm_widgets   = es8326_dapm_widgets,
1250         .num_dapm_widgets       = ARRAY_SIZE(es8326_dapm_widgets),
1251         .dapm_routes            = es8326_dapm_routes,
1252         .num_dapm_routes        = ARRAY_SIZE(es8326_dapm_routes),
1253         .controls               = es8326_snd_controls,
1254         .num_controls           = ARRAY_SIZE(es8326_snd_controls),
1255         .use_pmdown_time        = 1,
1256         .endianness             = 1,
1257 };
1258
1259 static int es8326_i2c_probe(struct i2c_client *i2c)
1260 {
1261         struct es8326_priv *es8326;
1262         int ret;
1263
1264         es8326 = devm_kzalloc(&i2c->dev, sizeof(struct es8326_priv), GFP_KERNEL);
1265         if (!es8326)
1266                 return -ENOMEM;
1267
1268         i2c_set_clientdata(i2c, es8326);
1269         es8326->i2c = i2c;
1270         mutex_init(&es8326->lock);
1271         es8326->regmap = devm_regmap_init_i2c(i2c, &es8326_regmap_config);
1272         if (IS_ERR(es8326->regmap)) {
1273                 ret = PTR_ERR(es8326->regmap);
1274                 dev_err(&i2c->dev, "Failed to init regmap: %d\n", ret);
1275                 return ret;
1276         }
1277
1278         es8326->irq = i2c->irq;
1279         es8326->jack_remove_retry = 0;
1280         es8326->hp = 0;
1281         es8326->hpl_vol = 0x03;
1282         es8326->hpr_vol = 0x03;
1283         INIT_DELAYED_WORK(&es8326->jack_detect_work,
1284                           es8326_jack_detect_handler);
1285         INIT_DELAYED_WORK(&es8326->button_press_work,
1286                           es8326_jack_button_handler);
1287         /* ES8316 is level-based while ES8326 is edge-based */
1288         ret = devm_request_threaded_irq(&i2c->dev, es8326->irq, NULL, es8326_irq,
1289                                         IRQF_TRIGGER_RISING | IRQF_ONESHOT,
1290                                         "es8326", es8326);
1291         if (ret) {
1292                 dev_warn(&i2c->dev, "Failed to request IRQ: %d: %d\n",
1293                 es8326->irq, ret);
1294                 es8326->irq = -ENXIO;
1295         }
1296
1297         es8326->mclk = devm_clk_get_optional(&i2c->dev, "mclk");
1298         if (IS_ERR(es8326->mclk)) {
1299                 dev_err(&i2c->dev, "unable to get mclk\n");
1300                 return PTR_ERR(es8326->mclk);
1301         }
1302         if (!es8326->mclk)
1303                 dev_warn(&i2c->dev, "assuming static mclk\n");
1304
1305         ret = clk_prepare_enable(es8326->mclk);
1306         if (ret) {
1307                 dev_err(&i2c->dev, "unable to enable mclk\n");
1308                 return ret;
1309         }
1310         return devm_snd_soc_register_component(&i2c->dev,
1311                                         &soc_component_dev_es8326,
1312                                         &es8326_dai, 1);
1313 }
1314
1315
1316 static void es8326_i2c_shutdown(struct i2c_client *i2c)
1317 {
1318         struct snd_soc_component *component;
1319         struct es8326_priv *es8326;
1320
1321         es8326 = i2c_get_clientdata(i2c);
1322         component = es8326->component;
1323         dev_dbg(component->dev, "Enter into %s\n", __func__);
1324         cancel_delayed_work_sync(&es8326->jack_detect_work);
1325         cancel_delayed_work_sync(&es8326->button_press_work);
1326
1327         regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x01);
1328         usleep_range(1000, 3000);
1329         regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x00);
1330
1331 }
1332
1333 static void es8326_i2c_remove(struct i2c_client *i2c)
1334 {
1335         es8326_i2c_shutdown(i2c);
1336 }
1337
1338 static const struct i2c_device_id es8326_i2c_id[] = {
1339         {"es8326" },
1340         {}
1341 };
1342 MODULE_DEVICE_TABLE(i2c, es8326_i2c_id);
1343
1344 #ifdef CONFIG_OF
1345 static const struct of_device_id es8326_of_match[] = {
1346         { .compatible = "everest,es8326", },
1347         {}
1348 };
1349 MODULE_DEVICE_TABLE(of, es8326_of_match);
1350 #endif
1351
1352 #ifdef CONFIG_ACPI
1353 static const struct acpi_device_id es8326_acpi_match[] = {
1354         {"ESSX8326", 0},
1355         {},
1356 };
1357 MODULE_DEVICE_TABLE(acpi, es8326_acpi_match);
1358 #endif
1359
1360 static struct i2c_driver es8326_i2c_driver = {
1361         .driver = {
1362                 .name = "es8326",
1363                 .acpi_match_table = ACPI_PTR(es8326_acpi_match),
1364                 .of_match_table = of_match_ptr(es8326_of_match),
1365         },
1366         .probe = es8326_i2c_probe,
1367         .shutdown = es8326_i2c_shutdown,
1368         .remove = es8326_i2c_remove,
1369         .id_table = es8326_i2c_id,
1370 };
1371 module_i2c_driver(es8326_i2c_driver);
1372
1373 MODULE_DESCRIPTION("ASoC es8326 driver");
1374 MODULE_AUTHOR("David Yang <[email protected]>");
1375 MODULE_LICENSE("GPL");