1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
3 * MTK SDG1 ECC controller
5 * Copyright (c) 2016 Mediatek
10 #ifndef __DRIVERS_MTD_NAND_MTK_ECC_H__
11 #define __DRIVERS_MTD_NAND_MTK_ECC_H__
13 #include <linux/types.h>
15 enum mtk_ecc_mode {ECC_DMA_MODE = 0, ECC_NFI_MODE = 1};
16 enum mtk_ecc_operation {ECC_ENCODE, ECC_DECODE};
21 struct mtk_ecc_stats {
27 struct mtk_ecc_config {
28 enum mtk_ecc_operation op;
29 enum mtk_ecc_mode mode;
36 int mtk_ecc_encode(struct mtk_ecc *, struct mtk_ecc_config *, u8 *, u32);
37 void mtk_ecc_get_stats(struct mtk_ecc *, struct mtk_ecc_stats *, int);
38 int mtk_ecc_wait_done(struct mtk_ecc *, enum mtk_ecc_operation);
39 int mtk_ecc_enable(struct mtk_ecc *, struct mtk_ecc_config *);
40 void mtk_ecc_disable(struct mtk_ecc *);
41 void mtk_ecc_adjust_strength(struct mtk_ecc *ecc, u32 *p);
42 unsigned int mtk_ecc_get_parity_bits(struct mtk_ecc *ecc);
44 struct mtk_ecc *of_mtk_ecc_get(struct device_node *);
45 void mtk_ecc_release(struct mtk_ecc *);