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[linux.git] / include / linux / irqchip / riscv-aplic.h
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2021 Western Digital Corporation or its affiliates.
4  * Copyright (C) 2022 Ventana Micro Systems Inc.
5  */
6 #ifndef __LINUX_IRQCHIP_RISCV_APLIC_H
7 #define __LINUX_IRQCHIP_RISCV_APLIC_H
8
9 #include <linux/bitops.h>
10
11 #define APLIC_MAX_IDC                   BIT(14)
12 #define APLIC_MAX_SOURCE                1024
13
14 #define APLIC_DOMAINCFG                 0x0000
15 #define APLIC_DOMAINCFG_RDONLY          0x80000000
16 #define APLIC_DOMAINCFG_IE              BIT(8)
17 #define APLIC_DOMAINCFG_DM              BIT(2)
18 #define APLIC_DOMAINCFG_BE              BIT(0)
19
20 #define APLIC_SOURCECFG_BASE            0x0004
21 #define APLIC_SOURCECFG_D               BIT(10)
22 #define APLIC_SOURCECFG_CHILDIDX_MASK   0x000003ff
23 #define APLIC_SOURCECFG_SM_MASK 0x00000007
24 #define APLIC_SOURCECFG_SM_INACTIVE     0x0
25 #define APLIC_SOURCECFG_SM_DETACH       0x1
26 #define APLIC_SOURCECFG_SM_EDGE_RISE    0x4
27 #define APLIC_SOURCECFG_SM_EDGE_FALL    0x5
28 #define APLIC_SOURCECFG_SM_LEVEL_HIGH   0x6
29 #define APLIC_SOURCECFG_SM_LEVEL_LOW    0x7
30
31 #define APLIC_MMSICFGADDR               0x1bc0
32 #define APLIC_MMSICFGADDRH              0x1bc4
33 #define APLIC_SMSICFGADDR               0x1bc8
34 #define APLIC_SMSICFGADDRH              0x1bcc
35
36 #ifdef CONFIG_RISCV_M_MODE
37 #define APLIC_xMSICFGADDR               APLIC_MMSICFGADDR
38 #define APLIC_xMSICFGADDRH              APLIC_MMSICFGADDRH
39 #else
40 #define APLIC_xMSICFGADDR               APLIC_SMSICFGADDR
41 #define APLIC_xMSICFGADDRH              APLIC_SMSICFGADDRH
42 #endif
43
44 #define APLIC_xMSICFGADDRH_L            BIT(31)
45 #define APLIC_xMSICFGADDRH_HHXS_MASK    0x1f
46 #define APLIC_xMSICFGADDRH_HHXS_SHIFT   24
47 #define APLIC_xMSICFGADDRH_HHXS         (APLIC_xMSICFGADDRH_HHXS_MASK << \
48                                          APLIC_xMSICFGADDRH_HHXS_SHIFT)
49 #define APLIC_xMSICFGADDRH_LHXS_MASK    0x7
50 #define APLIC_xMSICFGADDRH_LHXS_SHIFT   20
51 #define APLIC_xMSICFGADDRH_LHXS         (APLIC_xMSICFGADDRH_LHXS_MASK << \
52                                          APLIC_xMSICFGADDRH_LHXS_SHIFT)
53 #define APLIC_xMSICFGADDRH_HHXW_MASK    0x7
54 #define APLIC_xMSICFGADDRH_HHXW_SHIFT   16
55 #define APLIC_xMSICFGADDRH_HHXW         (APLIC_xMSICFGADDRH_HHXW_MASK << \
56                                          APLIC_xMSICFGADDRH_HHXW_SHIFT)
57 #define APLIC_xMSICFGADDRH_LHXW_MASK    0xf
58 #define APLIC_xMSICFGADDRH_LHXW_SHIFT   12
59 #define APLIC_xMSICFGADDRH_LHXW         (APLIC_xMSICFGADDRH_LHXW_MASK << \
60                                          APLIC_xMSICFGADDRH_LHXW_SHIFT)
61 #define APLIC_xMSICFGADDRH_BAPPN_MASK   0xfff
62 #define APLIC_xMSICFGADDRH_BAPPN_SHIFT  0
63 #define APLIC_xMSICFGADDRH_BAPPN        (APLIC_xMSICFGADDRH_BAPPN_MASK << \
64                                          APLIC_xMSICFGADDRH_BAPPN_SHIFT)
65
66 #define APLIC_xMSICFGADDR_PPN_SHIFT     12
67
68 #define APLIC_xMSICFGADDR_PPN_HART(__lhxs) \
69         (BIT(__lhxs) - 1)
70
71 #define APLIC_xMSICFGADDR_PPN_LHX_MASK(__lhxw) \
72         (BIT(__lhxw) - 1)
73 #define APLIC_xMSICFGADDR_PPN_LHX_SHIFT(__lhxs) \
74         ((__lhxs))
75 #define APLIC_xMSICFGADDR_PPN_LHX(__lhxw, __lhxs) \
76         (APLIC_xMSICFGADDR_PPN_LHX_MASK(__lhxw) << \
77          APLIC_xMSICFGADDR_PPN_LHX_SHIFT(__lhxs))
78
79 #define APLIC_xMSICFGADDR_PPN_HHX_MASK(__hhxw) \
80         (BIT(__hhxw) - 1)
81 #define APLIC_xMSICFGADDR_PPN_HHX_SHIFT(__hhxs) \
82         ((__hhxs) + APLIC_xMSICFGADDR_PPN_SHIFT)
83 #define APLIC_xMSICFGADDR_PPN_HHX(__hhxw, __hhxs) \
84         (APLIC_xMSICFGADDR_PPN_HHX_MASK(__hhxw) << \
85          APLIC_xMSICFGADDR_PPN_HHX_SHIFT(__hhxs))
86
87 #define APLIC_IRQBITS_PER_REG           32
88
89 #define APLIC_SETIP_BASE                0x1c00
90 #define APLIC_SETIPNUM                  0x1cdc
91
92 #define APLIC_CLRIP_BASE                0x1d00
93 #define APLIC_CLRIPNUM                  0x1ddc
94
95 #define APLIC_SETIE_BASE                0x1e00
96 #define APLIC_SETIENUM                  0x1edc
97
98 #define APLIC_CLRIE_BASE                0x1f00
99 #define APLIC_CLRIENUM                  0x1fdc
100
101 #define APLIC_SETIPNUM_LE               0x2000
102 #define APLIC_SETIPNUM_BE               0x2004
103
104 #define APLIC_GENMSI                    0x3000
105
106 #define APLIC_TARGET_BASE               0x3004
107 #define APLIC_TARGET_HART_IDX_SHIFT     18
108 #define APLIC_TARGET_HART_IDX_MASK      0x3fff
109 #define APLIC_TARGET_HART_IDX           (APLIC_TARGET_HART_IDX_MASK << \
110                                          APLIC_TARGET_HART_IDX_SHIFT)
111 #define APLIC_TARGET_GUEST_IDX_SHIFT    12
112 #define APLIC_TARGET_GUEST_IDX_MASK     0x3f
113 #define APLIC_TARGET_GUEST_IDX          (APLIC_TARGET_GUEST_IDX_MASK << \
114                                          APLIC_TARGET_GUEST_IDX_SHIFT)
115 #define APLIC_TARGET_IPRIO_SHIFT        0
116 #define APLIC_TARGET_IPRIO_MASK         0xff
117 #define APLIC_TARGET_IPRIO              (APLIC_TARGET_IPRIO_MASK << \
118                                          APLIC_TARGET_IPRIO_SHIFT)
119 #define APLIC_TARGET_EIID_SHIFT         0
120 #define APLIC_TARGET_EIID_MASK          0x7ff
121 #define APLIC_TARGET_EIID               (APLIC_TARGET_EIID_MASK << \
122                                          APLIC_TARGET_EIID_SHIFT)
123
124 #define APLIC_IDC_BASE                  0x4000
125 #define APLIC_IDC_SIZE                  32
126
127 #define APLIC_IDC_IDELIVERY             0x00
128
129 #define APLIC_IDC_IFORCE                0x04
130
131 #define APLIC_IDC_ITHRESHOLD            0x08
132
133 #define APLIC_IDC_TOPI                  0x18
134 #define APLIC_IDC_TOPI_ID_SHIFT         16
135 #define APLIC_IDC_TOPI_ID_MASK          0x3ff
136 #define APLIC_IDC_TOPI_ID               (APLIC_IDC_TOPI_ID_MASK << \
137                                          APLIC_IDC_TOPI_ID_SHIFT)
138 #define APLIC_IDC_TOPI_PRIO_SHIFT       0
139 #define APLIC_IDC_TOPI_PRIO_MASK        0xff
140 #define APLIC_IDC_TOPI_PRIO             (APLIC_IDC_TOPI_PRIO_MASK << \
141                                          APLIC_IDC_TOPI_PRIO_SHIFT)
142
143 #define APLIC_IDC_CLAIMI                0x1c
144
145 #endif
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