1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2017-2018, Intel Corporation
6 #ifndef __STRATIX10_SMC_H
7 #define __STRATIX10_SMC_H
9 #include <linux/arm-smccc.h>
10 #include <linux/bitops.h>
13 * This file defines the Secure Monitor Call (SMC) message protocol used for
14 * service layer driver in normal world (EL1) to communicate with secure
15 * monitor software in Secure Monitor Exception Level 3 (EL3).
17 * This file is shared with secure firmware (FW) which is out of kernel tree.
19 * An ARM SMC instruction takes a function identifier and up to 6 64-bit
20 * register values as arguments, and can return up to 4 64-bit register
21 * value. The operation of the secure monitor is determined by the parameter
22 * values passed in through registers.
24 * EL1 and EL3 communicates pointer as physical address rather than the
27 * Functions specified by ARM SMC Calling convention:
29 * FAST call executes atomic operations, returns when the requested operation
31 * STD call starts a operation which can be preempted by a non-secure
32 * interrupt. The call can return before the requested operation has
35 * a0..a7 is used as register names in the descriptions below, on arm32
36 * that translates to r0..r7 and on arm64 to w0..w7.
40 * @func_num: function ID
42 #define INTEL_SIP_SMC_STD_CALL_VAL(func_num) \
43 ARM_SMCCC_CALL_VAL(ARM_SMCCC_STD_CALL, ARM_SMCCC_SMC_64, \
44 ARM_SMCCC_OWNER_SIP, (func_num))
46 #define INTEL_SIP_SMC_FAST_CALL_VAL(func_num) \
47 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, ARM_SMCCC_SMC_64, \
48 ARM_SMCCC_OWNER_SIP, (func_num))
51 * Return values in INTEL_SIP_SMC_* call
53 * INTEL_SIP_SMC_RETURN_UNKNOWN_FUNCTION:
54 * Secure monitor software doesn't recognize the request.
56 * INTEL_SIP_SMC_STATUS_OK:
57 * Secure monitor software accepts the service client's request.
59 * INTEL_SIP_SMC_STATUS_BUSY:
60 * Secure monitor software is still processing service client's request.
62 * INTEL_SIP_SMC_STATUS_REJECTED:
63 * Secure monitor software reject the service client's request.
65 * INTEL_SIP_SMC_STATUS_ERROR:
66 * There is error during the process of service request.
68 * INTEL_SIP_SMC_RSU_ERROR:
69 * There is error during the process of remote status update request.
71 #define INTEL_SIP_SMC_RETURN_UNKNOWN_FUNCTION 0xFFFFFFFF
72 #define INTEL_SIP_SMC_STATUS_OK 0x0
73 #define INTEL_SIP_SMC_STATUS_BUSY 0x1
74 #define INTEL_SIP_SMC_STATUS_REJECTED 0x2
75 #define INTEL_SIP_SMC_STATUS_ERROR 0x4
76 #define INTEL_SIP_SMC_RSU_ERROR 0x7
79 * Request INTEL_SIP_SMC_FPGA_CONFIG_START
81 * Sync call used by service driver at EL1 to request the FPGA in EL3 to
82 * be prepare to receive a new configuration.
84 * Call register usage:
85 * a0: INTEL_SIP_SMC_FPGA_CONFIG_START.
86 * a1: flag for full or partial configuration. 0 for full and 1 for partial
91 * a0: INTEL_SIP_SMC_STATUS_OK, or INTEL_SIP_SMC_STATUS_ERROR.
94 #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_START 1
95 #define INTEL_SIP_SMC_FPGA_CONFIG_START \
96 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_START)
99 * Request INTEL_SIP_SMC_FPGA_CONFIG_WRITE
101 * Async call used by service driver at EL1 to provide FPGA configuration data
104 * Call register usage:
105 * a0: INTEL_SIP_SMC_FPGA_CONFIG_WRITE.
106 * a1: 64bit physical address of the configuration data memory block
107 * a2: Size of configuration data block.
111 * a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_BUSY or
112 * INTEL_SIP_SMC_STATUS_ERROR.
113 * a1: 64bit physical address of 1st completed memory block if any completed
114 * block, otherwise zero value.
115 * a2: 64bit physical address of 2nd completed memory block if any completed
116 * block, otherwise zero value.
117 * a3: 64bit physical address of 3rd completed memory block if any completed
118 * block, otherwise zero value.
120 #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_WRITE 2
121 #define INTEL_SIP_SMC_FPGA_CONFIG_WRITE \
122 INTEL_SIP_SMC_STD_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_WRITE)
125 * Request INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE
127 * Sync call used by service driver at EL1 to track the completed write
128 * transactions. This request is called after INTEL_SIP_SMC_FPGA_CONFIG_WRITE
129 * call returns INTEL_SIP_SMC_STATUS_BUSY.
131 * Call register usage:
132 * a0: INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE.
136 * a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_FPGA_BUSY or
137 * INTEL_SIP_SMC_STATUS_ERROR.
138 * a1: 64bit physical address of 1st completed memory block.
139 * a2: 64bit physical address of 2nd completed memory block if
140 * any completed block, otherwise zero value.
141 * a3: 64bit physical address of 3rd completed memory block if
142 * any completed block, otherwise zero value.
144 #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE 3
145 #define INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE \
146 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
149 * Request INTEL_SIP_SMC_FPGA_CONFIG_ISDONE
151 * Sync call used by service driver at EL1 to inform secure world that all
152 * data are sent, to check whether or not the secure world had completed
153 * the FPGA configuration process.
155 * Call register usage:
156 * a0: INTEL_SIP_SMC_FPGA_CONFIG_ISDONE.
160 * a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_BUSY or
161 * INTEL_SIP_SMC_STATUS_ERROR.
164 #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_ISDONE 4
165 #define INTEL_SIP_SMC_FPGA_CONFIG_ISDONE \
166 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_ISDONE)
169 * Request INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM
171 * Sync call used by service driver at EL1 to query the physical address of
172 * memory block reserved by secure monitor software.
174 * Call register usage:
175 * a0:INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM.
179 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_STATUS_ERROR.
180 * a1: start of physical address of reserved memory block.
181 * a2: size of reserved memory block.
184 #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_GET_MEM 5
185 #define INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM \
186 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_GET_MEM)
189 * Request INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK
191 * For SMC loop-back mode only, used for internal integration, debugging
192 * or troubleshooting.
194 * Call register usage:
195 * a0: INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK.
199 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_STATUS_ERROR.
202 #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_LOOPBACK 6
203 #define INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK \
204 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_LOOPBACK)
207 * Request INTEL_SIP_SMC_REG_READ
209 * Read a protected register at EL3
211 * Call register usage:
212 * a0: INTEL_SIP_SMC_REG_READ.
213 * a1: register address.
217 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR.
218 * a1: value in the register
221 #define INTEL_SIP_SMC_FUNCID_REG_READ 7
222 #define INTEL_SIP_SMC_REG_READ \
223 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_READ)
226 * Request INTEL_SIP_SMC_REG_WRITE
228 * Write a protected register at EL3
230 * Call register usage:
231 * a0: INTEL_SIP_SMC_REG_WRITE.
232 * a1: register address
233 * a2: value to program into register.
237 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR.
240 #define INTEL_SIP_SMC_FUNCID_REG_WRITE 8
241 #define INTEL_SIP_SMC_REG_WRITE \
242 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_WRITE)
245 * Request INTEL_SIP_SMC_FUNCID_REG_UPDATE
247 * Update one or more bits in a protected register at EL3 using a
248 * read-modify-write operation.
250 * Call register usage:
251 * a0: INTEL_SIP_SMC_REG_UPDATE.
252 * a1: register address
254 * a3: value to write.
258 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR.
261 #define INTEL_SIP_SMC_FUNCID_REG_UPDATE 9
262 #define INTEL_SIP_SMC_REG_UPDATE \
263 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_UPDATE)
266 * Request INTEL_SIP_SMC_RSU_STATUS
268 * Request remote status update boot log, call is synchronous.
270 * Call register usage:
271 * a0 INTEL_SIP_SMC_RSU_STATUS
276 * a1: Last Failing Image
277 * a2: Version | State
278 * a3: Error details | Error location
282 * a0: INTEL_SIP_SMC_RSU_ERROR
284 #define INTEL_SIP_SMC_FUNCID_RSU_STATUS 11
285 #define INTEL_SIP_SMC_RSU_STATUS \
286 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_STATUS)
289 * Request INTEL_SIP_SMC_RSU_UPDATE
291 * Request to set the offset of the bitstream to boot after reboot, call
294 * Call register usage:
295 * a0 INTEL_SIP_SMC_RSU_UPDATE
296 * a1 64bit physical address of the configuration data memory in flash
300 * a0 INTEL_SIP_SMC_STATUS_OK
302 #define INTEL_SIP_SMC_FUNCID_RSU_UPDATE 12
303 #define INTEL_SIP_SMC_RSU_UPDATE \
304 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_UPDATE)
307 * Request INTEL_SIP_SMC_ECC_DBE
309 * Sync call used by service driver at EL1 to alert EL3 that a Double
310 * Bit ECC error has occurred.
312 * Call register usage:
313 * a0 INTEL_SIP_SMC_ECC_DBE
314 * a1 SysManager Double Bit Error value
318 * a0 INTEL_SIP_SMC_STATUS_OK
320 #define INTEL_SIP_SMC_FUNCID_ECC_DBE 13
321 #define INTEL_SIP_SMC_ECC_DBE \
322 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_ECC_DBE)
325 * Request INTEL_SIP_SMC_RSU_NOTIFY
327 * Sync call used by service driver at EL1 to report hard processor
328 * system execution stage to firmware
330 * Call register usage:
331 * a0 INTEL_SIP_SMC_RSU_NOTIFY
332 * a1 32bit value representing hard processor system execution stage
336 * a0 INTEL_SIP_SMC_STATUS_OK
338 #define INTEL_SIP_SMC_FUNCID_RSU_NOTIFY 14
339 #define INTEL_SIP_SMC_RSU_NOTIFY \
340 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_NOTIFY)
343 * Request INTEL_SIP_SMC_RSU_RETRY_COUNTER
345 * Sync call used by service driver at EL1 to query RSU retry counter
347 * Call register usage:
348 * a0 INTEL_SIP_SMC_RSU_RETRY_COUNTER
352 * a0 INTEL_SIP_SMC_STATUS_OK
353 * a1 the retry counter
357 * a0 INTEL_SIP_SMC_RSU_ERROR
359 #define INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER 15
360 #define INTEL_SIP_SMC_RSU_RETRY_COUNTER \
361 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER)
364 * Request INTEL_SIP_SMC_RSU_DCMF_VERSION
366 * Sync call used by service driver at EL1 to query DCMF (Decision
367 * Configuration Management Firmware) version from FW
369 * Call register usage:
370 * a0 INTEL_SIP_SMC_RSU_DCMF_VERSION
374 * a0 INTEL_SIP_SMC_STATUS_OK
380 * a0 INTEL_SIP_SMC_RSU_ERROR
382 #define INTEL_SIP_SMC_FUNCID_RSU_DCMF_VERSION 16
383 #define INTEL_SIP_SMC_RSU_DCMF_VERSION \
384 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_DCMF_VERSION)
387 * Request INTEL_SIP_SMC_RSU_MAX_RETRY
389 * Sync call used by service driver at EL1 to query max retry value from FW
391 * Call register usage:
392 * a0 INTEL_SIP_SMC_RSU_MAX_RETRY
396 * a0 INTEL_SIP_SMC_STATUS_OK
400 * a0 INTEL_SIP_SMC_RSU_ERROR
402 #define INTEL_SIP_SMC_FUNCID_RSU_MAX_RETRY 18
403 #define INTEL_SIP_SMC_RSU_MAX_RETRY \
404 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_MAX_RETRY)
407 * Request INTEL_SIP_SMC_RSU_DCMF_STATUS
409 * Sync call used by service driver at EL1 to query DCMF status from FW
411 * Call register usage:
412 * a0 INTEL_SIP_SMC_RSU_DCMF_STATUS
416 * a0 INTEL_SIP_SMC_STATUS_OK
417 * a1 dcmf3 | dcmf2 | dcmf1 | dcmf0
421 * a0 INTEL_SIP_SMC_RSU_ERROR
423 #define INTEL_SIP_SMC_FUNCID_RSU_DCMF_STATUS 20
424 #define INTEL_SIP_SMC_RSU_DCMF_STATUS \
425 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_DCMF_STATUS)
428 * Request INTEL_SIP_SMC_SERVICE_COMPLETED
429 * Sync call to check if the secure world have completed service request
432 * Call register usage:
433 * a0: INTEL_SIP_SMC_SERVICE_COMPLETED
434 * a1: this register is optional. If used, it is the physical address for
435 * secure firmware to put output data
436 * a2: this register is optional. If used, it is the size of output data
440 * a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_ERROR,
441 * INTEL_SIP_SMC_REJECTED or INTEL_SIP_SMC_STATUS_BUSY
442 * a1: mailbox error if a0 is INTEL_SIP_SMC_STATUS_ERROR
443 * a2: physical address containing the process info
444 * for FCS certificate -- the data contains the certificate status
445 * for FCS cryption -- the data contains the actual data size FW processes
446 * a3: output data size
448 #define INTEL_SIP_SMC_FUNCID_SERVICE_COMPLETED 30
449 #define INTEL_SIP_SMC_SERVICE_COMPLETED \
450 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_SERVICE_COMPLETED)
453 * Request INTEL_SIP_SMC_FIRMWARE_VERSION
455 * Sync call used to query the version of running firmware
457 * Call register usage:
458 * a0 INTEL_SIP_SMC_FIRMWARE_VERSION
462 * a0 INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_STATUS_ERROR
463 * a1 running firmware version
465 #define INTEL_SIP_SMC_FUNCID_FIRMWARE_VERSION 31
466 #define INTEL_SIP_SMC_FIRMWARE_VERSION \
467 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FIRMWARE_VERSION)
470 * SMC call protocol for Mailbox, starting FUNCID from 60
472 * Call register usage:
473 * a0 INTEL_SIP_SMC_MBOX_SEND_CMD
474 * a1 mailbox command code
475 * a2 physical address that contain mailbox command data (not include header)
476 * a3 mailbox command data size in word
477 * a4 set to 0 for CASUAL, set to 1 for URGENT
478 * a5 physical address for secure firmware to put response data
479 * (not include header)
480 * a6 maximum size in word of physical address to store response data
484 * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_REJECTED or
485 * INTEL_SIP_SMC_STATUS_ERROR
486 * a1 mailbox error code
487 * a2 response data length in word
490 #define INTEL_SIP_SMC_FUNCID_MBOX_SEND_CMD 60
491 #define INTEL_SIP_SMC_MBOX_SEND_CMD \
492 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_MBOX_SEND_CMD)
495 * Request INTEL_SIP_SMC_SVC_VERSION
497 * Sync call used to query the SIP SMC API Version
499 * Call register usage:
500 * a0 INTEL_SIP_SMC_SVC_VERSION
504 * a0 INTEL_SIP_SMC_STATUS_OK
508 #define INTEL_SIP_SMC_SVC_FUNCID_VERSION 512
509 #define INTEL_SIP_SMC_SVC_VERSION \
510 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_SVC_FUNCID_VERSION)
513 * SMC call protocol for FPGA Crypto Service (FCS)
514 * FUNCID starts from 90
518 * Request INTEL_SIP_SMC_FCS_RANDOM_NUMBER
520 * Sync call used to query the random number generated by the firmware
522 * Call register usage:
523 * a0 INTEL_SIP_SMC_FCS_RANDOM_NUMBER
524 * a1 the physical address for firmware to write generated random data
528 * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_FCS_ERROR or
529 * INTEL_SIP_SMC_FCS_REJECTED
531 * a2 the physical address of generated random number
534 #define INTEL_SIP_SMC_FUNCID_FCS_RANDOM_NUMBER 90
535 #define INTEL_SIP_SMC_FCS_RANDOM_NUMBER \
536 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_RANDOM_NUMBER)
539 * Request INTEL_SIP_SMC_FCS_CRYPTION
540 * Async call for data encryption and HMAC signature generation, or for
541 * data decryption and HMAC verification.
543 * Call INTEL_SIP_SMC_SERVICE_COMPLETED to get the output encrypted or
546 * Call register usage:
547 * a0 INTEL_SIP_SMC_FCS_CRYPTION
548 * a1 cryption mode (1 for encryption and 0 for decryption)
549 * a2 physical address which stores to be encrypted or decrypted data
551 * a4 physical address which will hold the encrypted or decrypted output data
552 * a5 output data size
556 * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_ERROR or
557 * INTEL_SIP_SMC_STATUS_REJECTED
560 #define INTEL_SIP_SMC_FUNCID_FCS_CRYPTION 91
561 #define INTEL_SIP_SMC_FCS_CRYPTION \
562 INTEL_SIP_SMC_STD_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_CRYPTION)
565 * Request INTEL_SIP_SMC_FCS_SERVICE_REQUEST
566 * Async call for authentication service of HPS software
568 * Call register usage:
569 * a0 INTEL_SIP_SMC_FCS_SERVICE_REQUEST
570 * a1 the physical address of data block
571 * a2 size of data block
575 * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_ERROR or
576 * INTEL_SIP_SMC_REJECTED
579 #define INTEL_SIP_SMC_FUNCID_FCS_SERVICE_REQUEST 92
580 #define INTEL_SIP_SMC_FCS_SERVICE_REQUEST \
581 INTEL_SIP_SMC_STD_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_SERVICE_REQUEST)
584 * Request INTEL_SIP_SMC_FUNCID_FCS_SEND_CERTIFICATE
585 * Sync call to send a signed certificate
587 * Call register usage:
588 * a0 INTEL_SIP_SMC_FCS_SEND_CERTIFICATE
589 * a1 the physical address of CERTIFICATE block
590 * a2 size of data block
594 * a0 INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_FCS_REJECTED
597 #define INTEL_SIP_SMC_FUNCID_FCS_SEND_CERTIFICATE 93
598 #define INTEL_SIP_SMC_FCS_SEND_CERTIFICATE \
599 INTEL_SIP_SMC_STD_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_SEND_CERTIFICATE)
602 * Request INTEL_SIP_SMC_FCS_GET_PROVISION_DATA
603 * Sync call to dump all the fuses and key hashes
605 * Call register usage:
606 * a0 INTEL_SIP_SMC_FCS_GET_PROVISION_DATA
607 * a1 the physical address for firmware to write structure of fuse and
612 * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_FCS_ERROR or
613 * INTEL_SIP_SMC_FCS_REJECTED
615 * a2 physical address for the structure of fuse and key hashes
616 * a3 the size of structure
619 #define INTEL_SIP_SMC_FUNCID_FCS_GET_PROVISION_DATA 94
620 #define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA \
621 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_GET_PROVISION_DATA)