1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
6 #ifndef __DT_BINDINGS_CLOCK_IMX95_H
7 #define __DT_BINDINGS_CLOCK_IMX95_H
9 #define IMX95_CLK_VPUBLK_WAVE 0
10 #define IMX95_CLK_VPUBLK_JPEG_ENC 1
11 #define IMX95_CLK_VPUBLK_JPEG_DEC 2
13 #define IMX95_CLK_CAMBLK_CSI2_FOR0 0
14 #define IMX95_CLK_CAMBLK_CSI2_FOR1 1
15 #define IMX95_CLK_CAMBLK_ISP_AXI 2
16 #define IMX95_CLK_CAMBLK_ISP_PIXEL 3
17 #define IMX95_CLK_CAMBLK_ISP 4
19 #define IMX95_CLK_DISPMIX_LVDS_PHY_DIV 0
20 #define IMX95_CLK_DISPMIX_LVDS_CH0_GATE 1
21 #define IMX95_CLK_DISPMIX_LVDS_CH1_GATE 2
22 #define IMX95_CLK_DISPMIX_PIX_DI0_GATE 3
23 #define IMX95_CLK_DISPMIX_PIX_DI1_GATE 4
25 #define IMX95_CLK_DISPMIX_ENG0_SEL 0
26 #define IMX95_CLK_DISPMIX_ENG1_SEL 1
28 #define IMX95_CLK_NETCMIX_ENETC0_RMII 0
29 #define IMX95_CLK_NETCMIX_ENETC1_RMII 1
31 #endif /* __DT_BINDINGS_CLOCK_IMX95_H */