1 // SPDX-License-Identifier: GPL-2.0-only
2 /* linux/drivers/video/sm501fb.c
4 * Copyright (c) 2006 Simtec Electronics
8 * Framebuffer driver for the Silicon Motion SM501
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/errno.h>
14 #include <linux/string.h>
16 #include <linux/tty.h>
17 #include <linux/slab.h>
18 #include <linux/delay.h>
20 #include <linux/init.h>
21 #include <linux/vmalloc.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/interrupt.h>
24 #include <linux/workqueue.h>
25 #include <linux/wait.h>
26 #include <linux/platform_device.h>
27 #include <linux/clk.h>
28 #include <linux/console.h>
30 #include <linux/string_choices.h>
32 #include <linux/uaccess.h>
33 #include <asm/div64.h>
39 #include <linux/sm501.h>
40 #include <linux/sm501-regs.h>
44 static char *fb_mode = "640x480-16@60";
45 static unsigned long default_bpp = 16;
47 static const struct fb_videomode sm501_default_mode = {
58 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
59 .vmode = FB_VMODE_NONINTERLACED
62 #define NR_PALETTE 256
64 enum sm501_controller {
69 /* SM501 memory address.
71 * This structure is used to track memory usage within the SM501 framebuffer
72 * allocation. The sm_addr field is stored as an offset as it is often used
73 * against both the physical and mapped addresses.
77 unsigned long sm_addr; /* offset from base of sm501 fb. */
81 /* private data that is shared between all frambuffers* */
84 struct fb_info *fb[2]; /* fb info for both heads */
85 struct resource *fbmem_res; /* framebuffer resource */
86 struct resource *regs_res; /* registers resource */
87 struct resource *regs2d_res; /* 2d registers resource */
88 struct sm501_platdata_fb *pdata; /* our platform data */
90 unsigned long pm_crt_ctrl; /* pm: crt ctrl save */
93 int swap_endian; /* set to swap rgb=>bgr */
94 void __iomem *regs; /* remapped registers */
95 void __iomem *regs2d; /* 2d remapped registers */
96 void __iomem *fbmem; /* remapped framebuffer */
97 size_t fbmem_len; /* length of remapped region */
101 /* per-framebuffer private data */
103 u32 pseudo_palette[16];
105 enum sm501_controller head;
106 struct sm501_mem cursor;
107 struct sm501_mem screen;
112 void __iomem *cursor_regs;
113 struct sm501fb_info *info;
116 /* Helper functions */
118 static inline int h_total(struct fb_var_screeninfo *var)
120 return var->xres + var->left_margin +
121 var->right_margin + var->hsync_len;
124 static inline int v_total(struct fb_var_screeninfo *var)
126 return var->yres + var->upper_margin +
127 var->lower_margin + var->vsync_len;
130 /* sm501fb_sync_regs()
132 * This call is mainly for PCI bus systems where we need to
133 * ensure that any writes to the bus are completed before the
134 * next phase, or after completing a function.
137 static inline void sm501fb_sync_regs(struct sm501fb_info *info)
139 smc501_readl(info->regs);
144 * This is an attempt to lay out memory for the two framebuffers and
147 * |fbmem_res->start fbmem_res->end|
149 * |fb[0].fix.smem_start | |fb[1].fix.smem_start | 2K |
150 * |-> fb[0].fix.smem_len <-| spare |-> fb[1].fix.smem_len <-|-> cursors <-|
152 * The "spare" space is for the 2d engine data
153 * the fixed is space for the cursors (2x1Kbyte)
155 * we need to allocate memory for the 2D acceleration engine
156 * command list and the data for the engine to deal with.
158 * - all allocations must be 128bit aligned
159 * - cursors are 64x64x2 bits (1Kbyte)
163 #define SM501_MEMF_CURSOR (1)
164 #define SM501_MEMF_PANEL (2)
165 #define SM501_MEMF_CRT (4)
166 #define SM501_MEMF_ACCEL (8)
168 static int sm501_alloc_mem(struct sm501fb_info *inf, struct sm501_mem *mem,
169 unsigned int why, size_t size, u32 smem_len)
171 struct sm501fb_par *par;
177 case SM501_MEMF_CURSOR:
178 ptr = inf->fbmem_len - size;
179 inf->fbmem_len = ptr; /* adjust available memory. */
182 case SM501_MEMF_PANEL:
183 if (size > inf->fbmem_len)
186 ptr = inf->fbmem_len - size;
187 fbi = inf->fb[HEAD_CRT];
189 /* round down, some programs such as directfb do not draw
190 * 0,0 correctly unless the start is aligned to a page start.
194 ptr &= ~(PAGE_SIZE - 1);
196 if (fbi && ptr < smem_len)
204 /* check to see if we have panel memory allocated
205 * which would put an limit on available memory. */
207 fbi = inf->fb[HEAD_PANEL];
210 end = par->screen.k_addr ? par->screen.sm_addr : inf->fbmem_len;
212 end = inf->fbmem_len;
214 if ((ptr + size) > end)
219 case SM501_MEMF_ACCEL:
220 fbi = inf->fb[HEAD_CRT];
221 ptr = fbi ? smem_len : 0;
223 fbi = inf->fb[HEAD_PANEL];
226 end = par->screen.sm_addr;
228 end = inf->fbmem_len;
230 if ((ptr + size) > end)
241 mem->k_addr = inf->fbmem + ptr;
243 dev_dbg(inf->dev, "%s: result %08lx, %p - %u, %zd\n",
244 __func__, mem->sm_addr, mem->k_addr, why, size);
251 * Converts a period in picoseconds to Hz.
253 * Note, we try to keep this in Hz to minimise rounding with
254 * the limited PLL settings on the SM501.
257 static unsigned long sm501fb_ps_to_hz(unsigned long psvalue)
259 unsigned long long numerator=1000000000000ULL;
261 /* 10^12 / picosecond period gives frequency in Hz */
262 do_div(numerator, psvalue);
263 return (unsigned long)numerator;
266 /* sm501fb_hz_to_ps is identical to the opposite transform */
268 #define sm501fb_hz_to_ps(x) sm501fb_ps_to_hz(x)
270 /* sm501fb_setup_gamma
272 * Programs a linear 1.0 gamma ramp in case the gamma
273 * correction is enabled without programming anything else.
276 static void sm501fb_setup_gamma(struct sm501fb_info *fbi,
277 unsigned long palette)
279 unsigned long value = 0;
282 /* set gamma values */
283 for (offset = 0; offset < 256 * 4; offset += 4) {
284 smc501_writel(value, fbi->regs + palette + offset);
285 value += 0x010101; /* Advance RGB by 1,1,1.*/
291 * check common variables for both panel and crt
294 static int sm501fb_check_var(struct fb_var_screeninfo *var,
295 struct fb_info *info)
297 struct sm501fb_par *par = info->par;
298 struct sm501fb_info *sm = par->info;
301 /* check we can fit these values into the registers */
303 if (var->hsync_len > 255 || var->vsync_len > 63)
306 /* hdisplay end and hsync start */
307 if ((var->xres + var->right_margin) > 4096)
310 /* vdisplay end and vsync start */
311 if ((var->yres + var->lower_margin) > 2048)
314 /* hard limits of device */
316 if (h_total(var) > 4096 || v_total(var) > 2048)
319 /* check our line length is going to be 128 bit aligned */
321 tmp = (var->xres * var->bits_per_pixel) / 8;
325 /* check the virtual size */
327 if (var->xres_virtual > 4096 || var->yres_virtual > 2048)
330 /* can cope with 8,16 or 32bpp */
332 if (var->bits_per_pixel <= 8)
333 var->bits_per_pixel = 8;
334 else if (var->bits_per_pixel <= 16)
335 var->bits_per_pixel = 16;
336 else if (var->bits_per_pixel == 24)
337 var->bits_per_pixel = 32;
339 /* set r/g/b positions and validate bpp */
340 switch(var->bits_per_pixel) {
342 var->red.length = var->bits_per_pixel;
344 var->green.length = var->bits_per_pixel;
345 var->green.offset = 0;
346 var->blue.length = var->bits_per_pixel;
347 var->blue.offset = 0;
348 var->transp.length = 0;
349 var->transp.offset = 0;
354 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
355 var->blue.offset = 11;
356 var->green.offset = 5;
359 var->red.offset = 11;
360 var->green.offset = 5;
361 var->blue.offset = 0;
363 var->transp.offset = 0;
366 var->green.length = 6;
367 var->blue.length = 5;
368 var->transp.length = 0;
372 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
373 var->transp.offset = 0;
375 var->green.offset = 16;
376 var->blue.offset = 24;
378 var->transp.offset = 24;
379 var->red.offset = 16;
380 var->green.offset = 8;
381 var->blue.offset = 0;
385 var->green.length = 8;
386 var->blue.length = 8;
387 var->transp.length = 0;
398 * sm501fb_check_var_crt():
400 * check the parameters for the CRT head, and either bring them
401 * back into range, or return -EINVAL.
404 static int sm501fb_check_var_crt(struct fb_var_screeninfo *var,
405 struct fb_info *info)
407 return sm501fb_check_var(var, info);
410 /* sm501fb_check_var_pnl():
412 * check the parameters for the CRT head, and either bring them
413 * back into range, or return -EINVAL.
416 static int sm501fb_check_var_pnl(struct fb_var_screeninfo *var,
417 struct fb_info *info)
419 return sm501fb_check_var(var, info);
422 /* sm501fb_set_par_common
424 * set common registers for framebuffers
427 static int sm501fb_set_par_common(struct fb_info *info,
428 struct fb_var_screeninfo *var)
430 struct sm501fb_par *par = info->par;
431 struct sm501fb_info *fbi = par->info;
432 unsigned long pixclock; /* pixelclock in Hz */
433 unsigned long sm501pixclock; /* pixelclock the 501 can achieve in Hz */
434 unsigned int mem_type;
435 unsigned int clock_type;
436 unsigned int head_addr;
437 unsigned int smem_len;
439 dev_dbg(fbi->dev, "%s: %dx%d, bpp = %d, virtual %dx%d\n",
440 __func__, var->xres, var->yres, var->bits_per_pixel,
441 var->xres_virtual, var->yres_virtual);
445 mem_type = SM501_MEMF_CRT;
446 clock_type = SM501_CLOCK_V2XCLK;
447 head_addr = SM501_DC_CRT_FB_ADDR;
451 mem_type = SM501_MEMF_PANEL;
452 clock_type = SM501_CLOCK_P2XCLK;
453 head_addr = SM501_DC_PANEL_FB_ADDR;
457 mem_type = 0; /* stop compiler warnings */
462 switch (var->bits_per_pixel) {
464 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
468 info->fix.visual = FB_VISUAL_TRUECOLOR;
472 info->fix.visual = FB_VISUAL_TRUECOLOR;
476 /* allocate fb memory within 501 */
477 info->fix.line_length = (var->xres_virtual * var->bits_per_pixel)/8;
478 smem_len = info->fix.line_length * var->yres_virtual;
480 dev_dbg(fbi->dev, "%s: line length = %u\n", __func__,
481 info->fix.line_length);
483 if (sm501_alloc_mem(fbi, &par->screen, mem_type, smem_len, smem_len)) {
484 dev_err(fbi->dev, "no memory available\n");
488 mutex_lock(&info->mm_lock);
489 info->fix.smem_start = fbi->fbmem_res->start + par->screen.sm_addr;
490 info->fix.smem_len = smem_len;
491 mutex_unlock(&info->mm_lock);
493 info->screen_base = fbi->fbmem + par->screen.sm_addr;
494 info->screen_size = info->fix.smem_len;
496 /* set start of framebuffer to the screen */
498 smc501_writel(par->screen.sm_addr | SM501_ADDR_FLIP,
499 fbi->regs + head_addr);
501 /* program CRT clock */
503 pixclock = sm501fb_ps_to_hz(var->pixclock);
505 sm501pixclock = sm501_set_clock(fbi->dev->parent, clock_type,
508 /* update fb layer with actual clock used */
509 var->pixclock = sm501fb_hz_to_ps(sm501pixclock);
511 dev_dbg(fbi->dev, "%s: pixclock(ps) = %u, pixclock(Hz) = %lu, "
512 "sm501pixclock = %lu, error = %ld%%\n",
513 __func__, var->pixclock, pixclock, sm501pixclock,
514 ((pixclock - sm501pixclock)*100)/pixclock);
519 /* sm501fb_set_par_geometry
521 * set the geometry registers for specified framebuffer.
524 static void sm501fb_set_par_geometry(struct fb_info *info,
525 struct fb_var_screeninfo *var)
527 struct sm501fb_par *par = info->par;
528 struct sm501fb_info *fbi = par->info;
529 void __iomem *base = fbi->regs;
532 if (par->head == HEAD_CRT)
533 base += SM501_DC_CRT_H_TOT;
535 base += SM501_DC_PANEL_H_TOT;
537 /* set framebuffer width and display width */
539 reg = info->fix.line_length;
540 reg |= ((var->xres * var->bits_per_pixel)/8) << 16;
542 smc501_writel(reg, fbi->regs + (par->head == HEAD_CRT ?
543 SM501_DC_CRT_FB_OFFSET : SM501_DC_PANEL_FB_OFFSET));
545 /* program horizontal total */
547 reg = (h_total(var) - 1) << 16;
548 reg |= (var->xres - 1);
550 smc501_writel(reg, base + SM501_OFF_DC_H_TOT);
552 /* program horizontal sync */
554 reg = var->hsync_len << 16;
555 reg |= var->xres + var->right_margin - 1;
557 smc501_writel(reg, base + SM501_OFF_DC_H_SYNC);
559 /* program vertical total */
561 reg = (v_total(var) - 1) << 16;
562 reg |= (var->yres - 1);
564 smc501_writel(reg, base + SM501_OFF_DC_V_TOT);
566 /* program vertical sync */
567 reg = var->vsync_len << 16;
568 reg |= var->yres + var->lower_margin - 1;
570 smc501_writel(reg, base + SM501_OFF_DC_V_SYNC);
575 * pan the CRT display output within an virtual framebuffer
578 static int sm501fb_pan_crt(struct fb_var_screeninfo *var,
579 struct fb_info *info)
581 struct sm501fb_par *par = info->par;
582 struct sm501fb_info *fbi = par->info;
583 unsigned int bytes_pixel = info->var.bits_per_pixel / 8;
587 xoffs = var->xoffset * bytes_pixel;
589 reg = smc501_readl(fbi->regs + SM501_DC_CRT_CONTROL);
591 reg &= ~SM501_DC_CRT_CONTROL_PIXEL_MASK;
592 reg |= ((xoffs & 15) / bytes_pixel) << 4;
593 smc501_writel(reg, fbi->regs + SM501_DC_CRT_CONTROL);
595 reg = (par->screen.sm_addr + xoffs +
596 var->yoffset * info->fix.line_length);
597 smc501_writel(reg | SM501_ADDR_FLIP, fbi->regs + SM501_DC_CRT_FB_ADDR);
599 sm501fb_sync_regs(fbi);
605 * pan the panel display output within an virtual framebuffer
608 static int sm501fb_pan_pnl(struct fb_var_screeninfo *var,
609 struct fb_info *info)
611 struct sm501fb_par *par = info->par;
612 struct sm501fb_info *fbi = par->info;
615 reg = var->xoffset | (info->var.xres_virtual << 16);
616 smc501_writel(reg, fbi->regs + SM501_DC_PANEL_FB_WIDTH);
618 reg = var->yoffset | (info->var.yres_virtual << 16);
619 smc501_writel(reg, fbi->regs + SM501_DC_PANEL_FB_HEIGHT);
621 sm501fb_sync_regs(fbi);
625 /* sm501fb_set_par_crt
627 * Set the CRT video mode from the fb_info structure
630 static int sm501fb_set_par_crt(struct fb_info *info)
632 struct sm501fb_par *par = info->par;
633 struct sm501fb_info *fbi = par->info;
634 struct fb_var_screeninfo *var = &info->var;
635 unsigned long control; /* control register */
638 /* activate new configuration */
640 dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
642 /* enable CRT DAC - note 0 is on!*/
643 sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
645 control = smc501_readl(fbi->regs + SM501_DC_CRT_CONTROL);
647 control &= (SM501_DC_CRT_CONTROL_PIXEL_MASK |
648 SM501_DC_CRT_CONTROL_GAMMA |
649 SM501_DC_CRT_CONTROL_BLANK |
650 SM501_DC_CRT_CONTROL_SEL |
651 SM501_DC_CRT_CONTROL_CP |
652 SM501_DC_CRT_CONTROL_TVP);
654 /* set the sync polarities before we check data source */
656 if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
657 control |= SM501_DC_CRT_CONTROL_HSP;
659 if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
660 control |= SM501_DC_CRT_CONTROL_VSP;
662 if ((control & SM501_DC_CRT_CONTROL_SEL) == 0) {
663 /* the head is displaying panel data... */
665 sm501_alloc_mem(fbi, &par->screen, SM501_MEMF_CRT, 0,
670 ret = sm501fb_set_par_common(info, var);
672 dev_err(fbi->dev, "failed to set common parameters\n");
676 sm501fb_pan_crt(var, info);
677 sm501fb_set_par_geometry(info, var);
679 control |= SM501_FIFO_3; /* fill if >3 free slots */
681 switch(var->bits_per_pixel) {
683 control |= SM501_DC_CRT_CONTROL_8BPP;
687 control |= SM501_DC_CRT_CONTROL_16BPP;
688 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
692 control |= SM501_DC_CRT_CONTROL_32BPP;
693 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
700 control |= SM501_DC_CRT_CONTROL_SEL; /* CRT displays CRT data */
701 control |= SM501_DC_CRT_CONTROL_TE; /* enable CRT timing */
702 control |= SM501_DC_CRT_CONTROL_ENABLE; /* enable CRT plane */
705 dev_dbg(fbi->dev, "new control is %08lx\n", control);
707 smc501_writel(control, fbi->regs + SM501_DC_CRT_CONTROL);
708 sm501fb_sync_regs(fbi);
713 static void sm501fb_panel_power(struct sm501fb_info *fbi, int to)
715 unsigned long control;
716 void __iomem *ctrl_reg = fbi->regs + SM501_DC_PANEL_CONTROL;
717 struct sm501_platdata_fbsub *pd = fbi->pdata->fb_pnl;
719 control = smc501_readl(ctrl_reg);
721 if (to && (control & SM501_DC_PANEL_CONTROL_VDD) == 0) {
722 /* enable panel power */
724 control |= SM501_DC_PANEL_CONTROL_VDD; /* FPVDDEN */
725 smc501_writel(control, ctrl_reg);
726 sm501fb_sync_regs(fbi);
729 control |= SM501_DC_PANEL_CONTROL_DATA; /* DATA */
730 smc501_writel(control, ctrl_reg);
731 sm501fb_sync_regs(fbi);
736 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_VBIASEN)) {
737 if (pd->flags & SM501FB_FLAG_PANEL_INV_VBIASEN)
738 control &= ~SM501_DC_PANEL_CONTROL_BIAS;
740 control |= SM501_DC_PANEL_CONTROL_BIAS;
742 smc501_writel(control, ctrl_reg);
743 sm501fb_sync_regs(fbi);
747 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_FPEN)) {
748 if (pd->flags & SM501FB_FLAG_PANEL_INV_FPEN)
749 control &= ~SM501_DC_PANEL_CONTROL_FPEN;
751 control |= SM501_DC_PANEL_CONTROL_FPEN;
753 smc501_writel(control, ctrl_reg);
754 sm501fb_sync_regs(fbi);
757 } else if (!to && (control & SM501_DC_PANEL_CONTROL_VDD) != 0) {
758 /* disable panel power */
759 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_FPEN)) {
760 if (pd->flags & SM501FB_FLAG_PANEL_INV_FPEN)
761 control |= SM501_DC_PANEL_CONTROL_FPEN;
763 control &= ~SM501_DC_PANEL_CONTROL_FPEN;
765 smc501_writel(control, ctrl_reg);
766 sm501fb_sync_regs(fbi);
770 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_VBIASEN)) {
771 if (pd->flags & SM501FB_FLAG_PANEL_INV_VBIASEN)
772 control |= SM501_DC_PANEL_CONTROL_BIAS;
774 control &= ~SM501_DC_PANEL_CONTROL_BIAS;
776 smc501_writel(control, ctrl_reg);
777 sm501fb_sync_regs(fbi);
781 control &= ~SM501_DC_PANEL_CONTROL_DATA;
782 smc501_writel(control, ctrl_reg);
783 sm501fb_sync_regs(fbi);
786 control &= ~SM501_DC_PANEL_CONTROL_VDD;
787 smc501_writel(control, ctrl_reg);
788 sm501fb_sync_regs(fbi);
792 sm501fb_sync_regs(fbi);
795 /* sm501fb_set_par_pnl
797 * Set the panel video mode from the fb_info structure
800 static int sm501fb_set_par_pnl(struct fb_info *info)
802 struct sm501fb_par *par = info->par;
803 struct sm501fb_info *fbi = par->info;
804 struct fb_var_screeninfo *var = &info->var;
805 unsigned long control;
809 dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
811 /* activate this new configuration */
813 ret = sm501fb_set_par_common(info, var);
817 sm501fb_pan_pnl(var, info);
818 sm501fb_set_par_geometry(info, var);
820 /* update control register */
822 control = smc501_readl(fbi->regs + SM501_DC_PANEL_CONTROL);
823 control &= (SM501_DC_PANEL_CONTROL_GAMMA |
824 SM501_DC_PANEL_CONTROL_VDD |
825 SM501_DC_PANEL_CONTROL_DATA |
826 SM501_DC_PANEL_CONTROL_BIAS |
827 SM501_DC_PANEL_CONTROL_FPEN |
828 SM501_DC_PANEL_CONTROL_CP |
829 SM501_DC_PANEL_CONTROL_CK |
830 SM501_DC_PANEL_CONTROL_HP |
831 SM501_DC_PANEL_CONTROL_VP |
832 SM501_DC_PANEL_CONTROL_HPD |
833 SM501_DC_PANEL_CONTROL_VPD);
835 control |= SM501_FIFO_3; /* fill if >3 free slots */
837 switch(var->bits_per_pixel) {
839 control |= SM501_DC_PANEL_CONTROL_8BPP;
843 control |= SM501_DC_PANEL_CONTROL_16BPP;
844 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
848 control |= SM501_DC_PANEL_CONTROL_32BPP;
849 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
856 smc501_writel(0x0, fbi->regs + SM501_DC_PANEL_PANNING_CONTROL);
858 /* panel plane top left and bottom right location */
860 smc501_writel(0x00, fbi->regs + SM501_DC_PANEL_TL_LOC);
863 reg |= (var->yres - 1) << 16;
865 smc501_writel(reg, fbi->regs + SM501_DC_PANEL_BR_LOC);
867 /* program panel control register */
869 control |= SM501_DC_PANEL_CONTROL_TE; /* enable PANEL timing */
870 control |= SM501_DC_PANEL_CONTROL_EN; /* enable PANEL gfx plane */
872 if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
873 control |= SM501_DC_PANEL_CONTROL_HSP;
875 if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
876 control |= SM501_DC_PANEL_CONTROL_VSP;
878 smc501_writel(control, fbi->regs + SM501_DC_PANEL_CONTROL);
879 sm501fb_sync_regs(fbi);
881 /* ensure the panel interface is not tristated at this point */
883 sm501_modify_reg(fbi->dev->parent, SM501_SYSTEM_CONTROL,
884 0, SM501_SYSCTRL_PANEL_TRISTATE);
886 /* power the panel up */
887 sm501fb_panel_power(fbi, 1);
894 * convert a colour value into a field position
899 static inline unsigned int chan_to_field(unsigned int chan,
900 struct fb_bitfield *bf)
903 chan >>= 16 - bf->length;
904 return chan << bf->offset;
909 * set the colour mapping for modes that support palettised data
912 static int sm501fb_setcolreg(unsigned regno,
913 unsigned red, unsigned green, unsigned blue,
914 unsigned transp, struct fb_info *info)
916 struct sm501fb_par *par = info->par;
917 struct sm501fb_info *fbi = par->info;
918 void __iomem *base = fbi->regs;
921 if (par->head == HEAD_CRT)
922 base += SM501_DC_CRT_PALETTE;
924 base += SM501_DC_PANEL_PALETTE;
926 switch (info->fix.visual) {
927 case FB_VISUAL_TRUECOLOR:
928 /* true-colour, use pseuo-palette */
931 u32 *pal = par->pseudo_palette;
933 val = chan_to_field(red, &info->var.red);
934 val |= chan_to_field(green, &info->var.green);
935 val |= chan_to_field(blue, &info->var.blue);
941 case FB_VISUAL_PSEUDOCOLOR:
943 val = (red >> 8) << 16;
944 val |= (green >> 8) << 8;
947 smc501_writel(val, base + (regno * 4));
953 return 1; /* unknown type */
961 * Blank or un-blank the panel interface
964 static int sm501fb_blank_pnl(int blank_mode, struct fb_info *info)
966 struct sm501fb_par *par = info->par;
967 struct sm501fb_info *fbi = par->info;
969 dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
971 switch (blank_mode) {
972 case FB_BLANK_POWERDOWN:
973 sm501fb_panel_power(fbi, 0);
976 case FB_BLANK_UNBLANK:
977 sm501fb_panel_power(fbi, 1);
980 case FB_BLANK_NORMAL:
981 case FB_BLANK_VSYNC_SUSPEND:
982 case FB_BLANK_HSYNC_SUSPEND:
992 * Blank or un-blank the crt interface
995 static int sm501fb_blank_crt(int blank_mode, struct fb_info *info)
997 struct sm501fb_par *par = info->par;
998 struct sm501fb_info *fbi = par->info;
1001 dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
1003 ctrl = smc501_readl(fbi->regs + SM501_DC_CRT_CONTROL);
1005 switch (blank_mode) {
1006 case FB_BLANK_POWERDOWN:
1007 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
1008 sm501_misc_control(fbi->dev->parent, SM501_MISC_DAC_POWER, 0);
1011 case FB_BLANK_NORMAL:
1012 ctrl |= SM501_DC_CRT_CONTROL_BLANK;
1015 case FB_BLANK_UNBLANK:
1016 ctrl &= ~SM501_DC_CRT_CONTROL_BLANK;
1017 ctrl |= SM501_DC_CRT_CONTROL_ENABLE;
1018 sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
1021 case FB_BLANK_VSYNC_SUSPEND:
1022 case FB_BLANK_HSYNC_SUSPEND:
1028 smc501_writel(ctrl, fbi->regs + SM501_DC_CRT_CONTROL);
1029 sm501fb_sync_regs(fbi);
1036 * set or change the hardware cursor parameters
1039 static int sm501fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1041 struct sm501fb_par *par = info->par;
1042 struct sm501fb_info *fbi = par->info;
1043 void __iomem *base = fbi->regs;
1044 unsigned long hwc_addr;
1045 unsigned long fg, bg;
1047 dev_dbg(fbi->dev, "%s(%p,%p)\n", __func__, info, cursor);
1049 if (par->head == HEAD_CRT)
1050 base += SM501_DC_CRT_HWC_BASE;
1052 base += SM501_DC_PANEL_HWC_BASE;
1054 /* check not being asked to exceed capabilities */
1056 if (cursor->image.width > 64)
1059 if (cursor->image.height > 64)
1062 if (cursor->image.depth > 1)
1065 hwc_addr = smc501_readl(base + SM501_OFF_HWC_ADDR);
1068 smc501_writel(hwc_addr | SM501_HWC_EN,
1069 base + SM501_OFF_HWC_ADDR);
1071 smc501_writel(hwc_addr & ~SM501_HWC_EN,
1072 base + SM501_OFF_HWC_ADDR);
1075 if (cursor->set & FB_CUR_SETPOS) {
1076 unsigned int x = cursor->image.dx;
1077 unsigned int y = cursor->image.dy;
1079 if (x >= 2048 || y >= 2048 )
1082 dev_dbg(fbi->dev, "set position %d,%d\n", x, y);
1084 //y += cursor->image.height;
1086 smc501_writel(x | (y << 16), base + SM501_OFF_HWC_LOC);
1089 if (cursor->set & FB_CUR_SETCMAP) {
1090 unsigned int bg_col = cursor->image.bg_color;
1091 unsigned int fg_col = cursor->image.fg_color;
1093 dev_dbg(fbi->dev, "%s: update cmap (%08x,%08x)\n",
1094 __func__, bg_col, fg_col);
1096 bg = ((info->cmap.red[bg_col] & 0xF8) << 8) |
1097 ((info->cmap.green[bg_col] & 0xFC) << 3) |
1098 ((info->cmap.blue[bg_col] & 0xF8) >> 3);
1100 fg = ((info->cmap.red[fg_col] & 0xF8) << 8) |
1101 ((info->cmap.green[fg_col] & 0xFC) << 3) |
1102 ((info->cmap.blue[fg_col] & 0xF8) >> 3);
1104 dev_dbg(fbi->dev, "fgcol %08lx, bgcol %08lx\n", fg, bg);
1106 smc501_writel(bg, base + SM501_OFF_HWC_COLOR_1_2);
1107 smc501_writel(fg, base + SM501_OFF_HWC_COLOR_3);
1110 if (cursor->set & FB_CUR_SETSIZE ||
1111 cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) {
1112 /* SM501 cursor is a two bpp 64x64 bitmap this routine
1113 * clears it to transparent then combines the cursor
1114 * shape plane with the colour plane to set the
1117 const unsigned char *pcol = cursor->image.data;
1118 const unsigned char *pmsk = cursor->mask;
1119 void __iomem *dst = par->cursor.k_addr;
1120 unsigned char dcol = 0;
1121 unsigned char dmsk = 0;
1124 dev_dbg(fbi->dev, "%s: setting shape (%d,%d)\n",
1125 __func__, cursor->image.width, cursor->image.height);
1127 for (op = 0; op < (64*64*2)/8; op+=4)
1128 smc501_writel(0x0, dst + op);
1130 for (y = 0; y < cursor->image.height; y++) {
1131 for (x = 0; x < cursor->image.width; x++) {
1141 op = (dcol & 1) ? 1 : 3;
1142 op <<= ((x % 4) * 2);
1144 op |= readb(dst + (x / 4));
1145 writeb(op, dst + (x / 4));
1152 sm501fb_sync_regs(fbi); /* ensure cursor data flushed */
1156 /* sm501fb_crtsrc_show
1158 * device attribute code to show where the crt output is sourced from
1161 static ssize_t sm501fb_crtsrc_show(struct device *dev,
1162 struct device_attribute *attr, char *buf)
1164 struct sm501fb_info *info = dev_get_drvdata(dev);
1167 ctrl = smc501_readl(info->regs + SM501_DC_CRT_CONTROL);
1168 ctrl &= SM501_DC_CRT_CONTROL_SEL;
1170 return sysfs_emit(buf, "%s\n", ctrl ? "crt" : "panel");
1173 /* sm501fb_crtsrc_show
1175 * device attribute code to set where the crt output is sourced from
1178 static ssize_t sm501fb_crtsrc_store(struct device *dev,
1179 struct device_attribute *attr,
1180 const char *buf, size_t len)
1182 struct sm501fb_info *info = dev_get_drvdata(dev);
1183 enum sm501_controller head;
1189 if (strncasecmp(buf, "crt", 3) == 0)
1191 else if (strncasecmp(buf, "panel", 5) == 0)
1196 dev_info(dev, "setting crt source to head %d\n", head);
1198 ctrl = smc501_readl(info->regs + SM501_DC_CRT_CONTROL);
1200 if (head == HEAD_CRT) {
1201 ctrl |= SM501_DC_CRT_CONTROL_SEL;
1202 ctrl |= SM501_DC_CRT_CONTROL_ENABLE;
1203 ctrl |= SM501_DC_CRT_CONTROL_TE;
1205 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1206 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
1207 ctrl &= ~SM501_DC_CRT_CONTROL_TE;
1210 smc501_writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1211 sm501fb_sync_regs(info);
1216 /* Prepare the device_attr for registration with sysfs later */
1217 static DEVICE_ATTR(crt_src, 0664, sm501fb_crtsrc_show, sm501fb_crtsrc_store);
1219 /* sm501fb_show_regs
1221 * show the primary sm501 registers
1223 static int sm501fb_show_regs(struct sm501fb_info *info, char *ptr,
1224 unsigned int start, unsigned int len)
1226 void __iomem *mem = info->regs;
1230 for (reg = start; reg < (len + start); reg += 4)
1231 ptr += sprintf(ptr, "%08x = %08x\n", reg,
1232 smc501_readl(mem + reg));
1237 /* sm501fb_debug_show_crt
1239 * show the crt control and cursor registers
1242 static ssize_t sm501fb_debug_show_crt(struct device *dev,
1243 struct device_attribute *attr, char *buf)
1245 struct sm501fb_info *info = dev_get_drvdata(dev);
1248 ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_CONTROL, 0x40);
1249 ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_HWC_BASE, 0x10);
1254 static DEVICE_ATTR(fbregs_crt, 0444, sm501fb_debug_show_crt, NULL);
1256 /* sm501fb_debug_show_pnl
1258 * show the panel control and cursor registers
1261 static ssize_t sm501fb_debug_show_pnl(struct device *dev,
1262 struct device_attribute *attr, char *buf)
1264 struct sm501fb_info *info = dev_get_drvdata(dev);
1267 ptr += sm501fb_show_regs(info, ptr, 0x0, 0x40);
1268 ptr += sm501fb_show_regs(info, ptr, SM501_DC_PANEL_HWC_BASE, 0x10);
1273 static DEVICE_ATTR(fbregs_pnl, 0444, sm501fb_debug_show_pnl, NULL);
1275 static struct attribute *sm501fb_attrs[] = {
1276 &dev_attr_crt_src.attr,
1277 &dev_attr_fbregs_pnl.attr,
1278 &dev_attr_fbregs_crt.attr,
1281 ATTRIBUTE_GROUPS(sm501fb);
1283 /* acceleration operations */
1284 static int sm501fb_sync(struct fb_info *info)
1286 int count = 1000000;
1287 struct sm501fb_par *par = info->par;
1288 struct sm501fb_info *fbi = par->info;
1290 /* wait for the 2d engine to be ready */
1291 while ((count > 0) &&
1292 (smc501_readl(fbi->regs + SM501_SYSTEM_CONTROL) &
1293 SM501_SYSCTRL_2D_ENGINE_STATUS) != 0)
1297 fb_err(info, "Timeout waiting for 2d engine sync\n");
1303 static void sm501fb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1305 struct sm501fb_par *par = info->par;
1306 struct sm501fb_info *fbi = par->info;
1307 int width = area->width;
1308 int height = area->height;
1313 unsigned long rtl = 0;
1316 if ((sx >= info->var.xres_virtual) ||
1317 (sy >= info->var.yres_virtual))
1318 /* source Area not within virtual screen, skipping */
1320 if ((sx + width) >= info->var.xres_virtual)
1321 width = info->var.xres_virtual - sx - 1;
1322 if ((sy + height) >= info->var.yres_virtual)
1323 height = info->var.yres_virtual - sy - 1;
1326 if ((dx >= info->var.xres_virtual) ||
1327 (dy >= info->var.yres_virtual))
1328 /* Destination Area not within virtual screen, skipping */
1330 if ((dx + width) >= info->var.xres_virtual)
1331 width = info->var.xres_virtual - dx - 1;
1332 if ((dy + height) >= info->var.yres_virtual)
1333 height = info->var.yres_virtual - dy - 1;
1335 if ((sx < dx) || (sy < dy)) {
1343 if (sm501fb_sync(info))
1346 /* set the base addresses */
1347 smc501_writel(par->screen.sm_addr, fbi->regs2d + SM501_2D_SOURCE_BASE);
1348 smc501_writel(par->screen.sm_addr,
1349 fbi->regs2d + SM501_2D_DESTINATION_BASE);
1351 /* set the window width */
1352 smc501_writel((info->var.xres << 16) | info->var.xres,
1353 fbi->regs2d + SM501_2D_WINDOW_WIDTH);
1355 /* set window stride */
1356 smc501_writel((info->var.xres_virtual << 16) | info->var.xres_virtual,
1357 fbi->regs2d + SM501_2D_PITCH);
1359 /* set data format */
1360 switch (info->var.bits_per_pixel) {
1362 smc501_writel(0, fbi->regs2d + SM501_2D_STRETCH);
1365 smc501_writel(0x00100000, fbi->regs2d + SM501_2D_STRETCH);
1368 smc501_writel(0x00200000, fbi->regs2d + SM501_2D_STRETCH);
1372 /* 2d compare mask */
1373 smc501_writel(0xffffffff, fbi->regs2d + SM501_2D_COLOR_COMPARE_MASK);
1376 smc501_writel(0xffffffff, fbi->regs2d + SM501_2D_MASK);
1378 /* source and destination x y */
1379 smc501_writel((sx << 16) | sy, fbi->regs2d + SM501_2D_SOURCE);
1380 smc501_writel((dx << 16) | dy, fbi->regs2d + SM501_2D_DESTINATION);
1383 smc501_writel((width << 16) | height, fbi->regs2d + SM501_2D_DIMENSION);
1386 smc501_writel(0x800000cc | rtl, fbi->regs2d + SM501_2D_CONTROL);
1389 static void sm501fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1391 struct sm501fb_par *par = info->par;
1392 struct sm501fb_info *fbi = par->info;
1393 int width = rect->width, height = rect->height;
1395 if ((rect->dx >= info->var.xres_virtual) ||
1396 (rect->dy >= info->var.yres_virtual))
1397 /* Rectangle not within virtual screen, skipping */
1399 if ((rect->dx + width) >= info->var.xres_virtual)
1400 width = info->var.xres_virtual - rect->dx - 1;
1401 if ((rect->dy + height) >= info->var.yres_virtual)
1402 height = info->var.yres_virtual - rect->dy - 1;
1404 if (sm501fb_sync(info))
1407 /* set the base addresses */
1408 smc501_writel(par->screen.sm_addr, fbi->regs2d + SM501_2D_SOURCE_BASE);
1409 smc501_writel(par->screen.sm_addr,
1410 fbi->regs2d + SM501_2D_DESTINATION_BASE);
1412 /* set the window width */
1413 smc501_writel((info->var.xres << 16) | info->var.xres,
1414 fbi->regs2d + SM501_2D_WINDOW_WIDTH);
1416 /* set window stride */
1417 smc501_writel((info->var.xres_virtual << 16) | info->var.xres_virtual,
1418 fbi->regs2d + SM501_2D_PITCH);
1420 /* set data format */
1421 switch (info->var.bits_per_pixel) {
1423 smc501_writel(0, fbi->regs2d + SM501_2D_STRETCH);
1426 smc501_writel(0x00100000, fbi->regs2d + SM501_2D_STRETCH);
1429 smc501_writel(0x00200000, fbi->regs2d + SM501_2D_STRETCH);
1433 /* 2d compare mask */
1434 smc501_writel(0xffffffff, fbi->regs2d + SM501_2D_COLOR_COMPARE_MASK);
1437 smc501_writel(0xffffffff, fbi->regs2d + SM501_2D_MASK);
1440 smc501_writel(rect->color, fbi->regs2d + SM501_2D_FOREGROUND);
1443 smc501_writel((rect->dx << 16) | rect->dy,
1444 fbi->regs2d + SM501_2D_DESTINATION);
1447 smc501_writel((width << 16) | height, fbi->regs2d + SM501_2D_DIMENSION);
1449 /* do rectangle fill */
1450 smc501_writel(0x800100cc, fbi->regs2d + SM501_2D_CONTROL);
1454 static struct fb_ops sm501fb_ops_crt = {
1455 .owner = THIS_MODULE,
1456 __FB_DEFAULT_IOMEM_OPS_RDWR,
1457 .fb_check_var = sm501fb_check_var_crt,
1458 .fb_set_par = sm501fb_set_par_crt,
1459 .fb_blank = sm501fb_blank_crt,
1460 .fb_setcolreg = sm501fb_setcolreg,
1461 .fb_pan_display = sm501fb_pan_crt,
1462 .fb_cursor = sm501fb_cursor,
1463 .fb_fillrect = sm501fb_fillrect,
1464 .fb_copyarea = sm501fb_copyarea,
1465 .fb_imageblit = cfb_imageblit,
1466 .fb_sync = sm501fb_sync,
1467 __FB_DEFAULT_IOMEM_OPS_MMAP,
1470 static struct fb_ops sm501fb_ops_pnl = {
1471 .owner = THIS_MODULE,
1472 __FB_DEFAULT_IOMEM_OPS_RDWR,
1473 .fb_check_var = sm501fb_check_var_pnl,
1474 .fb_set_par = sm501fb_set_par_pnl,
1475 .fb_pan_display = sm501fb_pan_pnl,
1476 .fb_blank = sm501fb_blank_pnl,
1477 .fb_setcolreg = sm501fb_setcolreg,
1478 .fb_cursor = sm501fb_cursor,
1479 .fb_fillrect = sm501fb_fillrect,
1480 .fb_copyarea = sm501fb_copyarea,
1481 .fb_imageblit = cfb_imageblit,
1482 .fb_sync = sm501fb_sync,
1483 __FB_DEFAULT_IOMEM_OPS_MMAP,
1486 /* sm501_init_cursor
1488 * initialise hw cursor parameters
1491 static int sm501_init_cursor(struct fb_info *fbi, unsigned int reg_base)
1493 struct sm501fb_par *par;
1494 struct sm501fb_info *info;
1503 par->cursor_regs = info->regs + reg_base;
1505 ret = sm501_alloc_mem(info, &par->cursor, SM501_MEMF_CURSOR, 1024,
1510 /* initialise the colour registers */
1512 smc501_writel(par->cursor.sm_addr,
1513 par->cursor_regs + SM501_OFF_HWC_ADDR);
1515 smc501_writel(0x00, par->cursor_regs + SM501_OFF_HWC_LOC);
1516 smc501_writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_1_2);
1517 smc501_writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_3);
1518 sm501fb_sync_regs(info);
1523 /* sm501fb_info_start
1525 * fills the par structure claiming resources and remapping etc.
1528 static int sm501fb_start(struct sm501fb_info *info,
1529 struct platform_device *pdev)
1531 struct resource *res;
1532 struct device *dev = &pdev->dev;
1536 info->irq = ret = platform_get_irq(pdev, 0);
1538 /* we currently do not use the IRQ */
1539 dev_warn(dev, "no irq for device\n");
1542 /* allocate, reserve and remap resources for display
1543 * controller registers */
1544 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1546 dev_err(dev, "no resource definition for registers\n");
1551 info->regs_res = request_mem_region(res->start,
1555 if (info->regs_res == NULL) {
1556 dev_err(dev, "cannot claim registers\n");
1561 info->regs = ioremap(res->start, resource_size(res));
1562 if (info->regs == NULL) {
1563 dev_err(dev, "cannot remap registers\n");
1568 /* allocate, reserve and remap resources for 2d
1569 * controller registers */
1570 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1572 dev_err(dev, "no resource definition for 2d registers\n");
1577 info->regs2d_res = request_mem_region(res->start,
1581 if (info->regs2d_res == NULL) {
1582 dev_err(dev, "cannot claim registers\n");
1587 info->regs2d = ioremap(res->start, resource_size(res));
1588 if (info->regs2d == NULL) {
1589 dev_err(dev, "cannot remap registers\n");
1591 goto err_regs2d_res;
1594 /* allocate, reserve resources for framebuffer */
1595 res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
1597 dev_err(dev, "no memory resource defined\n");
1599 goto err_regs2d_map;
1602 info->fbmem_res = request_mem_region(res->start,
1605 if (info->fbmem_res == NULL) {
1606 dev_err(dev, "cannot claim framebuffer\n");
1608 goto err_regs2d_map;
1611 info->fbmem = ioremap(res->start, resource_size(res));
1612 if (info->fbmem == NULL) {
1613 dev_err(dev, "cannot remap framebuffer\n");
1618 info->fbmem_len = resource_size(res);
1620 /* clear framebuffer memory - avoids garbage data on unused fb */
1621 memset_io(info->fbmem, 0, info->fbmem_len);
1623 /* clear palette ram - undefined at power on */
1624 for (k = 0; k < (256 * 3); k++)
1625 smc501_writel(0, info->regs + SM501_DC_PANEL_PALETTE + (k * 4));
1627 /* enable display controller */
1628 sm501_unit_power(dev->parent, SM501_GATE_DISPLAY, 1);
1630 /* enable 2d controller */
1631 sm501_unit_power(dev->parent, SM501_GATE_2D_ENGINE, 1);
1634 sm501_init_cursor(info->fb[HEAD_CRT], SM501_DC_CRT_HWC_ADDR);
1635 sm501_init_cursor(info->fb[HEAD_PANEL], SM501_DC_PANEL_HWC_ADDR);
1637 return 0; /* everything is setup */
1640 release_mem_region(info->fbmem_res->start,
1641 resource_size(info->fbmem_res));
1644 iounmap(info->regs2d);
1647 release_mem_region(info->regs2d_res->start,
1648 resource_size(info->regs2d_res));
1651 iounmap(info->regs);
1654 release_mem_region(info->regs_res->start,
1655 resource_size(info->regs_res));
1661 static void sm501fb_stop(struct sm501fb_info *info)
1663 /* disable display controller */
1664 sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1666 iounmap(info->fbmem);
1667 release_mem_region(info->fbmem_res->start,
1668 resource_size(info->fbmem_res));
1670 iounmap(info->regs2d);
1671 release_mem_region(info->regs2d_res->start,
1672 resource_size(info->regs2d_res));
1674 iounmap(info->regs);
1675 release_mem_region(info->regs_res->start,
1676 resource_size(info->regs_res));
1679 static int sm501fb_init_fb(struct fb_info *fb, enum sm501_controller head,
1682 struct sm501_platdata_fbsub *pd;
1683 struct sm501fb_par *par = fb->par;
1684 struct sm501fb_info *info = par->info;
1686 unsigned int enable;
1691 pd = info->pdata->fb_crt;
1692 ctrl = smc501_readl(info->regs + SM501_DC_CRT_CONTROL);
1693 enable = (ctrl & SM501_DC_CRT_CONTROL_ENABLE) ? 1 : 0;
1695 /* ensure we set the correct source register */
1696 if (info->pdata->fb_route != SM501_FB_CRT_PANEL) {
1697 ctrl |= SM501_DC_CRT_CONTROL_SEL;
1698 smc501_writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1704 pd = info->pdata->fb_pnl;
1705 ctrl = smc501_readl(info->regs + SM501_DC_PANEL_CONTROL);
1706 enable = (ctrl & SM501_DC_PANEL_CONTROL_EN) ? 1 : 0;
1710 pd = NULL; /* stop compiler warnings */
1716 dev_info(info->dev, "fb %s %s at start\n",
1717 fbname, str_enabled_disabled(enable));
1719 /* check to see if our routing allows this */
1721 if (head == HEAD_CRT && info->pdata->fb_route == SM501_FB_CRT_PANEL) {
1722 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1723 smc501_writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1727 strscpy(fb->fix.id, fbname, sizeof(fb->fix.id));
1730 (head == HEAD_CRT) ? &sm501fb_ops_crt : &sm501fb_ops_pnl,
1731 sizeof(struct fb_ops));
1733 /* update ops dependent on what we've been passed */
1735 if ((pd->flags & SM501FB_FLAG_USE_HWCURSOR) == 0)
1736 par->ops.fb_cursor = NULL;
1738 fb->fbops = &par->ops;
1739 fb->flags = FBINFO_READS_FAST |
1740 FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT |
1741 FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
1743 #if defined(CONFIG_OF)
1745 if (of_property_read_bool(info->dev->parent->of_node, "little-endian"))
1746 fb->flags |= FBINFO_FOREIGN_ENDIAN;
1748 if (of_property_read_bool(info->dev->parent->of_node, "big-endian"))
1749 fb->flags |= FBINFO_FOREIGN_ENDIAN;
1754 fb->fix.type = FB_TYPE_PACKED_PIXELS;
1755 fb->fix.type_aux = 0;
1756 fb->fix.xpanstep = 1;
1757 fb->fix.ypanstep = 1;
1758 fb->fix.ywrapstep = 0;
1759 fb->fix.accel = FB_ACCEL_NONE;
1764 fb->var.activate = FB_ACTIVATE_NOW;
1765 fb->var.accel_flags = 0;
1766 fb->var.vmode = FB_VMODE_NONINTERLACED;
1767 fb->var.bits_per_pixel = 16;
1769 if (info->edid_data) {
1770 /* Now build modedb from EDID */
1771 fb_edid_to_monspecs(info->edid_data, &fb->monspecs);
1772 fb_videomode_to_modelist(fb->monspecs.modedb,
1773 fb->monspecs.modedb_len,
1777 if (enable && (pd->flags & SM501FB_FLAG_USE_INIT_MODE) && 0) {
1778 /* TODO read the mode from the current display */
1781 dev_info(info->dev, "using supplied mode\n");
1782 fb_videomode_to_var(&fb->var, pd->def_mode);
1784 fb->var.bits_per_pixel = pd->def_bpp ? pd->def_bpp : 8;
1785 fb->var.xres_virtual = fb->var.xres;
1786 fb->var.yres_virtual = fb->var.yres;
1788 if (info->edid_data) {
1789 ret = fb_find_mode(&fb->var, fb, fb_mode,
1790 fb->monspecs.modedb,
1791 fb->monspecs.modedb_len,
1792 &sm501_default_mode, default_bpp);
1793 /* edid_data is no longer needed, free it */
1794 kfree(info->edid_data);
1796 ret = fb_find_mode(&fb->var, fb,
1797 NULL, NULL, 0, NULL, 8);
1802 dev_info(info->dev, "using mode specified in "
1806 dev_info(info->dev, "using mode specified in "
1807 "@mode with ignored refresh rate\n");
1810 dev_info(info->dev, "using mode default "
1814 dev_info(info->dev, "using mode from list\n");
1817 dev_info(info->dev, "ret = %d\n", ret);
1818 dev_info(info->dev, "failed to find mode\n");
1824 /* initialise and set the palette */
1825 if (fb_alloc_cmap(&fb->cmap, NR_PALETTE, 0)) {
1826 dev_err(info->dev, "failed to allocate cmap memory\n");
1829 fb_set_cmap(&fb->cmap, fb);
1831 ret = (fb->fbops->fb_check_var)(&fb->var, fb);
1833 dev_err(info->dev, "check_var() failed on initial setup?\n");
1838 /* default platform data if none is supplied (ie, PCI device) */
1840 static struct sm501_platdata_fbsub sm501fb_pdata_crt = {
1841 .flags = (SM501FB_FLAG_USE_INIT_MODE |
1842 SM501FB_FLAG_USE_HWCURSOR |
1843 SM501FB_FLAG_USE_HWACCEL |
1844 SM501FB_FLAG_DISABLE_AT_EXIT),
1848 static struct sm501_platdata_fbsub sm501fb_pdata_pnl = {
1849 .flags = (SM501FB_FLAG_USE_INIT_MODE |
1850 SM501FB_FLAG_USE_HWCURSOR |
1851 SM501FB_FLAG_USE_HWACCEL |
1852 SM501FB_FLAG_DISABLE_AT_EXIT),
1855 static struct sm501_platdata_fb sm501fb_def_pdata = {
1856 .fb_route = SM501_FB_OWN,
1857 .fb_crt = &sm501fb_pdata_crt,
1858 .fb_pnl = &sm501fb_pdata_pnl,
1861 static char driver_name_crt[] = "sm501fb-crt";
1862 static char driver_name_pnl[] = "sm501fb-panel";
1864 static int sm501fb_probe_one(struct sm501fb_info *info,
1865 enum sm501_controller head)
1867 unsigned char *name = (head == HEAD_CRT) ? "crt" : "panel";
1868 struct sm501_platdata_fbsub *pd;
1869 struct sm501fb_par *par;
1870 struct fb_info *fbi;
1872 pd = (head == HEAD_CRT) ? info->pdata->fb_crt : info->pdata->fb_pnl;
1874 /* Do not initialise if we've not been given any platform data */
1876 dev_info(info->dev, "no data for fb %s (disabled)\n", name);
1880 fbi = framebuffer_alloc(sizeof(struct sm501fb_par), info->dev);
1887 fbi->pseudo_palette = &par->pseudo_palette;
1889 info->fb[head] = fbi;
1894 /* Free up anything allocated by sm501fb_init_fb */
1896 static void sm501_free_init_fb(struct sm501fb_info *info,
1897 enum sm501_controller head)
1899 struct fb_info *fbi = info->fb[head];
1904 fb_dealloc_cmap(&fbi->cmap);
1907 static int sm501fb_start_one(struct sm501fb_info *info,
1908 enum sm501_controller head, const char *drvname)
1910 struct fb_info *fbi = info->fb[head];
1916 mutex_init(&info->fb[head]->mm_lock);
1918 ret = sm501fb_init_fb(info->fb[head], head, drvname);
1920 dev_err(info->dev, "cannot initialise fb %s\n", drvname);
1924 ret = register_framebuffer(info->fb[head]);
1926 dev_err(info->dev, "failed to register fb %s\n", drvname);
1927 sm501_free_init_fb(info, head);
1931 dev_info(info->dev, "fb%d: %s frame buffer\n", fbi->node, fbi->fix.id);
1936 static int sm501fb_probe(struct platform_device *pdev)
1938 struct sm501fb_info *info;
1939 struct device *dev = &pdev->dev;
1942 /* allocate our framebuffers */
1943 info = kzalloc(sizeof(*info), GFP_KERNEL);
1945 dev_err(dev, "failed to allocate state\n");
1949 info->dev = dev = &pdev->dev;
1950 platform_set_drvdata(pdev, info);
1952 if (dev->parent->platform_data) {
1953 struct sm501_platdata *pd = dev->parent->platform_data;
1954 info->pdata = pd->fb;
1957 if (info->pdata == NULL) {
1959 #if defined(CONFIG_OF)
1960 struct device_node *np = pdev->dev.parent->of_node;
1965 info->pdata = &sm501fb_def_pdata;
1968 cp = of_get_property(np, "mode", &len);
1970 strcpy(fb_mode, cp);
1971 prop = of_get_property(np, "edid", &len);
1972 if (prop && len == EDID_LENGTH) {
1973 info->edid_data = kmemdup(prop, EDID_LENGTH,
1975 if (info->edid_data)
1981 dev_info(dev, "using default configuration data\n");
1982 info->pdata = &sm501fb_def_pdata;
1986 /* probe for the presence of each panel */
1988 ret = sm501fb_probe_one(info, HEAD_CRT);
1990 dev_err(dev, "failed to probe CRT\n");
1994 ret = sm501fb_probe_one(info, HEAD_PANEL);
1996 dev_err(dev, "failed to probe PANEL\n");
1997 goto err_probed_crt;
2000 if (info->fb[HEAD_PANEL] == NULL &&
2001 info->fb[HEAD_CRT] == NULL) {
2002 dev_err(dev, "no framebuffers found\n");
2007 /* get the resources for both of the framebuffers */
2009 ret = sm501fb_start(info, pdev);
2011 dev_err(dev, "cannot initialise SM501\n");
2012 goto err_probed_panel;
2015 ret = sm501fb_start_one(info, HEAD_CRT, driver_name_crt);
2017 dev_err(dev, "failed to start CRT\n");
2021 ret = sm501fb_start_one(info, HEAD_PANEL, driver_name_pnl);
2023 dev_err(dev, "failed to start Panel\n");
2024 goto err_started_crt;
2027 /* we registered, return ok */
2031 unregister_framebuffer(info->fb[HEAD_CRT]);
2032 sm501_free_init_fb(info, HEAD_CRT);
2038 framebuffer_release(info->fb[HEAD_PANEL]);
2041 framebuffer_release(info->fb[HEAD_CRT]);
2053 static void sm501fb_remove(struct platform_device *pdev)
2055 struct sm501fb_info *info = platform_get_drvdata(pdev);
2056 struct fb_info *fbinfo_crt = info->fb[0];
2057 struct fb_info *fbinfo_pnl = info->fb[1];
2059 sm501_free_init_fb(info, HEAD_CRT);
2060 sm501_free_init_fb(info, HEAD_PANEL);
2063 unregister_framebuffer(fbinfo_crt);
2065 unregister_framebuffer(fbinfo_pnl);
2070 framebuffer_release(fbinfo_pnl);
2071 framebuffer_release(fbinfo_crt);
2076 static int sm501fb_suspend_fb(struct sm501fb_info *info,
2077 enum sm501_controller head)
2079 struct fb_info *fbi = info->fb[head];
2080 struct sm501fb_par *par;
2086 if (par->screen.size == 0)
2089 /* blank the relevant interface to ensure unit power minimised */
2090 (par->ops.fb_blank)(FB_BLANK_POWERDOWN, fbi);
2092 /* tell console/fb driver we are suspending */
2095 fb_set_suspend(fbi, 1);
2098 /* backup copies in case chip is powered down over suspend */
2100 par->store_fb = vmalloc(par->screen.size);
2101 if (par->store_fb == NULL) {
2102 dev_err(info->dev, "no memory to store screen\n");
2106 par->store_cursor = vmalloc(par->cursor.size);
2107 if (par->store_cursor == NULL) {
2108 dev_err(info->dev, "no memory to store cursor\n");
2112 dev_dbg(info->dev, "suspending screen to %p\n", par->store_fb);
2113 dev_dbg(info->dev, "suspending cursor to %p\n", par->store_cursor);
2115 memcpy_fromio(par->store_fb, par->screen.k_addr, par->screen.size);
2116 memcpy_fromio(par->store_cursor, par->cursor.k_addr, par->cursor.size);
2121 vfree(par->store_fb);
2122 par->store_fb = NULL;
2127 static void sm501fb_resume_fb(struct sm501fb_info *info,
2128 enum sm501_controller head)
2130 struct fb_info *fbi = info->fb[head];
2131 struct sm501fb_par *par;
2137 if (par->screen.size == 0)
2140 /* re-activate the configuration */
2142 (par->ops.fb_set_par)(fbi);
2144 /* restore the data */
2146 dev_dbg(info->dev, "restoring screen from %p\n", par->store_fb);
2147 dev_dbg(info->dev, "restoring cursor from %p\n", par->store_cursor);
2150 memcpy_toio(par->screen.k_addr, par->store_fb,
2153 if (par->store_cursor)
2154 memcpy_toio(par->cursor.k_addr, par->store_cursor,
2158 fb_set_suspend(fbi, 0);
2161 vfree(par->store_fb);
2162 vfree(par->store_cursor);
2166 /* suspend and resume support */
2168 static int sm501fb_suspend(struct platform_device *pdev, pm_message_t state)
2170 struct sm501fb_info *info = platform_get_drvdata(pdev);
2172 /* store crt control to resume with */
2173 info->pm_crt_ctrl = smc501_readl(info->regs + SM501_DC_CRT_CONTROL);
2175 sm501fb_suspend_fb(info, HEAD_CRT);
2176 sm501fb_suspend_fb(info, HEAD_PANEL);
2178 /* turn off the clocks, in case the device is not powered down */
2179 sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
2184 #define SM501_CRT_CTRL_SAVE (SM501_DC_CRT_CONTROL_TVP | \
2185 SM501_DC_CRT_CONTROL_SEL)
2188 static int sm501fb_resume(struct platform_device *pdev)
2190 struct sm501fb_info *info = platform_get_drvdata(pdev);
2191 unsigned long crt_ctrl;
2193 sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 1);
2195 /* restore the items we want to be saved for crt control */
2197 crt_ctrl = smc501_readl(info->regs + SM501_DC_CRT_CONTROL);
2198 crt_ctrl &= ~SM501_CRT_CTRL_SAVE;
2199 crt_ctrl |= info->pm_crt_ctrl & SM501_CRT_CTRL_SAVE;
2200 smc501_writel(crt_ctrl, info->regs + SM501_DC_CRT_CONTROL);
2202 sm501fb_resume_fb(info, HEAD_CRT);
2203 sm501fb_resume_fb(info, HEAD_PANEL);
2209 #define sm501fb_suspend NULL
2210 #define sm501fb_resume NULL
2213 static struct platform_driver sm501fb_driver = {
2214 .probe = sm501fb_probe,
2215 .remove = sm501fb_remove,
2216 .suspend = sm501fb_suspend,
2217 .resume = sm501fb_resume,
2220 .dev_groups = sm501fb_groups,
2224 module_platform_driver(sm501fb_driver);
2226 module_param_named(mode, fb_mode, charp, 0);
2227 MODULE_PARM_DESC(mode,
2228 "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");
2229 module_param_named(bpp, default_bpp, ulong, 0);
2230 MODULE_PARM_DESC(bpp, "Specify bit-per-pixel if not specified mode");
2231 MODULE_AUTHOR("Ben Dooks, Vincent Sanders");
2232 MODULE_DESCRIPTION("SM501 Framebuffer driver");
2233 MODULE_LICENSE("GPL v2");