1 /* SPDX-License-Identifier: GPL-2.0 */
3 * ATI Frame Buffer Device Driver Core Definitions
7 #include <linux/spinlock.h>
8 #include <linux/wait.h>
11 * Elements of the hardware specific atyfb_par structure
27 u32 dp_pix_width; /* acceleration */
28 u32 dp_chain_mask; /* acceleration */
29 #ifdef CONFIG_FB_ATY_GENERIC_LCD
33 u32 shadow_h_tot_disp;
34 u32 shadow_h_sync_strt_wid;
35 u32 shadow_v_tot_disp;
36 u32 shadow_v_sync_strt_wid;
43 struct aty_interrupt {
44 wait_queue_head_t wait;
52 int sclk, mclk, mclk_pm, xclk;
70 } __attribute__ ((packed)) PLL_BLOCK_MACH64;
88 u8 mclk_fb_mult; /* 2 ro 4 */
96 u32 dsp_config; /* Mach64 GTB DSP */
97 u32 dsp_on_off; /* Mach64 GTB DSP */
100 u32 xclkpagefaultdelay;
104 u8 mclk_post_div_real;
105 u8 xclk_post_div_real;
106 u8 vclk_post_div_real;
108 #ifdef CONFIG_FB_ATY_GENERIC_LCD
109 u32 xres; /* use for LCD stretching/scaling */
116 #define DONT_USE_SPLL 0x1
117 #define DONT_USE_XDLL 0x2
118 #define USE_CPUCLK 0x4
119 #define POWERDOWN_PLL 0x8
123 struct pll_514 ibm514;
124 struct pll_18818 ics2595;
128 * The hardware parameters for each card
132 u32 pseudo_palette[16];
133 struct { u8 red, green, blue; } palette[256];
134 const struct aty_dac_ops *dac_ops;
135 const struct aty_pll_ops *pll_ops;
136 void __iomem *ati_regbase;
137 unsigned long clk_wr_offset; /* meaning overloaded, clock id by CT */
140 struct pll_info pll_limits;
151 int blitter_may_be_busy;
155 unsigned long res_start;
156 unsigned long res_size;
157 struct pci_dev *pdev;
159 struct pci_mmap_map *mmap_map;
163 #ifdef CONFIG_FB_ATY_GENERIC_LCD
164 unsigned long bios_base_phys;
165 unsigned long bios_base;
166 unsigned long lcd_table;
178 u16 lcd_right_margin;
179 u16 lcd_lower_margin;
183 unsigned long aux_start; /* auxiliary aperture */
184 unsigned long aux_size;
185 struct aty_interrupt vblank;
186 unsigned long irq_flags;
191 struct crtc saved_crtc;
192 union aty_pll saved_pll;
196 * ATI Mach64 features
199 #define M64_HAS(feature) ((par)->features & (M64F_##feature))
201 #define M64F_RESET_3D 0x00000001
202 #define M64F_MAGIC_FIFO 0x00000002
203 #define M64F_GTB_DSP 0x00000004
204 #define M64F_FIFO_32 0x00000008
205 #define M64F_SDRAM_MAGIC_PLL 0x00000010
206 #define M64F_MAGIC_POSTDIV 0x00000020
207 #define M64F_INTEGRATED 0x00000040
208 #define M64F_CT_BUS 0x00000080
209 #define M64F_VT_BUS 0x00000100
210 #define M64F_MOBIL_BUS 0x00000200
211 #define M64F_GX 0x00000400
212 #define M64F_CT 0x00000800
213 #define M64F_VT 0x00001000
214 #define M64F_GT 0x00002000
215 #define M64F_MAGIC_VRAM_SIZE 0x00004000
216 #define M64F_G3_PB_1_1 0x00008000
217 #define M64F_G3_PB_1024x768 0x00010000
218 #define M64F_EXTRA_BRIGHT 0x00020000
219 #define M64F_LT_LCD_REGS 0x00040000
220 #define M64F_XL_DLL 0x00080000
221 #define M64F_MFB_FORCE_4 0x00100000
222 #define M64F_HW_TRIPLE 0x00200000
223 #define M64F_XL_MEM 0x00400000
228 static inline u32 aty_ld_le32(int regindex, const struct atyfb_par *par)
230 /* Hack for bloc 1, should be cleanly optimized by compiler */
231 if (regindex >= 0x400)
235 return in_le32(par->ati_regbase + regindex);
237 return readl(par->ati_regbase + regindex);
241 static inline void aty_st_le32(int regindex, u32 val, const struct atyfb_par *par)
243 /* Hack for bloc 1, should be cleanly optimized by compiler */
244 if (regindex >= 0x400)
248 out_le32(par->ati_regbase + regindex, val);
250 writel(val, par->ati_regbase + regindex);
254 static inline void aty_st_le16(int regindex, u16 val,
255 const struct atyfb_par *par)
257 /* Hack for bloc 1, should be cleanly optimized by compiler */
258 if (regindex >= 0x400)
261 out_le16(par->ati_regbase + regindex, val);
263 writel(val, par->ati_regbase + regindex);
267 static inline u8 aty_ld_8(int regindex, const struct atyfb_par *par)
269 /* Hack for bloc 1, should be cleanly optimized by compiler */
270 if (regindex >= 0x400)
273 return in_8(par->ati_regbase + regindex);
275 return readb(par->ati_regbase + regindex);
279 static inline void aty_st_8(int regindex, u8 val, const struct atyfb_par *par)
281 /* Hack for bloc 1, should be cleanly optimized by compiler */
282 if (regindex >= 0x400)
286 out_8(par->ati_regbase + regindex, val);
288 writeb(val, par->ati_regbase + regindex);
292 extern void aty_st_lcd(int index, u32 val, const struct atyfb_par *par);
293 extern u32 aty_ld_lcd(int index, const struct atyfb_par *par);
300 int (*set_dac) (const struct fb_info * info,
301 const union aty_pll * pll, u32 bpp, u32 accel);
304 extern const struct aty_dac_ops aty_dac_ibm514; /* IBM RGB514 */
305 extern const struct aty_dac_ops aty_dac_ati68860b; /* ATI 68860-B */
306 extern const struct aty_dac_ops aty_dac_att21c498; /* AT&T 21C498 */
307 extern const struct aty_dac_ops aty_dac_unsupported; /* unsupported */
308 extern const struct aty_dac_ops aty_dac_ct; /* Integrated */
316 int (*var_to_pll) (const struct fb_info * info, u32 vclk_per, u32 bpp, union aty_pll * pll);
317 u32 (*pll_to_var) (const struct fb_info * info, const union aty_pll * pll);
318 void (*set_pll) (const struct fb_info * info, const union aty_pll * pll);
319 void (*get_pll) (const struct fb_info *info, union aty_pll * pll);
320 int (*init_pll) (const struct fb_info * info, union aty_pll * pll);
321 void (*resume_pll)(const struct fb_info *info, union aty_pll *pll);
324 extern const struct aty_pll_ops aty_pll_ati18818_1; /* ATI 18818 */
325 extern const struct aty_pll_ops aty_pll_stg1703; /* STG 1703 */
326 extern const struct aty_pll_ops aty_pll_ch8398; /* Chrontel 8398 */
327 extern const struct aty_pll_ops aty_pll_att20c408; /* AT&T 20C408 */
328 extern const struct aty_pll_ops aty_pll_ibm514; /* IBM RGB514 */
329 extern const struct aty_pll_ops aty_pll_unsupported; /* unsupported */
330 extern const struct aty_pll_ops aty_pll_ct; /* Integrated */
333 extern void aty_set_pll_ct(const struct fb_info *info, const union aty_pll *pll);
334 extern u8 aty_ld_pll_ct(int offset, const struct atyfb_par *par);
336 extern const u8 aty_postdividers[8];
340 * Hardware cursor support
343 extern int aty_init_cursor(struct fb_info *info, struct fb_ops *atyfb_ops);
346 * Hardware acceleration
349 static inline void wait_for_fifo(u16 entries, struct atyfb_par *par)
351 unsigned fifo_space = par->fifo_space;
352 while (entries > fifo_space) {
353 fifo_space = 16 - fls(aty_ld_le32(FIFO_STAT, par) & 0xffff);
355 par->fifo_space = fifo_space - entries;
358 static inline void wait_for_idle(struct atyfb_par *par)
360 wait_for_fifo(16, par);
361 while ((aty_ld_le32(GUI_STAT, par) & 1) != 0);
362 par->blitter_may_be_busy = 0;
365 extern void aty_reset_engine(struct atyfb_par *par);
366 extern void aty_init_engine(struct atyfb_par *par, struct fb_info *info);
368 void atyfb_copyarea(struct fb_info *info, const struct fb_copyarea *area);
369 void atyfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect);
370 void atyfb_imageblit(struct fb_info *info, const struct fb_image *image);