1 # SPDX-License-Identifier: GPL-2.0
4 tristate "DesignWare USB3 DRD Core Support"
5 depends on (USB || USB_GADGET) && HAS_DMA
6 depends on (EXTCON || EXTCON=n)
7 select USB_XHCI_PLATFORM if USB_XHCI_HCD
8 select USB_ROLE_SWITCH if USB_DWC3_DUAL_ROLE
10 Say Y or M here if your system has a Dual Role SuperSpeed
11 USB controller based on the DesignWare USB3 IP Core.
13 If you choose to build this driver as a dynamically linked
14 module, the module will be called dwc3.ko.
19 bool "Register ULPI PHY Interface"
20 depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_DWC3
22 Select this if you have ULPI type PHY attached to your DWC3
26 prompt "DWC3 Mode Selection"
27 default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
28 default USB_DWC3_HOST if (USB && !USB_GADGET)
29 default USB_DWC3_GADGET if (!USB && USB_GADGET)
33 depends on USB=y || USB=USB_DWC3
35 Select this when you want to use DWC3 in host mode only,
36 thereby the gadget feature will be regressed.
38 config USB_DWC3_GADGET
39 bool "Gadget only mode"
40 depends on USB_GADGET=y || USB_GADGET=USB_DWC3
42 Select this when you want to use DWC3 in gadget mode only,
43 thereby the host feature will be regressed.
45 config USB_DWC3_DUAL_ROLE
47 depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
49 This is the default mode of working of DWC3 controller where
50 both host and gadget features are enabled.
54 comment "Platform Glue Driver Support"
57 tristate "Texas Instruments OMAP5 and similar Platforms"
58 depends on ARCH_OMAP2PLUS || COMPILE_TEST
59 depends on EXTCON || !EXTCON
63 Some platforms from Texas Instruments like OMAP5, DRA7xxx and
64 AM437x use this IP for USB2/3 functionality.
66 Say 'Y' or 'M' here if you have one such device
68 config USB_DWC3_EXYNOS
69 tristate "Samsung Exynos SoC Platform"
70 depends on (ARCH_EXYNOS || COMPILE_TEST) && OF
73 Recent Samsung Exynos SoCs (Exynos5250, Exynos5410, Exynos542x,
74 Exynos5800, Exynos5433, Exynos7) ship with one DesignWare Core USB3
75 IP inside, say 'Y' or 'M' if you have one such device.
78 tristate "PCIe-based Platforms"
79 depends on USB_PCI && ACPI
82 If you're using the DesignWare Core IP with a PCIe (but not HAPS
83 platform), please say 'Y' or 'M' here.
86 tristate "Synopsys PCIe-based HAPS Platforms"
90 If you're using the DesignWare Core IP with a Synopsys PCIe HAPS
91 platform, please say 'Y' or 'M' here.
93 config USB_DWC3_KEYSTONE
94 tristate "Texas Instruments Keystone2/AM654 Platforms"
95 depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
98 Support of USB2/3 functionality in TI Keystone2 and AM654 platforms.
99 Say 'Y' or 'M' here if you have one such device
101 config USB_DWC3_MESON_G12A
102 tristate "Amlogic Meson G12A Platforms"
103 depends on OF && COMMON_CLK
104 depends on ARCH_MESON || COMPILE_TEST
106 select USB_ROLE_SWITCH
109 Support USB2/3 functionality in Amlogic G12A platforms.
110 Say 'Y' or 'M' if you have one such device.
112 config USB_DWC3_OF_SIMPLE
113 tristate "Generic OF Simple Glue Layer"
114 depends on OF && COMMON_CLK
117 Support USB2/3 functionality in simple SoC integrations.
118 Currently supports Xilinx and Qualcomm DWC USB3 IP.
119 Say 'Y' or 'M' if you have one such device.
122 tristate "STMicroelectronics Platforms"
123 depends on (ARCH_STI || COMPILE_TEST) && OF
126 STMicroelectronics SoCs with one DesignWare Core USB3 IP
127 inside (i.e. STiH407).
128 Say 'Y' or 'M' if you have one such device.
131 tristate "Qualcomm Platform"
132 depends on ARCH_QCOM || COMPILE_TEST
133 depends on EXTCON || !EXTCON
137 Some Qualcomm SoCs use DesignWare Core IP for USB2/3
139 This driver also handles Qscratch wrapper which is needed
140 for peripheral mode support.
141 Say 'Y' or 'M' if you have one such device.
143 config USB_DWC3_IMX8MP
144 tristate "NXP iMX8MP Platform"
145 depends on OF && COMMON_CLK
146 depends on (ARCH_MXC && ARM64) || COMPILE_TEST
149 NXP iMX8M Plus SoC use DesignWare Core IP for USB2/3
151 Say 'Y' or 'M' if you have one such device.
153 config USB_DWC3_XILINX
154 tristate "Xilinx Platforms"
155 depends on (ARCH_ZYNQMP || COMPILE_TEST) && OF
158 Support Xilinx SoCs with DesignWare Core USB3 IP.
159 This driver handles ZynqMP SoC operations.
160 Say 'Y' or 'M' if you have one such device.
163 tristate "Texas Instruments AM62 Platforms"
164 depends on ARCH_K3 || COMPILE_TEST
167 Support TI's AM62 platforms with DesignWare Core USB3 IP.
168 The Designware Core USB3 IP is programmed to operate in
169 in USB 2.0 mode only.
170 Say 'Y' or 'M' here if you have one such device
172 config USB_DWC3_OCTEON
173 tristate "Cavium Octeon Platforms"
174 depends on CAVIUM_OCTEON_SOC || COMPILE_TEST
177 Support Cavium Octeon platforms with DesignWare Core USB3 IP.
178 Only the host mode is currently supported.
179 Say 'Y' or 'M' here if you have one such device.
182 tristate "Realtek DWC3 Platform Driver"
183 depends on OF && ARCH_REALTEK
185 select USB_ROLE_SWITCH
187 RTK DHC RTD SoCs with DesignWare Core USB3 IP inside,
188 and IP Core configured for USB 2.0 and USB 3.0 in host
190 Say 'Y' or 'M' if you have such device.