1 // SPDX-License-Identifier: GPL-2.0-only
3 * Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996
5 * Copyright (C) 2016 Linaro Ltd
6 * Copyright (C) 2014 Sony Mobile Communications AB
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
10 #include <linux/clk.h>
11 #include <linux/delay.h>
12 #include <linux/firmware.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
17 #include <linux/of_address.h>
18 #include <linux/of_reserved_mem.h>
19 #include <linux/platform_device.h>
20 #include <linux/pm_domain.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/firmware/qcom/qcom_scm.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/remoteproc.h>
25 #include <linux/soc/qcom/mdt_loader.h>
26 #include <linux/soc/qcom/smem.h>
27 #include <linux/soc/qcom/smem_state.h>
29 #include "qcom_common.h"
30 #include "qcom_pil_info.h"
31 #include "qcom_q6v5.h"
32 #include "remoteproc_internal.h"
34 #define ADSP_DECRYPT_SHUTDOWN_DELAY_MS 100
36 #define MAX_ASSIGN_COUNT 3
39 int crash_reason_smem;
40 const char *firmware_name;
41 const char *dtb_firmware_name;
45 unsigned int minidump_id;
47 bool decrypt_shutdown;
49 char **proxy_pd_names;
51 const char *load_state;
53 const char *sysmon_name;
55 unsigned int smem_host_id;
57 int region_assign_idx;
58 int region_assign_count;
59 bool region_assign_shared;
60 int region_assign_vmid;
67 struct qcom_q6v5 q6v5;
70 struct clk *aggre2_clk;
72 struct regulator *cx_supply;
73 struct regulator *px_supply;
75 struct device *proxy_pds[3];
79 const char *dtb_firmware_name;
83 unsigned int minidump_id;
84 int crash_reason_smem;
85 unsigned int smem_host_id;
86 bool decrypt_shutdown;
87 const char *info_name;
89 const struct firmware *firmware;
90 const struct firmware *dtb_firmware;
92 struct completion start_done;
93 struct completion stop_done;
96 phys_addr_t dtb_mem_phys;
97 phys_addr_t mem_reloc;
98 phys_addr_t dtb_mem_reloc;
99 phys_addr_t region_assign_phys[MAX_ASSIGN_COUNT];
101 void *dtb_mem_region;
104 size_t region_assign_size[MAX_ASSIGN_COUNT];
106 int region_assign_idx;
107 int region_assign_count;
108 bool region_assign_shared;
109 int region_assign_vmid;
110 u64 region_assign_owners[MAX_ASSIGN_COUNT];
112 struct qcom_rproc_glink glink_subdev;
113 struct qcom_rproc_subdev smd_subdev;
114 struct qcom_rproc_pdm pdm_subdev;
115 struct qcom_rproc_ssr ssr_subdev;
116 struct qcom_sysmon *sysmon;
118 struct qcom_scm_pas_metadata pas_metadata;
119 struct qcom_scm_pas_metadata dtb_pas_metadata;
122 static void adsp_segment_dump(struct rproc *rproc, struct rproc_dump_segment *segment,
123 void *dest, size_t offset, size_t size)
125 struct qcom_adsp *adsp = rproc->priv;
128 total_offset = segment->da + segment->offset + offset - adsp->mem_phys;
129 if (total_offset < 0 || total_offset + size > adsp->mem_size) {
131 "invalid copy request for segment %pad with offset %zu and size %zu)\n",
132 &segment->da, offset, size);
133 memset(dest, 0xff, size);
137 memcpy_fromio(dest, adsp->mem_region + total_offset, size);
140 static void adsp_minidump(struct rproc *rproc)
142 struct qcom_adsp *adsp = rproc->priv;
144 if (rproc->dump_conf == RPROC_COREDUMP_DISABLED)
147 qcom_minidump(rproc, adsp->minidump_id, adsp_segment_dump);
150 static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds,
156 for (i = 0; i < pd_count; i++) {
157 dev_pm_genpd_set_performance_state(pds[i], INT_MAX);
158 ret = pm_runtime_get_sync(pds[i]);
160 pm_runtime_put_noidle(pds[i]);
161 dev_pm_genpd_set_performance_state(pds[i], 0);
162 goto unroll_pd_votes;
169 for (i--; i >= 0; i--) {
170 dev_pm_genpd_set_performance_state(pds[i], 0);
171 pm_runtime_put(pds[i]);
177 static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds,
182 for (i = 0; i < pd_count; i++) {
183 dev_pm_genpd_set_performance_state(pds[i], 0);
184 pm_runtime_put(pds[i]);
188 static int adsp_shutdown_poll_decrypt(struct qcom_adsp *adsp)
190 unsigned int retry_num = 50;
194 msleep(ADSP_DECRYPT_SHUTDOWN_DELAY_MS);
195 ret = qcom_scm_pas_shutdown(adsp->pas_id);
196 } while (ret == -EINVAL && --retry_num);
201 static int adsp_unprepare(struct rproc *rproc)
203 struct qcom_adsp *adsp = rproc->priv;
206 * adsp_load() did pass pas_metadata to the SCM driver for storing
207 * metadata context. It might have been released already if
208 * auth_and_reset() was successful, but in other cases clean it up
211 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
212 if (adsp->dtb_pas_id)
213 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
218 static int adsp_load(struct rproc *rproc, const struct firmware *fw)
220 struct qcom_adsp *adsp = rproc->priv;
223 /* Store firmware handle to be used in adsp_start() */
226 if (adsp->lite_pas_id)
227 ret = qcom_scm_pas_shutdown(adsp->lite_pas_id);
229 if (adsp->dtb_pas_id) {
230 ret = request_firmware(&adsp->dtb_firmware, adsp->dtb_firmware_name, adsp->dev);
232 dev_err(adsp->dev, "request_firmware failed for %s: %d\n",
233 adsp->dtb_firmware_name, ret);
237 ret = qcom_mdt_pas_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name,
238 adsp->dtb_pas_id, adsp->dtb_mem_phys,
239 &adsp->dtb_pas_metadata);
241 goto release_dtb_firmware;
243 ret = qcom_mdt_load_no_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name,
244 adsp->dtb_pas_id, adsp->dtb_mem_region,
245 adsp->dtb_mem_phys, adsp->dtb_mem_size,
246 &adsp->dtb_mem_reloc);
248 goto release_dtb_metadata;
253 release_dtb_metadata:
254 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
256 release_dtb_firmware:
257 release_firmware(adsp->dtb_firmware);
262 static int adsp_start(struct rproc *rproc)
264 struct qcom_adsp *adsp = rproc->priv;
267 ret = qcom_q6v5_prepare(&adsp->q6v5);
271 ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
275 ret = clk_prepare_enable(adsp->xo);
277 goto disable_proxy_pds;
279 ret = clk_prepare_enable(adsp->aggre2_clk);
283 if (adsp->cx_supply) {
284 ret = regulator_enable(adsp->cx_supply);
286 goto disable_aggre2_clk;
289 if (adsp->px_supply) {
290 ret = regulator_enable(adsp->px_supply);
292 goto disable_cx_supply;
295 if (adsp->dtb_pas_id) {
296 ret = qcom_scm_pas_auth_and_reset(adsp->dtb_pas_id);
299 "failed to authenticate dtb image and release reset\n");
300 goto disable_px_supply;
304 ret = qcom_mdt_pas_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id,
305 adsp->mem_phys, &adsp->pas_metadata);
307 goto disable_px_supply;
309 ret = qcom_mdt_load_no_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id,
310 adsp->mem_region, adsp->mem_phys, adsp->mem_size,
313 goto release_pas_metadata;
315 qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size);
317 ret = qcom_scm_pas_auth_and_reset(adsp->pas_id);
320 "failed to authenticate image and release reset\n");
321 goto release_pas_metadata;
324 ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000));
325 if (ret == -ETIMEDOUT) {
326 dev_err(adsp->dev, "start timed out\n");
327 qcom_scm_pas_shutdown(adsp->pas_id);
328 goto release_pas_metadata;
331 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
332 if (adsp->dtb_pas_id)
333 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
335 /* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */
336 adsp->firmware = NULL;
340 release_pas_metadata:
341 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
342 if (adsp->dtb_pas_id)
343 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
346 regulator_disable(adsp->px_supply);
349 regulator_disable(adsp->cx_supply);
351 clk_disable_unprepare(adsp->aggre2_clk);
353 clk_disable_unprepare(adsp->xo);
355 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
357 qcom_q6v5_unprepare(&adsp->q6v5);
359 /* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */
360 adsp->firmware = NULL;
365 static void qcom_pas_handover(struct qcom_q6v5 *q6v5)
367 struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5);
370 regulator_disable(adsp->px_supply);
372 regulator_disable(adsp->cx_supply);
373 clk_disable_unprepare(adsp->aggre2_clk);
374 clk_disable_unprepare(adsp->xo);
375 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
378 static int adsp_stop(struct rproc *rproc)
380 struct qcom_adsp *adsp = rproc->priv;
384 ret = qcom_q6v5_request_stop(&adsp->q6v5, adsp->sysmon);
385 if (ret == -ETIMEDOUT)
386 dev_err(adsp->dev, "timed out on wait\n");
388 ret = qcom_scm_pas_shutdown(adsp->pas_id);
389 if (ret && adsp->decrypt_shutdown)
390 ret = adsp_shutdown_poll_decrypt(adsp);
393 dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
395 if (adsp->dtb_pas_id) {
396 ret = qcom_scm_pas_shutdown(adsp->dtb_pas_id);
398 dev_err(adsp->dev, "failed to shutdown dtb: %d\n", ret);
401 handover = qcom_q6v5_unprepare(&adsp->q6v5);
403 qcom_pas_handover(&adsp->q6v5);
405 if (adsp->smem_host_id)
406 ret = qcom_smem_bust_hwspin_lock_by_host(adsp->smem_host_id);
411 static void *adsp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
413 struct qcom_adsp *adsp = rproc->priv;
416 offset = da - adsp->mem_reloc;
417 if (offset < 0 || offset + len > adsp->mem_size)
423 return adsp->mem_region + offset;
426 static unsigned long adsp_panic(struct rproc *rproc)
428 struct qcom_adsp *adsp = rproc->priv;
430 return qcom_q6v5_panic(&adsp->q6v5);
433 static const struct rproc_ops adsp_ops = {
434 .unprepare = adsp_unprepare,
437 .da_to_va = adsp_da_to_va,
438 .parse_fw = qcom_register_dump_segments,
443 static const struct rproc_ops adsp_minidump_ops = {
444 .unprepare = adsp_unprepare,
447 .da_to_va = adsp_da_to_va,
448 .parse_fw = qcom_register_dump_segments,
451 .coredump = adsp_minidump,
454 static int adsp_init_clock(struct qcom_adsp *adsp)
456 adsp->xo = devm_clk_get(adsp->dev, "xo");
457 if (IS_ERR(adsp->xo))
458 return dev_err_probe(adsp->dev, PTR_ERR(adsp->xo),
459 "failed to get xo clock");
462 adsp->aggre2_clk = devm_clk_get_optional(adsp->dev, "aggre2");
463 if (IS_ERR(adsp->aggre2_clk))
464 return dev_err_probe(adsp->dev, PTR_ERR(adsp->aggre2_clk),
465 "failed to get aggre2 clock");
470 static int adsp_init_regulator(struct qcom_adsp *adsp)
472 adsp->cx_supply = devm_regulator_get_optional(adsp->dev, "cx");
473 if (IS_ERR(adsp->cx_supply)) {
474 if (PTR_ERR(adsp->cx_supply) == -ENODEV)
475 adsp->cx_supply = NULL;
477 return PTR_ERR(adsp->cx_supply);
481 regulator_set_load(adsp->cx_supply, 100000);
483 adsp->px_supply = devm_regulator_get_optional(adsp->dev, "px");
484 if (IS_ERR(adsp->px_supply)) {
485 if (PTR_ERR(adsp->px_supply) == -ENODEV)
486 adsp->px_supply = NULL;
488 return PTR_ERR(adsp->px_supply);
494 static int adsp_pds_attach(struct device *dev, struct device **devs,
504 /* Handle single power domain */
505 if (dev->pm_domain) {
507 pm_runtime_enable(dev);
511 while (pd_names[num_pds])
514 for (i = 0; i < num_pds; i++) {
515 devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]);
516 if (IS_ERR_OR_NULL(devs[i])) {
517 ret = PTR_ERR(devs[i]) ? : -ENODATA;
525 for (i--; i >= 0; i--)
526 dev_pm_domain_detach(devs[i], false);
531 static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds,
534 struct device *dev = adsp->dev;
537 /* Handle single power domain */
538 if (dev->pm_domain && pd_count) {
539 pm_runtime_disable(dev);
543 for (i = 0; i < pd_count; i++)
544 dev_pm_domain_detach(pds[i], false);
547 static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
549 struct reserved_mem *rmem;
550 struct device_node *node;
552 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0);
554 dev_err(adsp->dev, "no memory-region specified\n");
558 rmem = of_reserved_mem_lookup(node);
561 dev_err(adsp->dev, "unable to resolve memory-region\n");
565 adsp->mem_phys = adsp->mem_reloc = rmem->base;
566 adsp->mem_size = rmem->size;
567 adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size);
568 if (!adsp->mem_region) {
569 dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n",
570 &rmem->base, adsp->mem_size);
574 if (!adsp->dtb_pas_id)
577 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 1);
579 dev_err(adsp->dev, "no dtb memory-region specified\n");
583 rmem = of_reserved_mem_lookup(node);
586 dev_err(adsp->dev, "unable to resolve dtb memory-region\n");
590 adsp->dtb_mem_phys = adsp->dtb_mem_reloc = rmem->base;
591 adsp->dtb_mem_size = rmem->size;
592 adsp->dtb_mem_region = devm_ioremap_wc(adsp->dev, adsp->dtb_mem_phys, adsp->dtb_mem_size);
593 if (!adsp->dtb_mem_region) {
594 dev_err(adsp->dev, "unable to map dtb memory region: %pa+%zx\n",
595 &rmem->base, adsp->dtb_mem_size);
602 static int adsp_assign_memory_region(struct qcom_adsp *adsp)
604 struct qcom_scm_vmperm perm[MAX_ASSIGN_COUNT];
605 struct device_node *node;
606 unsigned int perm_size;
610 if (!adsp->region_assign_idx)
613 for (offset = 0; offset < adsp->region_assign_count; ++offset) {
614 struct reserved_mem *rmem = NULL;
616 node = of_parse_phandle(adsp->dev->of_node, "memory-region",
617 adsp->region_assign_idx + offset);
619 rmem = of_reserved_mem_lookup(node);
622 dev_err(adsp->dev, "unable to resolve shareable memory-region index %d\n",
627 if (adsp->region_assign_shared) {
628 perm[0].vmid = QCOM_SCM_VMID_HLOS;
629 perm[0].perm = QCOM_SCM_PERM_RW;
630 perm[1].vmid = adsp->region_assign_vmid;
631 perm[1].perm = QCOM_SCM_PERM_RW;
634 perm[0].vmid = adsp->region_assign_vmid;
635 perm[0].perm = QCOM_SCM_PERM_RW;
639 adsp->region_assign_phys[offset] = rmem->base;
640 adsp->region_assign_size[offset] = rmem->size;
641 adsp->region_assign_owners[offset] = BIT(QCOM_SCM_VMID_HLOS);
643 ret = qcom_scm_assign_mem(adsp->region_assign_phys[offset],
644 adsp->region_assign_size[offset],
645 &adsp->region_assign_owners[offset],
648 dev_err(adsp->dev, "assign memory %d failed\n", offset);
656 static void adsp_unassign_memory_region(struct qcom_adsp *adsp)
658 struct qcom_scm_vmperm perm;
662 if (!adsp->region_assign_idx || adsp->region_assign_shared)
665 for (offset = 0; offset < adsp->region_assign_count; ++offset) {
666 perm.vmid = QCOM_SCM_VMID_HLOS;
667 perm.perm = QCOM_SCM_PERM_RW;
669 ret = qcom_scm_assign_mem(adsp->region_assign_phys[offset],
670 adsp->region_assign_size[offset],
671 &adsp->region_assign_owners[offset],
674 dev_err(adsp->dev, "unassign memory %d failed\n", offset);
678 static int adsp_probe(struct platform_device *pdev)
680 const struct adsp_data *desc;
681 struct qcom_adsp *adsp;
683 const char *fw_name, *dtb_fw_name = NULL;
684 const struct rproc_ops *ops = &adsp_ops;
687 desc = of_device_get_match_data(&pdev->dev);
691 if (!qcom_scm_is_available())
692 return -EPROBE_DEFER;
694 fw_name = desc->firmware_name;
695 ret = of_property_read_string(pdev->dev.of_node, "firmware-name",
697 if (ret < 0 && ret != -EINVAL)
700 if (desc->dtb_firmware_name) {
701 dtb_fw_name = desc->dtb_firmware_name;
702 ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", 1,
704 if (ret < 0 && ret != -EINVAL)
708 if (desc->minidump_id)
709 ops = &adsp_minidump_ops;
711 rproc = devm_rproc_alloc(&pdev->dev, desc->sysmon_name, ops, fw_name, sizeof(*adsp));
714 dev_err(&pdev->dev, "unable to allocate remoteproc\n");
718 rproc->auto_boot = desc->auto_boot;
719 rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
722 adsp->dev = &pdev->dev;
724 adsp->minidump_id = desc->minidump_id;
725 adsp->pas_id = desc->pas_id;
726 adsp->lite_pas_id = desc->lite_pas_id;
727 adsp->info_name = desc->sysmon_name;
728 adsp->smem_host_id = desc->smem_host_id;
729 adsp->decrypt_shutdown = desc->decrypt_shutdown;
730 adsp->region_assign_idx = desc->region_assign_idx;
731 adsp->region_assign_count = min_t(int, MAX_ASSIGN_COUNT, desc->region_assign_count);
732 adsp->region_assign_vmid = desc->region_assign_vmid;
733 adsp->region_assign_shared = desc->region_assign_shared;
735 adsp->dtb_firmware_name = dtb_fw_name;
736 adsp->dtb_pas_id = desc->dtb_pas_id;
738 platform_set_drvdata(pdev, adsp);
740 ret = device_init_wakeup(adsp->dev, true);
744 ret = adsp_alloc_memory_region(adsp);
748 ret = adsp_assign_memory_region(adsp);
752 ret = adsp_init_clock(adsp);
756 ret = adsp_init_regulator(adsp);
760 ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds,
761 desc->proxy_pd_names);
764 adsp->proxy_pd_count = ret;
766 ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, desc->load_state,
769 goto detach_proxy_pds;
771 qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name);
772 qcom_add_smd_subdev(rproc, &adsp->smd_subdev);
773 qcom_add_pdm_subdev(rproc, &adsp->pdm_subdev);
774 adsp->sysmon = qcom_add_sysmon_subdev(rproc,
777 if (IS_ERR(adsp->sysmon)) {
778 ret = PTR_ERR(adsp->sysmon);
779 goto deinit_remove_pdm_smd_glink;
782 qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
783 ret = rproc_add(rproc);
785 goto remove_ssr_sysmon;
790 qcom_remove_ssr_subdev(rproc, &adsp->ssr_subdev);
791 qcom_remove_sysmon_subdev(adsp->sysmon);
792 deinit_remove_pdm_smd_glink:
793 qcom_remove_pdm_subdev(rproc, &adsp->pdm_subdev);
794 qcom_remove_smd_subdev(rproc, &adsp->smd_subdev);
795 qcom_remove_glink_subdev(rproc, &adsp->glink_subdev);
796 qcom_q6v5_deinit(&adsp->q6v5);
798 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
800 adsp_unassign_memory_region(adsp);
802 device_init_wakeup(adsp->dev, false);
807 static void adsp_remove(struct platform_device *pdev)
809 struct qcom_adsp *adsp = platform_get_drvdata(pdev);
811 rproc_del(adsp->rproc);
813 qcom_q6v5_deinit(&adsp->q6v5);
814 adsp_unassign_memory_region(adsp);
815 qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
816 qcom_remove_sysmon_subdev(adsp->sysmon);
817 qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev);
818 qcom_remove_pdm_subdev(adsp->rproc, &adsp->pdm_subdev);
819 qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
820 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
821 device_init_wakeup(adsp->dev, false);
824 static const struct adsp_data adsp_resource_init = {
825 .crash_reason_smem = 423,
826 .firmware_name = "adsp.mdt",
830 .sysmon_name = "adsp",
834 static const struct adsp_data sa8775p_adsp_resource = {
835 .crash_reason_smem = 423,
836 .firmware_name = "adsp.mbn",
840 .proxy_pd_names = (char*[]){
845 .load_state = "adsp",
847 .sysmon_name = "adsp",
851 static const struct adsp_data sdm845_adsp_resource_init = {
852 .crash_reason_smem = 423,
853 .firmware_name = "adsp.mdt",
856 .load_state = "adsp",
858 .sysmon_name = "adsp",
862 static const struct adsp_data sm6350_adsp_resource = {
863 .crash_reason_smem = 423,
864 .firmware_name = "adsp.mdt",
867 .proxy_pd_names = (char*[]){
872 .load_state = "adsp",
874 .sysmon_name = "adsp",
878 static const struct adsp_data sm6375_mpss_resource = {
879 .crash_reason_smem = 421,
880 .firmware_name = "modem.mdt",
884 .proxy_pd_names = (char*[]){
889 .sysmon_name = "modem",
893 static const struct adsp_data sm8150_adsp_resource = {
894 .crash_reason_smem = 423,
895 .firmware_name = "adsp.mdt",
898 .proxy_pd_names = (char*[]){
902 .load_state = "adsp",
904 .sysmon_name = "adsp",
908 static const struct adsp_data sm8250_adsp_resource = {
909 .crash_reason_smem = 423,
910 .firmware_name = "adsp.mdt",
914 .proxy_pd_names = (char*[]){
919 .load_state = "adsp",
921 .sysmon_name = "adsp",
925 static const struct adsp_data sm8350_adsp_resource = {
926 .crash_reason_smem = 423,
927 .firmware_name = "adsp.mdt",
930 .proxy_pd_names = (char*[]){
935 .load_state = "adsp",
937 .sysmon_name = "adsp",
941 static const struct adsp_data msm8996_adsp_resource = {
942 .crash_reason_smem = 423,
943 .firmware_name = "adsp.mdt",
946 .proxy_pd_names = (char*[]){
951 .sysmon_name = "adsp",
955 static const struct adsp_data cdsp_resource_init = {
956 .crash_reason_smem = 601,
957 .firmware_name = "cdsp.mdt",
961 .sysmon_name = "cdsp",
965 static const struct adsp_data sa8775p_cdsp0_resource = {
966 .crash_reason_smem = 601,
967 .firmware_name = "cdsp0.mbn",
971 .proxy_pd_names = (char*[]){
977 .load_state = "cdsp",
979 .sysmon_name = "cdsp",
983 static const struct adsp_data sa8775p_cdsp1_resource = {
984 .crash_reason_smem = 633,
985 .firmware_name = "cdsp1.mbn",
989 .proxy_pd_names = (char*[]){
997 .sysmon_name = "cdsp1",
1001 static const struct adsp_data sdm845_cdsp_resource_init = {
1002 .crash_reason_smem = 601,
1003 .firmware_name = "cdsp.mdt",
1006 .load_state = "cdsp",
1008 .sysmon_name = "cdsp",
1012 static const struct adsp_data sm6350_cdsp_resource = {
1013 .crash_reason_smem = 601,
1014 .firmware_name = "cdsp.mdt",
1017 .proxy_pd_names = (char*[]){
1022 .load_state = "cdsp",
1024 .sysmon_name = "cdsp",
1028 static const struct adsp_data sm8150_cdsp_resource = {
1029 .crash_reason_smem = 601,
1030 .firmware_name = "cdsp.mdt",
1033 .proxy_pd_names = (char*[]){
1037 .load_state = "cdsp",
1039 .sysmon_name = "cdsp",
1043 static const struct adsp_data sm8250_cdsp_resource = {
1044 .crash_reason_smem = 601,
1045 .firmware_name = "cdsp.mdt",
1048 .proxy_pd_names = (char*[]){
1052 .load_state = "cdsp",
1054 .sysmon_name = "cdsp",
1058 static const struct adsp_data sc8280xp_nsp0_resource = {
1059 .crash_reason_smem = 601,
1060 .firmware_name = "cdsp.mdt",
1063 .proxy_pd_names = (char*[]){
1067 .ssr_name = "cdsp0",
1068 .sysmon_name = "cdsp",
1072 static const struct adsp_data sc8280xp_nsp1_resource = {
1073 .crash_reason_smem = 633,
1074 .firmware_name = "cdsp.mdt",
1077 .proxy_pd_names = (char*[]){
1081 .ssr_name = "cdsp1",
1082 .sysmon_name = "cdsp1",
1086 static const struct adsp_data x1e80100_adsp_resource = {
1087 .crash_reason_smem = 423,
1088 .firmware_name = "adsp.mdt",
1089 .dtb_firmware_name = "adsp_dtb.mdt",
1092 .lite_pas_id = 0x1f,
1095 .proxy_pd_names = (char*[]){
1100 .load_state = "adsp",
1101 .ssr_name = "lpass",
1102 .sysmon_name = "adsp",
1106 static const struct adsp_data x1e80100_cdsp_resource = {
1107 .crash_reason_smem = 601,
1108 .firmware_name = "cdsp.mdt",
1109 .dtb_firmware_name = "cdsp_dtb.mdt",
1114 .proxy_pd_names = (char*[]){
1120 .load_state = "cdsp",
1122 .sysmon_name = "cdsp",
1126 static const struct adsp_data sm8350_cdsp_resource = {
1127 .crash_reason_smem = 601,
1128 .firmware_name = "cdsp.mdt",
1132 .proxy_pd_names = (char*[]){
1137 .load_state = "cdsp",
1139 .sysmon_name = "cdsp",
1143 static const struct adsp_data sa8775p_gpdsp0_resource = {
1144 .crash_reason_smem = 640,
1145 .firmware_name = "gpdsp0.mbn",
1149 .proxy_pd_names = (char*[]){
1154 .load_state = "gpdsp0",
1155 .ssr_name = "gpdsp0",
1156 .sysmon_name = "gpdsp0",
1160 static const struct adsp_data sa8775p_gpdsp1_resource = {
1161 .crash_reason_smem = 641,
1162 .firmware_name = "gpdsp1.mbn",
1166 .proxy_pd_names = (char*[]){
1171 .load_state = "gpdsp1",
1172 .ssr_name = "gpdsp1",
1173 .sysmon_name = "gpdsp1",
1177 static const struct adsp_data mpss_resource_init = {
1178 .crash_reason_smem = 421,
1179 .firmware_name = "modem.mdt",
1183 .proxy_pd_names = (char*[]){
1188 .load_state = "modem",
1190 .sysmon_name = "modem",
1194 static const struct adsp_data sc8180x_mpss_resource = {
1195 .crash_reason_smem = 421,
1196 .firmware_name = "modem.mdt",
1199 .proxy_pd_names = (char*[]){
1203 .load_state = "modem",
1205 .sysmon_name = "modem",
1209 static const struct adsp_data msm8996_slpi_resource_init = {
1210 .crash_reason_smem = 424,
1211 .firmware_name = "slpi.mdt",
1214 .proxy_pd_names = (char*[]){
1219 .sysmon_name = "slpi",
1223 static const struct adsp_data sdm845_slpi_resource_init = {
1224 .crash_reason_smem = 424,
1225 .firmware_name = "slpi.mdt",
1228 .proxy_pd_names = (char*[]){
1233 .load_state = "slpi",
1235 .sysmon_name = "slpi",
1239 static const struct adsp_data wcss_resource_init = {
1240 .crash_reason_smem = 421,
1241 .firmware_name = "wcnss.mdt",
1245 .sysmon_name = "wcnss",
1249 static const struct adsp_data sdx55_mpss_resource = {
1250 .crash_reason_smem = 421,
1251 .firmware_name = "modem.mdt",
1254 .proxy_pd_names = (char*[]){
1260 .sysmon_name = "modem",
1264 static const struct adsp_data sm8450_mpss_resource = {
1265 .crash_reason_smem = 421,
1266 .firmware_name = "modem.mdt",
1270 .decrypt_shutdown = true,
1271 .proxy_pd_names = (char*[]){
1276 .load_state = "modem",
1278 .sysmon_name = "modem",
1282 static const struct adsp_data sm8550_adsp_resource = {
1283 .crash_reason_smem = 423,
1284 .firmware_name = "adsp.mdt",
1285 .dtb_firmware_name = "adsp_dtb.mdt",
1290 .proxy_pd_names = (char*[]){
1295 .load_state = "adsp",
1296 .ssr_name = "lpass",
1297 .sysmon_name = "adsp",
1302 static const struct adsp_data sm8550_cdsp_resource = {
1303 .crash_reason_smem = 601,
1304 .firmware_name = "cdsp.mdt",
1305 .dtb_firmware_name = "cdsp_dtb.mdt",
1310 .proxy_pd_names = (char*[]){
1316 .load_state = "cdsp",
1318 .sysmon_name = "cdsp",
1323 static const struct adsp_data sm8550_mpss_resource = {
1324 .crash_reason_smem = 421,
1325 .firmware_name = "modem.mdt",
1326 .dtb_firmware_name = "modem_dtb.mdt",
1331 .decrypt_shutdown = true,
1332 .proxy_pd_names = (char*[]){
1337 .load_state = "modem",
1339 .sysmon_name = "modem",
1342 .region_assign_idx = 2,
1343 .region_assign_count = 1,
1344 .region_assign_vmid = QCOM_SCM_VMID_MSS_MSA,
1347 static const struct adsp_data sc7280_wpss_resource = {
1348 .crash_reason_smem = 626,
1349 .firmware_name = "wpss.mdt",
1352 .proxy_pd_names = (char*[]){
1357 .load_state = "wpss",
1359 .sysmon_name = "wpss",
1363 static const struct adsp_data sm8650_cdsp_resource = {
1364 .crash_reason_smem = 601,
1365 .firmware_name = "cdsp.mdt",
1366 .dtb_firmware_name = "cdsp_dtb.mdt",
1371 .proxy_pd_names = (char*[]){
1377 .load_state = "cdsp",
1379 .sysmon_name = "cdsp",
1382 .region_assign_idx = 2,
1383 .region_assign_count = 1,
1384 .region_assign_shared = true,
1385 .region_assign_vmid = QCOM_SCM_VMID_CDSP,
1388 static const struct adsp_data sm8650_mpss_resource = {
1389 .crash_reason_smem = 421,
1390 .firmware_name = "modem.mdt",
1391 .dtb_firmware_name = "modem_dtb.mdt",
1396 .decrypt_shutdown = true,
1397 .proxy_pd_names = (char*[]){
1402 .load_state = "modem",
1404 .sysmon_name = "modem",
1407 .region_assign_idx = 2,
1408 .region_assign_count = 3,
1409 .region_assign_vmid = QCOM_SCM_VMID_MSS_MSA,
1412 static const struct of_device_id adsp_of_match[] = {
1413 { .compatible = "qcom,msm8226-adsp-pil", .data = &adsp_resource_init},
1414 { .compatible = "qcom,msm8953-adsp-pil", .data = &msm8996_adsp_resource},
1415 { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
1416 { .compatible = "qcom,msm8996-adsp-pil", .data = &msm8996_adsp_resource},
1417 { .compatible = "qcom,msm8996-slpi-pil", .data = &msm8996_slpi_resource_init},
1418 { .compatible = "qcom,msm8998-adsp-pas", .data = &msm8996_adsp_resource},
1419 { .compatible = "qcom,msm8998-slpi-pas", .data = &msm8996_slpi_resource_init},
1420 { .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init },
1421 { .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init },
1422 { .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init },
1423 { .compatible = "qcom,sa8775p-adsp-pas", .data = &sa8775p_adsp_resource},
1424 { .compatible = "qcom,sa8775p-cdsp0-pas", .data = &sa8775p_cdsp0_resource},
1425 { .compatible = "qcom,sa8775p-cdsp1-pas", .data = &sa8775p_cdsp1_resource},
1426 { .compatible = "qcom,sa8775p-gpdsp0-pas", .data = &sa8775p_gpdsp0_resource},
1427 { .compatible = "qcom,sa8775p-gpdsp1-pas", .data = &sa8775p_gpdsp1_resource},
1428 { .compatible = "qcom,sar2130p-adsp-pas", .data = &sm8350_adsp_resource},
1429 { .compatible = "qcom,sc7180-adsp-pas", .data = &sm8250_adsp_resource},
1430 { .compatible = "qcom,sc7180-mpss-pas", .data = &mpss_resource_init},
1431 { .compatible = "qcom,sc7280-adsp-pas", .data = &sm8350_adsp_resource},
1432 { .compatible = "qcom,sc7280-cdsp-pas", .data = &sm6350_cdsp_resource},
1433 { .compatible = "qcom,sc7280-mpss-pas", .data = &mpss_resource_init},
1434 { .compatible = "qcom,sc7280-wpss-pas", .data = &sc7280_wpss_resource},
1435 { .compatible = "qcom,sc8180x-adsp-pas", .data = &sm8150_adsp_resource},
1436 { .compatible = "qcom,sc8180x-cdsp-pas", .data = &sm8150_cdsp_resource},
1437 { .compatible = "qcom,sc8180x-mpss-pas", .data = &sc8180x_mpss_resource},
1438 { .compatible = "qcom,sc8280xp-adsp-pas", .data = &sm8250_adsp_resource},
1439 { .compatible = "qcom,sc8280xp-nsp0-pas", .data = &sc8280xp_nsp0_resource},
1440 { .compatible = "qcom,sc8280xp-nsp1-pas", .data = &sc8280xp_nsp1_resource},
1441 { .compatible = "qcom,sdm660-adsp-pas", .data = &adsp_resource_init},
1442 { .compatible = "qcom,sdm845-adsp-pas", .data = &sdm845_adsp_resource_init},
1443 { .compatible = "qcom,sdm845-cdsp-pas", .data = &sdm845_cdsp_resource_init},
1444 { .compatible = "qcom,sdm845-slpi-pas", .data = &sdm845_slpi_resource_init},
1445 { .compatible = "qcom,sdx55-mpss-pas", .data = &sdx55_mpss_resource},
1446 { .compatible = "qcom,sdx75-mpss-pas", .data = &sm8650_mpss_resource},
1447 { .compatible = "qcom,sm6115-adsp-pas", .data = &adsp_resource_init},
1448 { .compatible = "qcom,sm6115-cdsp-pas", .data = &cdsp_resource_init},
1449 { .compatible = "qcom,sm6115-mpss-pas", .data = &sc8180x_mpss_resource},
1450 { .compatible = "qcom,sm6350-adsp-pas", .data = &sm6350_adsp_resource},
1451 { .compatible = "qcom,sm6350-cdsp-pas", .data = &sm6350_cdsp_resource},
1452 { .compatible = "qcom,sm6350-mpss-pas", .data = &mpss_resource_init},
1453 { .compatible = "qcom,sm6375-adsp-pas", .data = &sm6350_adsp_resource},
1454 { .compatible = "qcom,sm6375-cdsp-pas", .data = &sm8150_cdsp_resource},
1455 { .compatible = "qcom,sm6375-mpss-pas", .data = &sm6375_mpss_resource},
1456 { .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource},
1457 { .compatible = "qcom,sm8150-cdsp-pas", .data = &sm8150_cdsp_resource},
1458 { .compatible = "qcom,sm8150-mpss-pas", .data = &mpss_resource_init},
1459 { .compatible = "qcom,sm8150-slpi-pas", .data = &sdm845_slpi_resource_init},
1460 { .compatible = "qcom,sm8250-adsp-pas", .data = &sm8250_adsp_resource},
1461 { .compatible = "qcom,sm8250-cdsp-pas", .data = &sm8250_cdsp_resource},
1462 { .compatible = "qcom,sm8250-slpi-pas", .data = &sdm845_slpi_resource_init},
1463 { .compatible = "qcom,sm8350-adsp-pas", .data = &sm8350_adsp_resource},
1464 { .compatible = "qcom,sm8350-cdsp-pas", .data = &sm8350_cdsp_resource},
1465 { .compatible = "qcom,sm8350-slpi-pas", .data = &sdm845_slpi_resource_init},
1466 { .compatible = "qcom,sm8350-mpss-pas", .data = &mpss_resource_init},
1467 { .compatible = "qcom,sm8450-adsp-pas", .data = &sm8350_adsp_resource},
1468 { .compatible = "qcom,sm8450-cdsp-pas", .data = &sm8350_cdsp_resource},
1469 { .compatible = "qcom,sm8450-slpi-pas", .data = &sdm845_slpi_resource_init},
1470 { .compatible = "qcom,sm8450-mpss-pas", .data = &sm8450_mpss_resource},
1471 { .compatible = "qcom,sm8550-adsp-pas", .data = &sm8550_adsp_resource},
1472 { .compatible = "qcom,sm8550-cdsp-pas", .data = &sm8550_cdsp_resource},
1473 { .compatible = "qcom,sm8550-mpss-pas", .data = &sm8550_mpss_resource},
1474 { .compatible = "qcom,sm8650-adsp-pas", .data = &sm8550_adsp_resource},
1475 { .compatible = "qcom,sm8650-cdsp-pas", .data = &sm8650_cdsp_resource},
1476 { .compatible = "qcom,sm8650-mpss-pas", .data = &sm8650_mpss_resource},
1477 { .compatible = "qcom,x1e80100-adsp-pas", .data = &x1e80100_adsp_resource},
1478 { .compatible = "qcom,x1e80100-cdsp-pas", .data = &x1e80100_cdsp_resource},
1481 MODULE_DEVICE_TABLE(of, adsp_of_match);
1483 static struct platform_driver adsp_driver = {
1484 .probe = adsp_probe,
1485 .remove = adsp_remove,
1487 .name = "qcom_q6v5_pas",
1488 .of_match_table = adsp_of_match,
1492 module_platform_driver(adsp_driver);
1493 MODULE_DESCRIPTION("Qualcomm Hexagon v5 Peripheral Authentication Service driver");
1494 MODULE_LICENSE("GPL v2");